tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2011 - 2012 Cavium, Inc.
4 */
5
6#include <linux/module.h>
7#include <linux/phy.h>
8#include <linux/of.h>
9
10#define PHY_ID_BCM8706 0x0143bdc1
11#define PHY_ID_BCM8727 0x0143bff0
12
13#define BCM87XX_PMD_RX_SIGNAL_DETECT (MII_ADDR_C45 | 0x1000a)
14#define BCM87XX_10GBASER_PCS_STATUS (MII_ADDR_C45 | 0x30020)
15#define BCM87XX_XGXS_LANE_STATUS (MII_ADDR_C45 | 0x40018)
16
17#define BCM87XX_LASI_CONTROL (MII_ADDR_C45 | 0x39002)
18#define BCM87XX_LASI_STATUS (MII_ADDR_C45 | 0x39005)
19
20#if IS_ENABLED(CONFIG_OF_MDIO)
21/* Set and/or override some configuration registers based on the
22 * broadcom,c45-reg-init property stored in the of_node for the phydev.
23 *
24 * broadcom,c45-reg-init = <devid reg mask value>,...;
25 *
26 * There may be one or more sets of <devid reg mask value>:
27 *
28 * devid: which sub-device to use.
29 * reg: the register.
30 * mask: if non-zero, ANDed with existing register value.
31 * value: ORed with the masked value and written to the regiser.
32 *
33 */
34static int bcm87xx_of_reg_init(struct phy_device *phydev)
35{
36 const __be32 *paddr;
37 const __be32 *paddr_end;
38 int len, ret;
39
40 if (!phydev->mdio.dev.of_node)
41 return 0;
42
43 paddr = of_get_property(phydev->mdio.dev.of_node,
44 "broadcom,c45-reg-init", &len);
45 if (!paddr)
46 return 0;
47
48 paddr_end = paddr + (len /= sizeof(*paddr));
49
50 ret = 0;
51
52 while (paddr + 3 < paddr_end) {
53 u16 devid = be32_to_cpup(paddr++);
54 u16 reg = be32_to_cpup(paddr++);
55 u16 mask = be32_to_cpup(paddr++);
56 u16 val_bits = be32_to_cpup(paddr++);
57 int val;
58 u32 regnum = MII_ADDR_C45 | (devid << 16) | reg;
59 val = 0;
60 if (mask) {
61 val = phy_read(phydev, regnum);
62 if (val < 0) {
63 ret = val;
64 goto err;
65 }
66 val &= mask;
67 }
68 val |= val_bits;
69
70 ret = phy_write(phydev, regnum, val);
71 if (ret < 0)
72 goto err;
73 }
74err:
75 return ret;
76}
77#else
78static int bcm87xx_of_reg_init(struct phy_device *phydev)
79{
80 return 0;
81}
82#endif /* CONFIG_OF_MDIO */
83
84static int bcm87xx_config_init(struct phy_device *phydev)
85{
86 linkmode_zero(phydev->supported);
87 linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT,
88 phydev->supported);
89 linkmode_zero(phydev->advertising);
90 linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT,
91 phydev->advertising);
92 phydev->state = PHY_NOLINK;
93 phydev->autoneg = AUTONEG_DISABLE;
94
95 bcm87xx_of_reg_init(phydev);
96
97 return 0;
98}
99
100static int bcm87xx_config_aneg(struct phy_device *phydev)
101{
102 return -EINVAL;
103}
104
105static int bcm87xx_read_status(struct phy_device *phydev)
106{
107 int rx_signal_detect;
108 int pcs_status;
109 int xgxs_lane_status;
110
111 rx_signal_detect = phy_read(phydev, BCM87XX_PMD_RX_SIGNAL_DETECT);
112 if (rx_signal_detect < 0)
113 return rx_signal_detect;
114
115 if ((rx_signal_detect & 1) == 0)
116 goto no_link;
117
118 pcs_status = phy_read(phydev, BCM87XX_10GBASER_PCS_STATUS);
119 if (pcs_status < 0)
120 return pcs_status;
121
122 if ((pcs_status & 1) == 0)
123 goto no_link;
124
125 xgxs_lane_status = phy_read(phydev, BCM87XX_XGXS_LANE_STATUS);
126 if (xgxs_lane_status < 0)
127 return xgxs_lane_status;
128
129 if ((xgxs_lane_status & 0x1000) == 0)
130 goto no_link;
131
132 phydev->speed = 10000;
133 phydev->link = 1;
134 phydev->duplex = 1;
135 return 0;
136
137no_link:
138 phydev->link = 0;
139 return 0;
140}
141
142static int bcm87xx_config_intr(struct phy_device *phydev)
143{
144 int reg, err;
145
146 reg = phy_read(phydev, BCM87XX_LASI_CONTROL);
147
148 if (reg < 0)
149 return reg;
150
151 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
152 reg |= 1;
153 else
154 reg &= ~1;
155
156 err = phy_write(phydev, BCM87XX_LASI_CONTROL, reg);
157 return err;
158}
159
160static int bcm87xx_did_interrupt(struct phy_device *phydev)
161{
162 int reg;
163
164 reg = phy_read(phydev, BCM87XX_LASI_STATUS);
165
166 if (reg < 0) {
167 phydev_err(phydev,
168 "Error: Read of BCM87XX_LASI_STATUS failed: %d\n",
169 reg);
170 return 0;
171 }
172 return (reg & 1) != 0;
173}
174
175static int bcm87xx_ack_interrupt(struct phy_device *phydev)
176{
177 /* Reading the LASI status clears it. */
178 bcm87xx_did_interrupt(phydev);
179 return 0;
180}
181
182static int bcm8706_match_phy_device(struct phy_device *phydev)
183{
184 return phydev->c45_ids.device_ids[4] == PHY_ID_BCM8706;
185}
186
187static int bcm8727_match_phy_device(struct phy_device *phydev)
188{
189 return phydev->c45_ids.device_ids[4] == PHY_ID_BCM8727;
190}
191
192static struct phy_driver bcm87xx_driver[] = {
193{
194 .phy_id = PHY_ID_BCM8706,
195 .phy_id_mask = 0xffffffff,
196 .name = "Broadcom BCM8706",
197 .features = PHY_10GBIT_FEC_FEATURES,
198 .config_init = bcm87xx_config_init,
199 .config_aneg = bcm87xx_config_aneg,
200 .read_status = bcm87xx_read_status,
201 .ack_interrupt = bcm87xx_ack_interrupt,
202 .config_intr = bcm87xx_config_intr,
203 .did_interrupt = bcm87xx_did_interrupt,
204 .match_phy_device = bcm8706_match_phy_device,
205}, {
206 .phy_id = PHY_ID_BCM8727,
207 .phy_id_mask = 0xffffffff,
208 .name = "Broadcom BCM8727",
209 .features = PHY_10GBIT_FEC_FEATURES,
210 .config_init = bcm87xx_config_init,
211 .config_aneg = bcm87xx_config_aneg,
212 .read_status = bcm87xx_read_status,
213 .ack_interrupt = bcm87xx_ack_interrupt,
214 .config_intr = bcm87xx_config_intr,
215 .did_interrupt = bcm87xx_did_interrupt,
216 .match_phy_device = bcm8727_match_phy_device,
217} };
218
219module_phy_driver(bcm87xx_driver);
220
221MODULE_LICENSE("GPL v2");