tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/*
2 * Copyright 2015 Tyler Baker
3 *
4 * Tyler Baker <tyler.baker@linaro.org>
5 * Chen-Yu Tsai <wens@csie.org>
6 *
7 * This file is dual-licensed: you can use it either under the terms
8 * of the GPL or the X11 license, at your option. Note that this dual
9 * licensing only applies to this file, and not this project as a
10 * whole.
11 *
12 * a) This file is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of the
15 * License, or (at your option) any later version.
16 *
17 * This file is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * Or, alternatively,
23 *
24 * b) Permission is hereby granted, free of charge, to any person
25 * obtaining a copy of this software and associated documentation
26 * files (the "Software"), to deal in the Software without
27 * restriction, including without limitation the rights to use,
28 * copy, modify, merge, publish, distribute, sublicense, and/or
29 * sell copies of the Software, and to permit persons to whom the
30 * Software is furnished to do so, subject to the following
31 * conditions:
32 *
33 * The above copyright notice and this permission notice shall be
34 * included in all copies or substantial portions of the Software.
35 *
36 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
37 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
38 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
39 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
40 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
41 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
42 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
43 * OTHER DEALINGS IN THE SOFTWARE.
44 */
45
46/dts-v1/;
47#include "sun9i-a80.dtsi"
48
49#include <dt-bindings/gpio/gpio.h>
50
51/ {
52 model = "Cubietech Cubieboard4";
53 compatible = "cubietech,a80-cubieboard4", "allwinner,sun9i-a80";
54
55 aliases {
56 serial0 = &uart0;
57 };
58
59 chosen {
60 stdout-path = "serial0:115200n8";
61 };
62
63 leds {
64 compatible = "gpio-leds";
65
66 green {
67 label = "cubieboard4:green:usr";
68 gpios = <&pio 7 17 GPIO_ACTIVE_HIGH>; /* PH17 */
69 };
70
71 red {
72 label = "cubieboard4:red:usr";
73 gpios = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */
74 };
75 };
76
77 vga-connector {
78 compatible = "vga-connector";
79 label = "vga";
80 ddc-i2c-bus = <&i2c3>;
81
82 port {
83 vga_con_in: endpoint {
84 remote-endpoint = <&vga_dac_out>;
85 };
86 };
87 };
88
89 vga-dac {
90 compatible = "corpro,gm7123", "adi,adv7123", "dumb-vga-dac";
91 vdd-supply = <®_dcdc1>;
92
93 ports {
94 #address-cells = <1>;
95 #size-cells = <0>;
96
97 port@0 {
98 reg = <0>;
99
100 vga_dac_in: endpoint {
101 remote-endpoint = <&tcon0_out_vga>;
102 };
103 };
104
105 port@1 {
106 reg = <1>;
107
108 vga_dac_out: endpoint {
109 remote-endpoint = <&vga_con_in>;
110 };
111 };
112 };
113 };
114
115 wifi_pwrseq: wifi-pwrseq {
116 compatible = "mmc-pwrseq-simple";
117 clocks = <&ac100_rtc 1>;
118 clock-names = "ext_clock";
119 /* enables internal regulator and de-asserts reset */
120 reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 WL-PMU-EN */
121 };
122};
123
124&de {
125 status = "okay";
126};
127
128&gmac {
129 pinctrl-names = "default";
130 pinctrl-0 = <&gmac_rgmii_pins>;
131 phy = <&phy1>;
132 phy-mode = "rgmii";
133 phy-supply = <®_cldo1>;
134 status = "okay";
135
136 phy1: ethernet-phy@1 {
137 reg = <1>;
138 };
139};
140
141&i2c3 {
142 pinctrl-names = "default";
143 pinctrl-0 = <&i2c3_pins>;
144 status = "okay";
145};
146
147&mmc0 {
148 pinctrl-names = "default";
149 pinctrl-0 = <&mmc0_pins>;
150 vmmc-supply = <®_dcdc1>;
151 bus-width = <4>;
152 cd-gpios = <&pio 7 18 GPIO_ACTIVE_LOW>; /* PH18 */
153 status = "okay";
154};
155
156&mmc1 {
157 pinctrl-names = "default";
158 pinctrl-0 = <&mmc1_pins>;
159 vmmc-supply = <®_dldo1>;
160 vqmmc-supply = <®_cldo3>;
161 mmc-pwrseq = <&wifi_pwrseq>;
162 bus-width = <4>;
163 non-removable;
164 status = "okay";
165};
166
167&mmc1_pins {
168 bias-pull-up;
169};
170
171&mmc2 {
172 pinctrl-names = "default";
173 pinctrl-0 = <&mmc2_8bit_pins>;
174 vmmc-supply = <®_dcdc1>;
175 bus-width = <8>;
176 non-removable;
177 cap-mmc-hw-reset;
178 status = "okay";
179};
180
181&mmc2_8bit_pins {
182 /* Increase drive strength for DDR modes */
183 drive-strength = <40>;
184};
185
186&osc32k {
187 /* osc32k input is from AC100 */
188 clocks = <&ac100_rtc 0>;
189};
190
191&pio {
192 vcc-pa-supply = <®_ldo_io1>;
193 vcc-pb-supply = <®_aldo2>;
194 vcc-pc-supply = <®_dcdc1>;
195 vcc-pd-supply = <®_dc1sw>;
196 vcc-pe-supply = <®_eldo2>;
197 vcc-pf-supply = <®_dcdc1>;
198 vcc-pg-supply = <®_ldo_io0>;
199 vcc-ph-supply = <®_dcdc1>;
200};
201
202&r_ir {
203 status = "okay";
204};
205
206&r_pio {
207 vcc-pl-supply = <®_dldo2>;
208 vcc-pm-supply = <®_eldo3>;
209};
210
211&r_rsb {
212 status = "okay";
213
214 axp809: pmic@3a3 {
215 reg = <0x3a3>;
216 interrupt-parent = <&nmi_intc>;
217 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
218
219 regulators {
220 reg_aldo1: aldo1 {
221 /*
222 * TODO: This should be handled by the
223 * USB PHY driver.
224 */
225 regulator-always-on;
226 regulator-min-microvolt = <3000000>;
227 regulator-max-microvolt = <3000000>;
228 regulator-name = "vcc33-usbh";
229 };
230
231 reg_aldo2: aldo2 {
232 regulator-min-microvolt = <1800000>;
233 regulator-max-microvolt = <1800000>;
234 regulator-name = "vcc-pb-io-cam";
235 };
236
237 aldo3 {
238 /* unused */
239 };
240
241 reg_dc1sw: dc1sw {
242 regulator-name = "vcc-pd";
243 };
244
245 reg_dc5ldo: dc5ldo {
246 regulator-always-on;
247 regulator-min-microvolt = <800000>;
248 regulator-max-microvolt = <1100000>;
249 regulator-name = "vdd-cpus-09-usbh";
250 };
251
252 reg_dcdc1: dcdc1 {
253 regulator-always-on;
254 regulator-min-microvolt = <3000000>;
255 regulator-max-microvolt = <3000000>;
256 regulator-name = "vcc-3v";
257 };
258
259 reg_dcdc2: dcdc2 {
260 regulator-min-microvolt = <800000>;
261 regulator-max-microvolt = <1100000>;
262 regulator-name = "vdd-gpu";
263 };
264
265 reg_dcdc3: dcdc3 {
266 regulator-always-on;
267 regulator-min-microvolt = <800000>;
268 regulator-max-microvolt = <1100000>;
269 regulator-name = "vdd-cpua";
270 };
271
272 reg_dcdc4: dcdc4 {
273 regulator-always-on;
274 regulator-min-microvolt = <800000>;
275 regulator-max-microvolt = <1100000>;
276 regulator-name = "vdd-sys-usb0-hdmi";
277 };
278
279 reg_dcdc5: dcdc5 {
280 regulator-always-on;
281 regulator-min-microvolt = <1425000>;
282 regulator-max-microvolt = <1575000>;
283 regulator-name = "vcc-dram";
284 };
285
286 reg_dldo1: dldo1 {
287 /*
288 * The WiFi chip supports a wide range
289 * (3.0 ~ 4.8V) of voltages, and so does
290 * this regulator (3.0 ~ 4.2V), but
291 * Allwinner SDK always sets it to 3.3V.
292 */
293 regulator-min-microvolt = <3300000>;
294 regulator-max-microvolt = <3300000>;
295 regulator-name = "vcc-wifi";
296 };
297
298 reg_dldo2: dldo2 {
299 regulator-min-microvolt = <3000000>;
300 regulator-max-microvolt = <3000000>;
301 regulator-name = "vcc-pl";
302 };
303
304 reg_eldo1: eldo1 {
305 regulator-min-microvolt = <1200000>;
306 regulator-max-microvolt = <1200000>;
307 regulator-name = "vcc-dvdd-cam";
308 };
309
310 reg_eldo2: eldo2 {
311 regulator-min-microvolt = <1800000>;
312 regulator-max-microvolt = <1800000>;
313 regulator-name = "vcc-pe";
314 };
315
316 reg_eldo3: eldo3 {
317 regulator-min-microvolt = <3000000>;
318 regulator-max-microvolt = <3000000>;
319 regulator-name = "vcc-pm-codec-io1";
320 };
321
322 reg_ldo_io0: ldo_io0 {
323 regulator-min-microvolt = <3000000>;
324 regulator-max-microvolt = <3000000>;
325 regulator-name = "vcc-pg";
326 };
327
328 reg_ldo_io1: ldo_io1 {
329 regulator-min-microvolt = <2500000>;
330 regulator-max-microvolt = <2500000>;
331 regulator-name = "vcc-pa-gmac-2v5";
332 };
333
334 reg_rtc_ldo: rtc_ldo {
335 regulator-name = "vcc-rtc-vdd1v8-io";
336 };
337
338 sw {
339 /* unused */
340 };
341 };
342 };
343
344 axp806: pmic@745 {
345 compatible = "x-powers,axp806";
346 reg = <0x745>;
347 interrupt-parent = <&nmi_intc>;
348 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
349 interrupt-controller;
350 #interrupt-cells = <1>;
351 bldoin-supply = <®_dcdce>;
352
353 regulators {
354 reg_s_aldo1: aldo1 {
355 regulator-always-on;
356 regulator-min-microvolt = <3000000>;
357 regulator-max-microvolt = <3000000>;
358 regulator-name = "avcc";
359 };
360
361 aldo2 {
362 /*
363 * unused, but use a different name to
364 * avoid name clash with axp809's aldo's
365 */
366 regulator-name = "s_aldo2";
367 };
368
369 aldo3 {
370 /*
371 * unused, but use a different name to
372 * avoid name clash with axp809's aldo's
373 */
374 regulator-name = "s_aldo3";
375 };
376
377 reg_bldo1: bldo1 {
378 regulator-always-on;
379 regulator-min-microvolt = <1700000>;
380 regulator-max-microvolt = <1900000>;
381 regulator-name = "vcc18-efuse-adc-display-csi";
382 };
383
384 reg_bldo2: bldo2 {
385 regulator-always-on;
386 regulator-min-microvolt = <1700000>;
387 regulator-max-microvolt = <1900000>;
388 regulator-name =
389 "vdd18-drampll-vcc18-pll-cpvdd";
390 };
391
392 bldo3 {
393 /* unused */
394 };
395
396 reg_bldo4: bldo4 {
397 regulator-min-microvolt = <1100000>;
398 regulator-max-microvolt = <1300000>;
399 regulator-name = "vcc12-hsic";
400 };
401
402 reg_cldo1: cldo1 {
403 /*
404 * This was 3V in the original design, but
405 * 3.3V is the recommended supply voltage
406 * for the Ethernet PHY.
407 */
408 regulator-min-microvolt = <3300000>;
409 regulator-max-microvolt = <3300000>;
410 /*
411 * The PHY requires 20ms after all voltages
412 * are applied until core logic is ready and
413 * 30ms after the reset pin is de-asserted.
414 * Set a 100ms delay to account for PMIC
415 * ramp time and board traces.
416 */
417 regulator-enable-ramp-delay = <100000>;
418 regulator-name = "vcc-gmac-phy";
419 };
420
421 reg_cldo2: cldo2 {
422 regulator-min-microvolt = <2800000>;
423 regulator-max-microvolt = <2800000>;
424 regulator-name = "afvcc-cam";
425 };
426
427 reg_cldo3: cldo3 {
428 regulator-min-microvolt = <3000000>;
429 regulator-max-microvolt = <3000000>;
430 regulator-name = "vcc-io-wifi-codec-io2";
431 };
432
433 reg_dcdca: dcdca {
434 regulator-always-on;
435 regulator-min-microvolt = <800000>;
436 regulator-max-microvolt = <1100000>;
437 regulator-name = "vdd-cpub";
438 };
439
440 reg_dcdcd: dcdcd {
441 regulator-always-on;
442 regulator-min-microvolt = <800000>;
443 regulator-max-microvolt = <1100000>;
444 regulator-name = "vdd-vpu";
445 };
446
447 reg_dcdce: dcdce {
448 regulator-always-on;
449 regulator-min-microvolt = <2100000>;
450 regulator-max-microvolt = <2100000>;
451 regulator-name = "vcc-bldo-codec-ldoin";
452 };
453
454 sw {
455 /*
456 * unused, but use a different name to
457 * avoid name clash with axp809's sw
458 */
459 regulator-name = "s_sw";
460 };
461 };
462 };
463
464 ac100: codec@e89 {
465 compatible = "x-powers,ac100";
466 reg = <0xe89>;
467
468 ac100_codec: codec {
469 compatible = "x-powers,ac100-codec";
470 interrupt-parent = <&r_pio>;
471 interrupts = <0 9 IRQ_TYPE_LEVEL_LOW>; /* PL9 */
472 #clock-cells = <0>;
473 clock-output-names = "4M_adda";
474 };
475
476 ac100_rtc: rtc {
477 compatible = "x-powers,ac100-rtc";
478 interrupt-parent = <&nmi_intc>;
479 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
480 clocks = <&ac100_codec>;
481 #clock-cells = <1>;
482 clock-output-names = "cko1_rtc",
483 "cko2_rtc",
484 "cko3_rtc";
485 };
486 };
487};
488
489#include "axp809.dtsi"
490
491&tcon0 {
492 pinctrl-names = "default";
493 pinctrl-0 = <&lcd0_rgb888_pins>;
494};
495
496&tcon0_out {
497 tcon0_out_vga: endpoint {
498 remote-endpoint = <&vga_dac_in>;
499 };
500};
501
502&uart0 {
503 pinctrl-names = "default";
504 pinctrl-0 = <&uart0_ph_pins>;
505 status = "okay";
506};