Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/*
2 * AD5446 SPI DAC driver
3 *
4 * Copyright 2010 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9#include <linux/interrupt.h>
10#include <linux/workqueue.h>
11#include <linux/device.h>
12#include <linux/kernel.h>
13#include <linux/slab.h>
14#include <linux/sysfs.h>
15#include <linux/list.h>
16#include <linux/spi/spi.h>
17#include <linux/i2c.h>
18#include <linux/regulator/consumer.h>
19#include <linux/err.h>
20#include <linux/module.h>
21
22#include <linux/iio/iio.h>
23#include <linux/iio/sysfs.h>
24
25#define MODE_PWRDWN_1k 0x1
26#define MODE_PWRDWN_100k 0x2
27#define MODE_PWRDWN_TRISTATE 0x3
28
29/**
30 * struct ad5446_state - driver instance specific data
31 * @spi: spi_device
32 * @chip_info: chip model specific constants, available modes etc
33 * @reg: supply regulator
34 * @vref_mv: actual reference voltage used
35 */
36
37struct ad5446_state {
38 struct device *dev;
39 const struct ad5446_chip_info *chip_info;
40 struct regulator *reg;
41 unsigned short vref_mv;
42 unsigned cached_val;
43 unsigned pwr_down_mode;
44 unsigned pwr_down;
45};
46
47/**
48 * struct ad5446_chip_info - chip specific information
49 * @channel: channel spec for the DAC
50 * @int_vref_mv: AD5620/40/60: the internal reference voltage
51 * @write: chip specific helper function to write to the register
52 */
53
54struct ad5446_chip_info {
55 struct iio_chan_spec channel;
56 u16 int_vref_mv;
57 int (*write)(struct ad5446_state *st, unsigned val);
58};
59
60static const char * const ad5446_powerdown_modes[] = {
61 "1kohm_to_gnd", "100kohm_to_gnd", "three_state"
62};
63
64static int ad5446_set_powerdown_mode(struct iio_dev *indio_dev,
65 const struct iio_chan_spec *chan, unsigned int mode)
66{
67 struct ad5446_state *st = iio_priv(indio_dev);
68
69 st->pwr_down_mode = mode + 1;
70
71 return 0;
72}
73
74static int ad5446_get_powerdown_mode(struct iio_dev *indio_dev,
75 const struct iio_chan_spec *chan)
76{
77 struct ad5446_state *st = iio_priv(indio_dev);
78
79 return st->pwr_down_mode - 1;
80}
81
82static const struct iio_enum ad5446_powerdown_mode_enum = {
83 .items = ad5446_powerdown_modes,
84 .num_items = ARRAY_SIZE(ad5446_powerdown_modes),
85 .get = ad5446_get_powerdown_mode,
86 .set = ad5446_set_powerdown_mode,
87};
88
89static ssize_t ad5446_read_dac_powerdown(struct iio_dev *indio_dev,
90 uintptr_t private,
91 const struct iio_chan_spec *chan,
92 char *buf)
93{
94 struct ad5446_state *st = iio_priv(indio_dev);
95
96 return sprintf(buf, "%d\n", st->pwr_down);
97}
98
99static ssize_t ad5446_write_dac_powerdown(struct iio_dev *indio_dev,
100 uintptr_t private,
101 const struct iio_chan_spec *chan,
102 const char *buf, size_t len)
103{
104 struct ad5446_state *st = iio_priv(indio_dev);
105 unsigned int shift;
106 unsigned int val;
107 bool powerdown;
108 int ret;
109
110 ret = strtobool(buf, &powerdown);
111 if (ret)
112 return ret;
113
114 mutex_lock(&indio_dev->mlock);
115 st->pwr_down = powerdown;
116
117 if (st->pwr_down) {
118 shift = chan->scan_type.realbits + chan->scan_type.shift;
119 val = st->pwr_down_mode << shift;
120 } else {
121 val = st->cached_val;
122 }
123
124 ret = st->chip_info->write(st, val);
125 mutex_unlock(&indio_dev->mlock);
126
127 return ret ? ret : len;
128}
129
130static const struct iio_chan_spec_ext_info ad5446_ext_info_powerdown[] = {
131 {
132 .name = "powerdown",
133 .read = ad5446_read_dac_powerdown,
134 .write = ad5446_write_dac_powerdown,
135 .shared = IIO_SEPARATE,
136 },
137 IIO_ENUM("powerdown_mode", IIO_SEPARATE, &ad5446_powerdown_mode_enum),
138 IIO_ENUM_AVAILABLE("powerdown_mode", &ad5446_powerdown_mode_enum),
139 { },
140};
141
142#define _AD5446_CHANNEL(bits, storage, _shift, ext) { \
143 .type = IIO_VOLTAGE, \
144 .indexed = 1, \
145 .output = 1, \
146 .channel = 0, \
147 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
148 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
149 .scan_type = { \
150 .sign = 'u', \
151 .realbits = (bits), \
152 .storagebits = (storage), \
153 .shift = (_shift), \
154 }, \
155 .ext_info = (ext), \
156}
157
158#define AD5446_CHANNEL(bits, storage, shift) \
159 _AD5446_CHANNEL(bits, storage, shift, NULL)
160
161#define AD5446_CHANNEL_POWERDOWN(bits, storage, shift) \
162 _AD5446_CHANNEL(bits, storage, shift, ad5446_ext_info_powerdown)
163
164static int ad5446_read_raw(struct iio_dev *indio_dev,
165 struct iio_chan_spec const *chan,
166 int *val,
167 int *val2,
168 long m)
169{
170 struct ad5446_state *st = iio_priv(indio_dev);
171
172 switch (m) {
173 case IIO_CHAN_INFO_RAW:
174 *val = st->cached_val;
175 return IIO_VAL_INT;
176 case IIO_CHAN_INFO_SCALE:
177 *val = st->vref_mv;
178 *val2 = chan->scan_type.realbits;
179 return IIO_VAL_FRACTIONAL_LOG2;
180 }
181 return -EINVAL;
182}
183
184static int ad5446_write_raw(struct iio_dev *indio_dev,
185 struct iio_chan_spec const *chan,
186 int val,
187 int val2,
188 long mask)
189{
190 struct ad5446_state *st = iio_priv(indio_dev);
191 int ret = 0;
192
193 switch (mask) {
194 case IIO_CHAN_INFO_RAW:
195 if (val >= (1 << chan->scan_type.realbits) || val < 0)
196 return -EINVAL;
197
198 val <<= chan->scan_type.shift;
199 mutex_lock(&indio_dev->mlock);
200 st->cached_val = val;
201 if (!st->pwr_down)
202 ret = st->chip_info->write(st, val);
203 mutex_unlock(&indio_dev->mlock);
204 break;
205 default:
206 ret = -EINVAL;
207 }
208
209 return ret;
210}
211
212static const struct iio_info ad5446_info = {
213 .read_raw = ad5446_read_raw,
214 .write_raw = ad5446_write_raw,
215};
216
217static int ad5446_probe(struct device *dev, const char *name,
218 const struct ad5446_chip_info *chip_info)
219{
220 struct ad5446_state *st;
221 struct iio_dev *indio_dev;
222 struct regulator *reg;
223 int ret, voltage_uv = 0;
224
225 reg = devm_regulator_get(dev, "vcc");
226 if (!IS_ERR(reg)) {
227 ret = regulator_enable(reg);
228 if (ret)
229 return ret;
230
231 ret = regulator_get_voltage(reg);
232 if (ret < 0)
233 goto error_disable_reg;
234
235 voltage_uv = ret;
236 }
237
238 indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
239 if (indio_dev == NULL) {
240 ret = -ENOMEM;
241 goto error_disable_reg;
242 }
243 st = iio_priv(indio_dev);
244 st->chip_info = chip_info;
245
246 dev_set_drvdata(dev, indio_dev);
247 st->reg = reg;
248 st->dev = dev;
249
250 /* Establish that the iio_dev is a child of the device */
251 indio_dev->dev.parent = dev;
252 indio_dev->name = name;
253 indio_dev->info = &ad5446_info;
254 indio_dev->modes = INDIO_DIRECT_MODE;
255 indio_dev->channels = &st->chip_info->channel;
256 indio_dev->num_channels = 1;
257
258 st->pwr_down_mode = MODE_PWRDWN_1k;
259
260 if (st->chip_info->int_vref_mv)
261 st->vref_mv = st->chip_info->int_vref_mv;
262 else if (voltage_uv)
263 st->vref_mv = voltage_uv / 1000;
264 else
265 dev_warn(dev, "reference voltage unspecified\n");
266
267 ret = iio_device_register(indio_dev);
268 if (ret)
269 goto error_disable_reg;
270
271 return 0;
272
273error_disable_reg:
274 if (!IS_ERR(reg))
275 regulator_disable(reg);
276 return ret;
277}
278
279static int ad5446_remove(struct device *dev)
280{
281 struct iio_dev *indio_dev = dev_get_drvdata(dev);
282 struct ad5446_state *st = iio_priv(indio_dev);
283
284 iio_device_unregister(indio_dev);
285 if (!IS_ERR(st->reg))
286 regulator_disable(st->reg);
287
288 return 0;
289}
290
291#if IS_ENABLED(CONFIG_SPI_MASTER)
292
293static int ad5446_write(struct ad5446_state *st, unsigned val)
294{
295 struct spi_device *spi = to_spi_device(st->dev);
296 __be16 data = cpu_to_be16(val);
297
298 return spi_write(spi, &data, sizeof(data));
299}
300
301static int ad5660_write(struct ad5446_state *st, unsigned val)
302{
303 struct spi_device *spi = to_spi_device(st->dev);
304 uint8_t data[3];
305
306 data[0] = (val >> 16) & 0xFF;
307 data[1] = (val >> 8) & 0xFF;
308 data[2] = val & 0xFF;
309
310 return spi_write(spi, data, sizeof(data));
311}
312
313/**
314 * ad5446_supported_spi_device_ids:
315 * The AD5620/40/60 parts are available in different fixed internal reference
316 * voltage options. The actual part numbers may look differently
317 * (and a bit cryptic), however this style is used to make clear which
318 * parts are supported here.
319 */
320enum ad5446_supported_spi_device_ids {
321 ID_AD5300,
322 ID_AD5310,
323 ID_AD5320,
324 ID_AD5444,
325 ID_AD5446,
326 ID_AD5450,
327 ID_AD5451,
328 ID_AD5541A,
329 ID_AD5512A,
330 ID_AD5553,
331 ID_AD5601,
332 ID_AD5611,
333 ID_AD5621,
334 ID_AD5641,
335 ID_AD5620_2500,
336 ID_AD5620_1250,
337 ID_AD5640_2500,
338 ID_AD5640_1250,
339 ID_AD5660_2500,
340 ID_AD5660_1250,
341 ID_AD5662,
342};
343
344static const struct ad5446_chip_info ad5446_spi_chip_info[] = {
345 [ID_AD5300] = {
346 .channel = AD5446_CHANNEL_POWERDOWN(8, 16, 4),
347 .write = ad5446_write,
348 },
349 [ID_AD5310] = {
350 .channel = AD5446_CHANNEL_POWERDOWN(10, 16, 2),
351 .write = ad5446_write,
352 },
353 [ID_AD5320] = {
354 .channel = AD5446_CHANNEL_POWERDOWN(12, 16, 0),
355 .write = ad5446_write,
356 },
357 [ID_AD5444] = {
358 .channel = AD5446_CHANNEL(12, 16, 2),
359 .write = ad5446_write,
360 },
361 [ID_AD5446] = {
362 .channel = AD5446_CHANNEL(14, 16, 0),
363 .write = ad5446_write,
364 },
365 [ID_AD5450] = {
366 .channel = AD5446_CHANNEL(8, 16, 6),
367 .write = ad5446_write,
368 },
369 [ID_AD5451] = {
370 .channel = AD5446_CHANNEL(10, 16, 4),
371 .write = ad5446_write,
372 },
373 [ID_AD5541A] = {
374 .channel = AD5446_CHANNEL(16, 16, 0),
375 .write = ad5446_write,
376 },
377 [ID_AD5512A] = {
378 .channel = AD5446_CHANNEL(12, 16, 4),
379 .write = ad5446_write,
380 },
381 [ID_AD5553] = {
382 .channel = AD5446_CHANNEL(14, 16, 0),
383 .write = ad5446_write,
384 },
385 [ID_AD5601] = {
386 .channel = AD5446_CHANNEL_POWERDOWN(8, 16, 6),
387 .write = ad5446_write,
388 },
389 [ID_AD5611] = {
390 .channel = AD5446_CHANNEL_POWERDOWN(10, 16, 4),
391 .write = ad5446_write,
392 },
393 [ID_AD5621] = {
394 .channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
395 .write = ad5446_write,
396 },
397 [ID_AD5641] = {
398 .channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
399 .write = ad5446_write,
400 },
401 [ID_AD5620_2500] = {
402 .channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
403 .int_vref_mv = 2500,
404 .write = ad5446_write,
405 },
406 [ID_AD5620_1250] = {
407 .channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
408 .int_vref_mv = 1250,
409 .write = ad5446_write,
410 },
411 [ID_AD5640_2500] = {
412 .channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
413 .int_vref_mv = 2500,
414 .write = ad5446_write,
415 },
416 [ID_AD5640_1250] = {
417 .channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
418 .int_vref_mv = 1250,
419 .write = ad5446_write,
420 },
421 [ID_AD5660_2500] = {
422 .channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
423 .int_vref_mv = 2500,
424 .write = ad5660_write,
425 },
426 [ID_AD5660_1250] = {
427 .channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
428 .int_vref_mv = 1250,
429 .write = ad5660_write,
430 },
431 [ID_AD5662] = {
432 .channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
433 .write = ad5660_write,
434 },
435};
436
437static const struct spi_device_id ad5446_spi_ids[] = {
438 {"ad5300", ID_AD5300},
439 {"ad5310", ID_AD5310},
440 {"ad5320", ID_AD5320},
441 {"ad5444", ID_AD5444},
442 {"ad5446", ID_AD5446},
443 {"ad5450", ID_AD5450},
444 {"ad5451", ID_AD5451},
445 {"ad5452", ID_AD5444}, /* ad5452 is compatible to the ad5444 */
446 {"ad5453", ID_AD5446}, /* ad5453 is compatible to the ad5446 */
447 {"ad5512a", ID_AD5512A},
448 {"ad5541a", ID_AD5541A},
449 {"ad5542a", ID_AD5541A}, /* ad5541a and ad5542a are compatible */
450 {"ad5543", ID_AD5541A}, /* ad5541a and ad5543 are compatible */
451 {"ad5553", ID_AD5553},
452 {"ad5601", ID_AD5601},
453 {"ad5611", ID_AD5611},
454 {"ad5621", ID_AD5621},
455 {"ad5641", ID_AD5641},
456 {"ad5620-2500", ID_AD5620_2500}, /* AD5620/40/60: */
457 {"ad5620-1250", ID_AD5620_1250}, /* part numbers may look differently */
458 {"ad5640-2500", ID_AD5640_2500},
459 {"ad5640-1250", ID_AD5640_1250},
460 {"ad5660-2500", ID_AD5660_2500},
461 {"ad5660-1250", ID_AD5660_1250},
462 {"ad5662", ID_AD5662},
463 {"dac081s101", ID_AD5300}, /* compatible Texas Instruments chips */
464 {"dac101s101", ID_AD5310},
465 {"dac121s101", ID_AD5320},
466 {"dac7512", ID_AD5320},
467 {}
468};
469MODULE_DEVICE_TABLE(spi, ad5446_spi_ids);
470
471#ifdef CONFIG_OF
472static const struct of_device_id ad5446_of_ids[] = {
473 { .compatible = "ti,dac7512" },
474 { }
475};
476MODULE_DEVICE_TABLE(of, ad5446_of_ids);
477#endif
478
479static int ad5446_spi_probe(struct spi_device *spi)
480{
481 const struct spi_device_id *id = spi_get_device_id(spi);
482
483 return ad5446_probe(&spi->dev, id->name,
484 &ad5446_spi_chip_info[id->driver_data]);
485}
486
487static int ad5446_spi_remove(struct spi_device *spi)
488{
489 return ad5446_remove(&spi->dev);
490}
491
492static struct spi_driver ad5446_spi_driver = {
493 .driver = {
494 .name = "ad5446",
495 .of_match_table = of_match_ptr(ad5446_of_ids),
496 },
497 .probe = ad5446_spi_probe,
498 .remove = ad5446_spi_remove,
499 .id_table = ad5446_spi_ids,
500};
501
502static int __init ad5446_spi_register_driver(void)
503{
504 return spi_register_driver(&ad5446_spi_driver);
505}
506
507static void ad5446_spi_unregister_driver(void)
508{
509 spi_unregister_driver(&ad5446_spi_driver);
510}
511
512#else
513
514static inline int ad5446_spi_register_driver(void) { return 0; }
515static inline void ad5446_spi_unregister_driver(void) { }
516
517#endif
518
519#if IS_ENABLED(CONFIG_I2C)
520
521static int ad5622_write(struct ad5446_state *st, unsigned val)
522{
523 struct i2c_client *client = to_i2c_client(st->dev);
524 __be16 data = cpu_to_be16(val);
525
526 return i2c_master_send(client, (char *)&data, sizeof(data));
527}
528
529/**
530 * ad5446_supported_i2c_device_ids:
531 * The AD5620/40/60 parts are available in different fixed internal reference
532 * voltage options. The actual part numbers may look differently
533 * (and a bit cryptic), however this style is used to make clear which
534 * parts are supported here.
535 */
536enum ad5446_supported_i2c_device_ids {
537 ID_AD5602,
538 ID_AD5612,
539 ID_AD5622,
540};
541
542static const struct ad5446_chip_info ad5446_i2c_chip_info[] = {
543 [ID_AD5602] = {
544 .channel = AD5446_CHANNEL_POWERDOWN(8, 16, 4),
545 .write = ad5622_write,
546 },
547 [ID_AD5612] = {
548 .channel = AD5446_CHANNEL_POWERDOWN(10, 16, 2),
549 .write = ad5622_write,
550 },
551 [ID_AD5622] = {
552 .channel = AD5446_CHANNEL_POWERDOWN(12, 16, 0),
553 .write = ad5622_write,
554 },
555};
556
557static int ad5446_i2c_probe(struct i2c_client *i2c,
558 const struct i2c_device_id *id)
559{
560 return ad5446_probe(&i2c->dev, id->name,
561 &ad5446_i2c_chip_info[id->driver_data]);
562}
563
564static int ad5446_i2c_remove(struct i2c_client *i2c)
565{
566 return ad5446_remove(&i2c->dev);
567}
568
569static const struct i2c_device_id ad5446_i2c_ids[] = {
570 {"ad5301", ID_AD5602},
571 {"ad5311", ID_AD5612},
572 {"ad5321", ID_AD5622},
573 {"ad5602", ID_AD5602},
574 {"ad5612", ID_AD5612},
575 {"ad5622", ID_AD5622},
576 {}
577};
578MODULE_DEVICE_TABLE(i2c, ad5446_i2c_ids);
579
580static struct i2c_driver ad5446_i2c_driver = {
581 .driver = {
582 .name = "ad5446",
583 },
584 .probe = ad5446_i2c_probe,
585 .remove = ad5446_i2c_remove,
586 .id_table = ad5446_i2c_ids,
587};
588
589static int __init ad5446_i2c_register_driver(void)
590{
591 return i2c_add_driver(&ad5446_i2c_driver);
592}
593
594static void __exit ad5446_i2c_unregister_driver(void)
595{
596 i2c_del_driver(&ad5446_i2c_driver);
597}
598
599#else
600
601static inline int ad5446_i2c_register_driver(void) { return 0; }
602static inline void ad5446_i2c_unregister_driver(void) { }
603
604#endif
605
606static int __init ad5446_init(void)
607{
608 int ret;
609
610 ret = ad5446_spi_register_driver();
611 if (ret)
612 return ret;
613
614 ret = ad5446_i2c_register_driver();
615 if (ret) {
616 ad5446_spi_unregister_driver();
617 return ret;
618 }
619
620 return 0;
621}
622module_init(ad5446_init);
623
624static void __exit ad5446_exit(void)
625{
626 ad5446_i2c_unregister_driver();
627 ad5446_spi_unregister_driver();
628}
629module_exit(ad5446_exit);
630
631MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
632MODULE_DESCRIPTION("Analog Devices AD5444/AD5446 DAC");
633MODULE_LICENSE("GPL v2");