tjh.dev
Linux kernel mirror (for testing)
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1/* SPDX-License-Identifier: GPL-2.0-or-later */
2/*
3 * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation
4 * Rewrite, cleanup:
5 * Copyright (C) 2004 Olof Johansson <olof@lixom.net>, IBM Corporation
6 */
7
8#ifndef _ASM_IOMMU_H
9#define _ASM_IOMMU_H
10#ifdef __KERNEL__
11
12#include <linux/compiler.h>
13#include <linux/spinlock.h>
14#include <linux/device.h>
15#include <linux/dma-map-ops.h>
16#include <linux/bitops.h>
17#include <asm/machdep.h>
18#include <asm/types.h>
19#include <asm/pci-bridge.h>
20#include <asm/asm-const.h>
21
22#define IOMMU_PAGE_SHIFT_4K 12
23#define IOMMU_PAGE_SIZE_4K (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K)
24#define IOMMU_PAGE_MASK_4K (~((1 << IOMMU_PAGE_SHIFT_4K) - 1))
25#define IOMMU_PAGE_ALIGN_4K(addr) ALIGN(addr, IOMMU_PAGE_SIZE_4K)
26
27#define IOMMU_PAGE_SIZE(tblptr) (ASM_CONST(1) << (tblptr)->it_page_shift)
28#define IOMMU_PAGE_MASK(tblptr) (~((1 << (tblptr)->it_page_shift) - 1))
29#define IOMMU_PAGE_ALIGN(addr, tblptr) ALIGN(addr, IOMMU_PAGE_SIZE(tblptr))
30
31/* Boot time flags */
32extern int iommu_is_off;
33extern int iommu_force_on;
34
35struct iommu_table_ops {
36 /*
37 * When called with direction==DMA_NONE, it is equal to clear().
38 * uaddr is a linear map address.
39 */
40 int (*set)(struct iommu_table *tbl,
41 long index, long npages,
42 unsigned long uaddr,
43 enum dma_data_direction direction,
44 unsigned long attrs);
45#ifdef CONFIG_IOMMU_API
46 /*
47 * Exchanges existing TCE with new TCE plus direction bits;
48 * returns old TCE and DMA direction mask.
49 * @tce is a physical address.
50 */
51 int (*xchg_no_kill)(struct iommu_table *tbl,
52 long index,
53 unsigned long *hpa,
54 enum dma_data_direction *direction);
55
56 void (*tce_kill)(struct iommu_table *tbl,
57 unsigned long index,
58 unsigned long pages);
59
60 __be64 *(*useraddrptr)(struct iommu_table *tbl, long index, bool alloc);
61#endif
62 void (*clear)(struct iommu_table *tbl,
63 long index, long npages);
64 /* get() returns a physical address */
65 unsigned long (*get)(struct iommu_table *tbl, long index);
66 void (*flush)(struct iommu_table *tbl);
67 void (*free)(struct iommu_table *tbl);
68};
69
70/* These are used by VIO */
71extern struct iommu_table_ops iommu_table_lpar_multi_ops;
72extern struct iommu_table_ops iommu_table_pseries_ops;
73
74/*
75 * IOMAP_MAX_ORDER defines the largest contiguous block
76 * of dma space we can get. IOMAP_MAX_ORDER = 13
77 * allows up to 2**12 pages (4096 * 4096) = 16 MB
78 */
79#define IOMAP_MAX_ORDER 13
80
81#define IOMMU_POOL_HASHBITS 2
82#define IOMMU_NR_POOLS (1 << IOMMU_POOL_HASHBITS)
83
84struct iommu_pool {
85 unsigned long start;
86 unsigned long end;
87 unsigned long hint;
88 spinlock_t lock;
89} ____cacheline_aligned_in_smp;
90
91struct iommu_table {
92 unsigned long it_busno; /* Bus number this table belongs to */
93 unsigned long it_size; /* Size of iommu table in entries */
94 unsigned long it_indirect_levels;
95 unsigned long it_level_size;
96 unsigned long it_allocated_size;
97 unsigned long it_offset; /* Offset into global table */
98 unsigned long it_base; /* mapped address of tce table */
99 unsigned long it_index; /* which iommu table this is */
100 unsigned long it_type; /* type: PCI or Virtual Bus */
101 unsigned long it_blocksize; /* Entries in each block (cacheline) */
102 unsigned long poolsize;
103 unsigned long nr_pools;
104 struct iommu_pool large_pool;
105 struct iommu_pool pools[IOMMU_NR_POOLS];
106 unsigned long *it_map; /* A simple allocation bitmap for now */
107 unsigned long it_page_shift;/* table iommu page size */
108 struct list_head it_group_list;/* List of iommu_table_group_link */
109 __be64 *it_userspace; /* userspace view of the table */
110 struct iommu_table_ops *it_ops;
111 struct kref it_kref;
112 int it_nid;
113 unsigned long it_reserved_start; /* Start of not-DMA-able (MMIO) area */
114 unsigned long it_reserved_end;
115};
116
117#define IOMMU_TABLE_USERSPACE_ENTRY_RO(tbl, entry) \
118 ((tbl)->it_ops->useraddrptr((tbl), (entry), false))
119#define IOMMU_TABLE_USERSPACE_ENTRY(tbl, entry) \
120 ((tbl)->it_ops->useraddrptr((tbl), (entry), true))
121
122/* Pure 2^n version of get_order */
123static inline __attribute_const__
124int get_iommu_order(unsigned long size, struct iommu_table *tbl)
125{
126 return __ilog2((size - 1) >> tbl->it_page_shift) + 1;
127}
128
129
130struct scatterlist;
131
132#ifdef CONFIG_PPC64
133
134static inline void set_iommu_table_base(struct device *dev,
135 struct iommu_table *base)
136{
137 dev->archdata.iommu_table_base = base;
138}
139
140static inline void *get_iommu_table_base(struct device *dev)
141{
142 return dev->archdata.iommu_table_base;
143}
144
145extern int dma_iommu_dma_supported(struct device *dev, u64 mask);
146
147extern struct iommu_table *iommu_tce_table_get(struct iommu_table *tbl);
148extern int iommu_tce_table_put(struct iommu_table *tbl);
149
150/* Initializes an iommu_table based in values set in the passed-in
151 * structure
152 */
153extern struct iommu_table *iommu_init_table(struct iommu_table *tbl,
154 int nid, unsigned long res_start, unsigned long res_end);
155bool iommu_table_in_use(struct iommu_table *tbl);
156
157#define IOMMU_TABLE_GROUP_MAX_TABLES 2
158
159struct iommu_table_group;
160
161struct iommu_table_group_ops {
162 unsigned long (*get_table_size)(
163 __u32 page_shift,
164 __u64 window_size,
165 __u32 levels);
166 long (*create_table)(struct iommu_table_group *table_group,
167 int num,
168 __u32 page_shift,
169 __u64 window_size,
170 __u32 levels,
171 struct iommu_table **ptbl);
172 long (*set_window)(struct iommu_table_group *table_group,
173 int num,
174 struct iommu_table *tblnew);
175 long (*unset_window)(struct iommu_table_group *table_group,
176 int num);
177 /* Switch ownership from platform code to external user (e.g. VFIO) */
178 void (*take_ownership)(struct iommu_table_group *table_group);
179 /* Switch ownership from external user (e.g. VFIO) back to core */
180 void (*release_ownership)(struct iommu_table_group *table_group);
181};
182
183struct iommu_table_group_link {
184 struct list_head next;
185 struct rcu_head rcu;
186 struct iommu_table_group *table_group;
187};
188
189struct iommu_table_group {
190 /* IOMMU properties */
191 __u32 tce32_start;
192 __u32 tce32_size;
193 __u64 pgsizes; /* Bitmap of supported page sizes */
194 __u32 max_dynamic_windows_supported;
195 __u32 max_levels;
196
197 struct iommu_group *group;
198 struct iommu_table *tables[IOMMU_TABLE_GROUP_MAX_TABLES];
199 struct iommu_table_group_ops *ops;
200};
201
202#ifdef CONFIG_IOMMU_API
203
204extern void iommu_register_group(struct iommu_table_group *table_group,
205 int pci_domain_number, unsigned long pe_num);
206extern int iommu_add_device(struct iommu_table_group *table_group,
207 struct device *dev);
208extern void iommu_del_device(struct device *dev);
209extern long iommu_tce_xchg(struct mm_struct *mm, struct iommu_table *tbl,
210 unsigned long entry, unsigned long *hpa,
211 enum dma_data_direction *direction);
212extern long iommu_tce_xchg_no_kill(struct mm_struct *mm,
213 struct iommu_table *tbl,
214 unsigned long entry, unsigned long *hpa,
215 enum dma_data_direction *direction);
216extern void iommu_tce_kill(struct iommu_table *tbl,
217 unsigned long entry, unsigned long pages);
218#else
219static inline void iommu_register_group(struct iommu_table_group *table_group,
220 int pci_domain_number,
221 unsigned long pe_num)
222{
223}
224
225static inline int iommu_add_device(struct iommu_table_group *table_group,
226 struct device *dev)
227{
228 return 0;
229}
230
231static inline void iommu_del_device(struct device *dev)
232{
233}
234#endif /* !CONFIG_IOMMU_API */
235
236u64 dma_iommu_get_required_mask(struct device *dev);
237#else
238
239static inline void *get_iommu_table_base(struct device *dev)
240{
241 return NULL;
242}
243
244static inline int dma_iommu_dma_supported(struct device *dev, u64 mask)
245{
246 return 0;
247}
248
249#endif /* CONFIG_PPC64 */
250
251extern int ppc_iommu_map_sg(struct device *dev, struct iommu_table *tbl,
252 struct scatterlist *sglist, int nelems,
253 unsigned long mask,
254 enum dma_data_direction direction,
255 unsigned long attrs);
256extern void ppc_iommu_unmap_sg(struct iommu_table *tbl,
257 struct scatterlist *sglist,
258 int nelems,
259 enum dma_data_direction direction,
260 unsigned long attrs);
261
262extern void *iommu_alloc_coherent(struct device *dev, struct iommu_table *tbl,
263 size_t size, dma_addr_t *dma_handle,
264 unsigned long mask, gfp_t flag, int node);
265extern void iommu_free_coherent(struct iommu_table *tbl, size_t size,
266 void *vaddr, dma_addr_t dma_handle);
267extern dma_addr_t iommu_map_page(struct device *dev, struct iommu_table *tbl,
268 struct page *page, unsigned long offset,
269 size_t size, unsigned long mask,
270 enum dma_data_direction direction,
271 unsigned long attrs);
272extern void iommu_unmap_page(struct iommu_table *tbl, dma_addr_t dma_handle,
273 size_t size, enum dma_data_direction direction,
274 unsigned long attrs);
275
276void __init iommu_init_early_pSeries(void);
277extern void iommu_init_early_dart(struct pci_controller_ops *controller_ops);
278extern void iommu_init_early_pasemi(void);
279
280#if defined(CONFIG_PPC64) && defined(CONFIG_PM)
281static inline void iommu_restore(void)
282{
283 if (ppc_md.iommu_restore)
284 ppc_md.iommu_restore();
285}
286#endif
287
288/* The API to support IOMMU operations for VFIO */
289extern int iommu_tce_check_ioba(unsigned long page_shift,
290 unsigned long offset, unsigned long size,
291 unsigned long ioba, unsigned long npages);
292extern int iommu_tce_check_gpa(unsigned long page_shift,
293 unsigned long gpa);
294
295#define iommu_tce_clear_param_check(tbl, ioba, tce_value, npages) \
296 (iommu_tce_check_ioba((tbl)->it_page_shift, \
297 (tbl)->it_offset, (tbl)->it_size, \
298 (ioba), (npages)) || (tce_value))
299#define iommu_tce_put_param_check(tbl, ioba, gpa) \
300 (iommu_tce_check_ioba((tbl)->it_page_shift, \
301 (tbl)->it_offset, (tbl)->it_size, \
302 (ioba), 1) || \
303 iommu_tce_check_gpa((tbl)->it_page_shift, (gpa)))
304
305extern void iommu_flush_tce(struct iommu_table *tbl);
306extern int iommu_take_ownership(struct iommu_table *tbl);
307extern void iommu_release_ownership(struct iommu_table *tbl);
308
309extern enum dma_data_direction iommu_tce_direction(unsigned long tce);
310extern unsigned long iommu_direction_to_tce_perm(enum dma_data_direction dir);
311
312#ifdef CONFIG_PPC_CELL_NATIVE
313extern bool iommu_fixed_is_weak;
314#else
315#define iommu_fixed_is_weak false
316#endif
317
318extern const struct dma_map_ops dma_iommu_ops;
319
320#endif /* __KERNEL__ */
321#endif /* _ASM_IOMMU_H */