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Linux kernel mirror (for testing)
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1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 *
4 * Copyright IBM Corp. 2007
5 *
6 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
7 */
8
9#ifndef __POWERPC_KVM_HOST_H__
10#define __POWERPC_KVM_HOST_H__
11
12#include <linux/mutex.h>
13#include <linux/hrtimer.h>
14#include <linux/interrupt.h>
15#include <linux/types.h>
16#include <linux/kvm_types.h>
17#include <linux/threads.h>
18#include <linux/spinlock.h>
19#include <linux/kvm_para.h>
20#include <linux/list.h>
21#include <linux/atomic.h>
22#include <asm/kvm_asm.h>
23#include <asm/processor.h>
24#include <asm/page.h>
25#include <asm/cacheflush.h>
26#include <asm/hvcall.h>
27#include <asm/mce.h>
28
29#define __KVM_HAVE_ARCH_VCPU_DEBUGFS
30
31#define KVM_MAX_VCPUS NR_CPUS
32#define KVM_MAX_VCORES NR_CPUS
33
34#include <asm/cputhreads.h>
35
36#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
37#include <asm/kvm_book3s_asm.h> /* for MAX_SMT_THREADS */
38#define KVM_MAX_VCPU_IDS (MAX_SMT_THREADS * KVM_MAX_VCORES)
39#define KVM_MAX_NESTED_GUESTS KVMPPC_NR_LPIDS
40
41#else
42#define KVM_MAX_VCPU_IDS KVM_MAX_VCPUS
43#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
44
45#define __KVM_HAVE_ARCH_INTC_INITIALIZED
46
47#define KVM_HALT_POLL_NS_DEFAULT 10000 /* 10 us */
48
49/* These values are internal and can be increased later */
50#define KVM_NR_IRQCHIPS 1
51#define KVM_IRQCHIP_NUM_PINS 256
52
53/* PPC-specific vcpu->requests bit members */
54#define KVM_REQ_WATCHDOG KVM_ARCH_REQ(0)
55#define KVM_REQ_EPR_EXIT KVM_ARCH_REQ(1)
56#define KVM_REQ_PENDING_TIMER KVM_ARCH_REQ(2)
57
58#include <linux/mmu_notifier.h>
59
60#define KVM_ARCH_WANT_MMU_NOTIFIER
61
62#define HPTEG_CACHE_NUM (1 << 15)
63#define HPTEG_HASH_BITS_PTE 13
64#define HPTEG_HASH_BITS_PTE_LONG 12
65#define HPTEG_HASH_BITS_VPTE 13
66#define HPTEG_HASH_BITS_VPTE_LONG 5
67#define HPTEG_HASH_BITS_VPTE_64K 11
68#define HPTEG_HASH_NUM_PTE (1 << HPTEG_HASH_BITS_PTE)
69#define HPTEG_HASH_NUM_PTE_LONG (1 << HPTEG_HASH_BITS_PTE_LONG)
70#define HPTEG_HASH_NUM_VPTE (1 << HPTEG_HASH_BITS_VPTE)
71#define HPTEG_HASH_NUM_VPTE_LONG (1 << HPTEG_HASH_BITS_VPTE_LONG)
72#define HPTEG_HASH_NUM_VPTE_64K (1 << HPTEG_HASH_BITS_VPTE_64K)
73
74/* Physical Address Mask - allowed range of real mode RAM access */
75#define KVM_PAM 0x0fffffffffffffffULL
76
77struct lppaca;
78struct slb_shadow;
79struct dtl_entry;
80
81struct kvmppc_vcpu_book3s;
82struct kvmppc_book3s_shadow_vcpu;
83struct kvm_nested_guest;
84
85struct kvm_vm_stat {
86 struct kvm_vm_stat_generic generic;
87 u64 num_2M_pages;
88 u64 num_1G_pages;
89};
90
91struct kvm_vcpu_stat {
92 struct kvm_vcpu_stat_generic generic;
93 u64 sum_exits;
94 u64 mmio_exits;
95 u64 signal_exits;
96 u64 light_exits;
97 /* Account for special types of light exits: */
98 u64 itlb_real_miss_exits;
99 u64 itlb_virt_miss_exits;
100 u64 dtlb_real_miss_exits;
101 u64 dtlb_virt_miss_exits;
102 u64 syscall_exits;
103 u64 isi_exits;
104 u64 dsi_exits;
105 u64 emulated_inst_exits;
106 u64 dec_exits;
107 u64 ext_intr_exits;
108 u64 halt_successful_wait;
109 u64 dbell_exits;
110 u64 gdbell_exits;
111 u64 ld;
112 u64 st;
113#ifdef CONFIG_PPC_BOOK3S
114 u64 pf_storage;
115 u64 pf_instruc;
116 u64 sp_storage;
117 u64 sp_instruc;
118 u64 queue_intr;
119 u64 ld_slow;
120 u64 st_slow;
121#endif
122 u64 pthru_all;
123 u64 pthru_host;
124 u64 pthru_bad_aff;
125};
126
127enum kvm_exit_types {
128 MMIO_EXITS,
129 SIGNAL_EXITS,
130 ITLB_REAL_MISS_EXITS,
131 ITLB_VIRT_MISS_EXITS,
132 DTLB_REAL_MISS_EXITS,
133 DTLB_VIRT_MISS_EXITS,
134 SYSCALL_EXITS,
135 ISI_EXITS,
136 DSI_EXITS,
137 EMULATED_INST_EXITS,
138 EMULATED_MTMSRWE_EXITS,
139 EMULATED_WRTEE_EXITS,
140 EMULATED_MTSPR_EXITS,
141 EMULATED_MFSPR_EXITS,
142 EMULATED_MTMSR_EXITS,
143 EMULATED_MFMSR_EXITS,
144 EMULATED_TLBSX_EXITS,
145 EMULATED_TLBWE_EXITS,
146 EMULATED_RFI_EXITS,
147 EMULATED_RFCI_EXITS,
148 EMULATED_RFDI_EXITS,
149 DEC_EXITS,
150 EXT_INTR_EXITS,
151 HALT_WAKEUP,
152 USR_PR_INST,
153 FP_UNAVAIL,
154 DEBUG_EXITS,
155 TIMEINGUEST,
156 DBELL_EXITS,
157 GDBELL_EXITS,
158 __NUMBER_OF_KVM_EXIT_TYPES
159};
160
161/* allow access to big endian 32bit upper/lower parts and 64bit var */
162struct kvmppc_exit_timing {
163 union {
164 u64 tv64;
165 struct {
166 u32 tbu, tbl;
167 } tv32;
168 };
169};
170
171struct kvmppc_pginfo {
172 unsigned long pfn;
173 atomic_t refcnt;
174};
175
176struct kvmppc_spapr_tce_iommu_table {
177 struct rcu_head rcu;
178 struct list_head next;
179 struct iommu_table *tbl;
180 struct kref kref;
181};
182
183#define TCES_PER_PAGE (PAGE_SIZE / sizeof(u64))
184
185struct kvmppc_spapr_tce_table {
186 struct list_head list;
187 struct kvm *kvm;
188 u64 liobn;
189 struct rcu_head rcu;
190 u32 page_shift;
191 u64 offset; /* in pages */
192 u64 size; /* window size in pages */
193 struct list_head iommu_tables;
194 struct mutex alloc_lock;
195 struct page *pages[];
196};
197
198/* XICS components, defined in book3s_xics.c */
199struct kvmppc_xics;
200struct kvmppc_icp;
201extern struct kvm_device_ops kvm_xics_ops;
202
203/* XIVE components, defined in book3s_xive.c */
204struct kvmppc_xive;
205struct kvmppc_xive_vcpu;
206extern struct kvm_device_ops kvm_xive_ops;
207extern struct kvm_device_ops kvm_xive_native_ops;
208
209struct kvmppc_passthru_irqmap;
210
211/*
212 * The reverse mapping array has one entry for each HPTE,
213 * which stores the guest's view of the second word of the HPTE
214 * (including the guest physical address of the mapping),
215 * plus forward and backward pointers in a doubly-linked ring
216 * of HPTEs that map the same host page. The pointers in this
217 * ring are 32-bit HPTE indexes, to save space.
218 */
219struct revmap_entry {
220 unsigned long guest_rpte;
221 unsigned int forw, back;
222};
223
224/*
225 * The rmap array of size number of guest pages is allocated for each memslot.
226 * This array is used to store usage specific information about the guest page.
227 * Below are the encodings of the various possible usage types.
228 */
229/* Free bits which can be used to define a new usage */
230#define KVMPPC_RMAP_TYPE_MASK 0xff00000000000000
231#define KVMPPC_RMAP_NESTED 0xc000000000000000 /* Nested rmap array */
232#define KVMPPC_RMAP_HPT 0x0100000000000000 /* HPT guest */
233
234/*
235 * rmap usage definition for a hash page table (hpt) guest:
236 * 0x0000080000000000 Lock bit
237 * 0x0000018000000000 RC bits
238 * 0x0000000100000000 Present bit
239 * 0x00000000ffffffff HPT index bits
240 * The bottom 32 bits are the index in the guest HPT of a HPTE that points to
241 * the page.
242 */
243#define KVMPPC_RMAP_LOCK_BIT 43
244#define KVMPPC_RMAP_RC_SHIFT 32
245#define KVMPPC_RMAP_REFERENCED (HPTE_R_R << KVMPPC_RMAP_RC_SHIFT)
246#define KVMPPC_RMAP_PRESENT 0x100000000ul
247#define KVMPPC_RMAP_INDEX 0xfffffffful
248
249struct kvm_arch_memory_slot {
250#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
251 unsigned long *rmap;
252#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
253};
254
255struct kvm_hpt_info {
256 /* Host virtual (linear mapping) address of guest HPT */
257 unsigned long virt;
258 /* Array of reverse mapping entries for each guest HPTE */
259 struct revmap_entry *rev;
260 /* Guest HPT size is 2**(order) bytes */
261 u32 order;
262 /* 1 if HPT allocated with CMA, 0 otherwise */
263 int cma;
264};
265
266struct kvm_resize_hpt;
267
268/* Flag values for kvm_arch.secure_guest */
269#define KVMPPC_SECURE_INIT_START 0x1 /* H_SVM_INIT_START has been called */
270#define KVMPPC_SECURE_INIT_DONE 0x2 /* H_SVM_INIT_DONE completed */
271#define KVMPPC_SECURE_INIT_ABORT 0x4 /* H_SVM_INIT_ABORT issued */
272
273struct kvm_arch {
274 unsigned int lpid;
275 unsigned int smt_mode; /* # vcpus per virtual core */
276 unsigned int emul_smt_mode; /* emualted SMT mode, on P9 */
277#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
278 unsigned int tlb_sets;
279 struct kvm_hpt_info hpt;
280 atomic64_t mmio_update;
281 unsigned int host_lpid;
282 unsigned long host_lpcr;
283 unsigned long sdr1;
284 unsigned long host_sdr1;
285 unsigned long lpcr;
286 unsigned long vrma_slb_v;
287 int mmu_ready;
288 atomic_t vcpus_running;
289 u32 online_vcores;
290 atomic_t hpte_mod_interest;
291 cpumask_t need_tlb_flush;
292 u8 radix;
293 u8 fwnmi_enabled;
294 u8 secure_guest;
295 u8 svm_enabled;
296 bool nested_enable;
297 bool dawr1_enabled;
298 pgd_t *pgtable;
299 u64 process_table;
300 struct kvm_resize_hpt *resize_hpt; /* protected by kvm->lock */
301#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
302#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
303 struct mutex hpt_mutex;
304#endif
305#ifdef CONFIG_PPC_BOOK3S_64
306 struct list_head spapr_tce_tables;
307 struct list_head rtas_tokens;
308 struct mutex rtas_token_lock;
309 DECLARE_BITMAP(enabled_hcalls, MAX_HCALL_OPCODE/4 + 1);
310#endif
311#ifdef CONFIG_KVM_MPIC
312 struct openpic *mpic;
313#endif
314#ifdef CONFIG_KVM_XICS
315 struct kvmppc_xics *xics;
316 struct kvmppc_xics *xics_device;
317 struct kvmppc_xive *xive; /* Current XIVE device in use */
318 struct {
319 struct kvmppc_xive *native;
320 struct kvmppc_xive *xics_on_xive;
321 } xive_devices;
322 struct kvmppc_passthru_irqmap *pimap;
323#endif
324 struct kvmppc_ops *kvm_ops;
325#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
326 struct mutex uvmem_lock;
327 struct list_head uvmem_pfns;
328 struct mutex mmu_setup_lock; /* nests inside vcpu mutexes */
329 u64 l1_ptcr;
330 int max_nested_lpid;
331 struct kvm_nested_guest *nested_guests[KVM_MAX_NESTED_GUESTS];
332 /* This array can grow quite large, keep it at the end */
333 struct kvmppc_vcore *vcores[KVM_MAX_VCORES];
334#endif
335};
336
337#define VCORE_ENTRY_MAP(vc) ((vc)->entry_exit_map & 0xff)
338#define VCORE_EXIT_MAP(vc) ((vc)->entry_exit_map >> 8)
339#define VCORE_IS_EXITING(vc) (VCORE_EXIT_MAP(vc) != 0)
340
341/* This bit is used when a vcore exit is triggered from outside the vcore */
342#define VCORE_EXIT_REQ 0x10000
343
344/*
345 * Values for vcore_state.
346 * Note that these are arranged such that lower values
347 * (< VCORE_SLEEPING) don't require stolen time accounting
348 * on load/unload, and higher values do.
349 */
350#define VCORE_INACTIVE 0
351#define VCORE_PREEMPT 1
352#define VCORE_PIGGYBACK 2
353#define VCORE_SLEEPING 3
354#define VCORE_RUNNING 4
355#define VCORE_EXITING 5
356#define VCORE_POLLING 6
357
358/*
359 * Struct used to manage memory for a virtual processor area
360 * registered by a PAPR guest. There are three types of area
361 * that a guest can register.
362 */
363struct kvmppc_vpa {
364 unsigned long gpa; /* Current guest phys addr */
365 void *pinned_addr; /* Address in kernel linear mapping */
366 void *pinned_end; /* End of region */
367 unsigned long next_gpa; /* Guest phys addr for update */
368 unsigned long len; /* Number of bytes required */
369 u8 update_pending; /* 1 => update pinned_addr from next_gpa */
370 bool dirty; /* true => area has been modified by kernel */
371};
372
373struct kvmppc_pte {
374 ulong eaddr;
375 u64 vpage;
376 ulong raddr;
377 bool may_read : 1;
378 bool may_write : 1;
379 bool may_execute : 1;
380 unsigned long wimg;
381 unsigned long rc;
382 u8 page_size; /* MMU_PAGE_xxx */
383 u8 page_shift;
384};
385
386struct kvmppc_mmu {
387 /* book3s_64 only */
388 void (*slbmte)(struct kvm_vcpu *vcpu, u64 rb, u64 rs);
389 u64 (*slbmfee)(struct kvm_vcpu *vcpu, u64 slb_nr);
390 u64 (*slbmfev)(struct kvm_vcpu *vcpu, u64 slb_nr);
391 int (*slbfee)(struct kvm_vcpu *vcpu, gva_t eaddr, ulong *ret_slb);
392 void (*slbie)(struct kvm_vcpu *vcpu, u64 slb_nr);
393 void (*slbia)(struct kvm_vcpu *vcpu);
394 /* book3s */
395 void (*mtsrin)(struct kvm_vcpu *vcpu, u32 srnum, ulong value);
396 u32 (*mfsrin)(struct kvm_vcpu *vcpu, u32 srnum);
397 int (*xlate)(struct kvm_vcpu *vcpu, gva_t eaddr,
398 struct kvmppc_pte *pte, bool data, bool iswrite);
399 void (*tlbie)(struct kvm_vcpu *vcpu, ulong addr, bool large);
400 int (*esid_to_vsid)(struct kvm_vcpu *vcpu, ulong esid, u64 *vsid);
401 u64 (*ea_to_vp)(struct kvm_vcpu *vcpu, gva_t eaddr, bool data);
402 bool (*is_dcbz32)(struct kvm_vcpu *vcpu);
403};
404
405struct kvmppc_slb {
406 u64 esid;
407 u64 vsid;
408 u64 orige;
409 u64 origv;
410 bool valid : 1;
411 bool Ks : 1;
412 bool Kp : 1;
413 bool nx : 1;
414 bool large : 1; /* PTEs are 16MB */
415 bool tb : 1; /* 1TB segment */
416 bool class : 1;
417 u8 base_page_size; /* MMU_PAGE_xxx */
418};
419
420/* Struct used to accumulate timing information in HV real mode code */
421struct kvmhv_tb_accumulator {
422 u64 seqcount; /* used to synchronize access, also count * 2 */
423 u64 tb_total; /* total time in timebase ticks */
424 u64 tb_min; /* min time */
425 u64 tb_max; /* max time */
426};
427
428#ifdef CONFIG_PPC_BOOK3S_64
429struct kvmppc_irq_map {
430 u32 r_hwirq;
431 u32 v_hwirq;
432 struct irq_desc *desc;
433};
434
435#define KVMPPC_PIRQ_MAPPED 1024
436struct kvmppc_passthru_irqmap {
437 int n_mapped;
438 struct kvmppc_irq_map mapped[KVMPPC_PIRQ_MAPPED];
439};
440#endif
441
442# ifdef CONFIG_PPC_FSL_BOOK3E
443#define KVMPPC_BOOKE_IAC_NUM 2
444#define KVMPPC_BOOKE_DAC_NUM 2
445# else
446#define KVMPPC_BOOKE_IAC_NUM 4
447#define KVMPPC_BOOKE_DAC_NUM 2
448# endif
449#define KVMPPC_BOOKE_MAX_IAC 4
450#define KVMPPC_BOOKE_MAX_DAC 2
451
452/* KVMPPC_EPR_USER takes precedence over KVMPPC_EPR_KERNEL */
453#define KVMPPC_EPR_NONE 0 /* EPR not supported */
454#define KVMPPC_EPR_USER 1 /* exit to userspace to fill EPR */
455#define KVMPPC_EPR_KERNEL 2 /* in-kernel irqchip */
456
457#define KVMPPC_IRQ_DEFAULT 0
458#define KVMPPC_IRQ_MPIC 1
459#define KVMPPC_IRQ_XICS 2 /* Includes a XIVE option */
460#define KVMPPC_IRQ_XIVE 3 /* XIVE native exploitation mode */
461
462#define MMIO_HPTE_CACHE_SIZE 4
463
464struct mmio_hpte_cache_entry {
465 unsigned long hpte_v;
466 unsigned long hpte_r;
467 unsigned long rpte;
468 unsigned long pte_index;
469 unsigned long eaddr;
470 unsigned long slb_v;
471 long mmio_update;
472 unsigned int slb_base_pshift;
473};
474
475struct mmio_hpte_cache {
476 struct mmio_hpte_cache_entry entry[MMIO_HPTE_CACHE_SIZE];
477 unsigned int index;
478};
479
480#define KVMPPC_VSX_COPY_NONE 0
481#define KVMPPC_VSX_COPY_WORD 1
482#define KVMPPC_VSX_COPY_DWORD 2
483#define KVMPPC_VSX_COPY_DWORD_LOAD_DUMP 3
484#define KVMPPC_VSX_COPY_WORD_LOAD_DUMP 4
485
486#define KVMPPC_VMX_COPY_BYTE 8
487#define KVMPPC_VMX_COPY_HWORD 9
488#define KVMPPC_VMX_COPY_WORD 10
489#define KVMPPC_VMX_COPY_DWORD 11
490
491struct openpic;
492
493/* W0 and W1 of a XIVE thread management context */
494union xive_tma_w01 {
495 struct {
496 u8 nsr;
497 u8 cppr;
498 u8 ipb;
499 u8 lsmfb;
500 u8 ack;
501 u8 inc;
502 u8 age;
503 u8 pipr;
504 };
505 __be64 w01;
506};
507
508struct kvm_vcpu_arch {
509 ulong host_stack;
510 u32 host_pid;
511#ifdef CONFIG_PPC_BOOK3S
512 struct kvmppc_slb slb[64];
513 int slb_max; /* 1 + index of last valid entry in slb[] */
514 int slb_nr; /* total number of entries in SLB */
515 struct kvmppc_mmu mmu;
516 struct kvmppc_vcpu_book3s *book3s;
517#endif
518#ifdef CONFIG_PPC_BOOK3S_32
519 struct kvmppc_book3s_shadow_vcpu *shadow_vcpu;
520#endif
521
522 struct pt_regs regs;
523
524 struct thread_fp_state fp;
525
526#ifdef CONFIG_SPE
527 ulong evr[32];
528 ulong spefscr;
529 ulong host_spefscr;
530 u64 acc;
531#endif
532#ifdef CONFIG_ALTIVEC
533 struct thread_vr_state vr;
534#endif
535
536#ifdef CONFIG_KVM_BOOKE_HV
537 u32 host_mas4;
538 u32 host_mas6;
539 u32 shadow_epcr;
540 u32 shadow_msrp;
541 u32 eplc;
542 u32 epsc;
543 u32 oldpir;
544#endif
545
546#if defined(CONFIG_BOOKE)
547#if defined(CONFIG_KVM_BOOKE_HV) || defined(CONFIG_64BIT)
548 u32 epcr;
549#endif
550#endif
551
552#ifdef CONFIG_PPC_BOOK3S
553 /* For Gekko paired singles */
554 u32 qpr[32];
555#endif
556
557#ifdef CONFIG_PPC_BOOK3S
558 ulong tar;
559#endif
560
561#ifdef CONFIG_PPC_BOOK3S
562 ulong hflags;
563 ulong guest_owned_ext;
564 ulong purr;
565 ulong spurr;
566 ulong ic;
567 ulong dscr;
568 ulong amr;
569 ulong uamor;
570 ulong iamr;
571 u32 ctrl;
572 u32 dabrx;
573 ulong dabr;
574 ulong dawr0;
575 ulong dawrx0;
576 ulong dawr1;
577 ulong dawrx1;
578 ulong ciabr;
579 ulong cfar;
580 ulong ppr;
581 u32 pspb;
582 u8 load_ebb;
583#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
584 u8 load_tm;
585#endif
586 ulong fscr;
587 ulong shadow_fscr;
588 ulong ebbhr;
589 ulong ebbrr;
590 ulong bescr;
591 ulong csigr;
592 ulong tacr;
593 ulong tcscr;
594 ulong acop;
595 ulong wort;
596 ulong tid;
597 ulong psscr;
598 ulong hfscr;
599 ulong shadow_srr1;
600#endif
601 u32 vrsave; /* also USPRG0 */
602 u32 mmucr;
603 /* shadow_msr is unused for BookE HV */
604 ulong shadow_msr;
605 ulong csrr0;
606 ulong csrr1;
607 ulong dsrr0;
608 ulong dsrr1;
609 ulong mcsrr0;
610 ulong mcsrr1;
611 ulong mcsr;
612 ulong dec;
613#ifdef CONFIG_BOOKE
614 u32 decar;
615#endif
616 /* Time base value when we entered the guest */
617 u64 entry_tb;
618 u64 entry_vtb;
619 u64 entry_ic;
620 u32 tcr;
621 ulong tsr; /* we need to perform set/clr_bits() which requires ulong */
622 u32 ivor[64];
623 ulong ivpr;
624 u32 pvr;
625
626 u32 shadow_pid;
627 u32 shadow_pid1;
628 u32 pid;
629 u32 swap_pid;
630
631 u32 ccr0;
632 u32 ccr1;
633 u32 dbsr;
634
635 u64 mmcr[4]; /* MMCR0, MMCR1, MMCR2, MMCR3 */
636 u64 mmcra;
637 u64 mmcrs;
638 u32 pmc[8];
639 u32 spmc[2];
640 u64 siar;
641 u64 sdar;
642 u64 sier[3];
643#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
644 u64 tfhar;
645 u64 texasr;
646 u64 tfiar;
647 u64 orig_texasr;
648
649 u32 cr_tm;
650 u64 xer_tm;
651 u64 lr_tm;
652 u64 ctr_tm;
653 u64 amr_tm;
654 u64 ppr_tm;
655 u64 dscr_tm;
656 u64 tar_tm;
657
658 ulong gpr_tm[32];
659
660 struct thread_fp_state fp_tm;
661
662 struct thread_vr_state vr_tm;
663 u32 vrsave_tm; /* also USPRG0 */
664#endif
665
666#ifdef CONFIG_KVM_EXIT_TIMING
667 struct mutex exit_timing_lock;
668 struct kvmppc_exit_timing timing_exit;
669 struct kvmppc_exit_timing timing_last_enter;
670 u32 last_exit_type;
671 u32 timing_count_type[__NUMBER_OF_KVM_EXIT_TYPES];
672 u64 timing_sum_duration[__NUMBER_OF_KVM_EXIT_TYPES];
673 u64 timing_sum_quad_duration[__NUMBER_OF_KVM_EXIT_TYPES];
674 u64 timing_min_duration[__NUMBER_OF_KVM_EXIT_TYPES];
675 u64 timing_max_duration[__NUMBER_OF_KVM_EXIT_TYPES];
676 u64 timing_last_exit;
677#endif
678
679#ifdef CONFIG_PPC_BOOK3S
680 ulong fault_dar;
681 u32 fault_dsisr;
682 unsigned long intr_msr;
683 /*
684 * POWER9 and later: fault_gpa contains the guest real address of page
685 * fault for a radix guest, or segment descriptor (equivalent to result
686 * from slbmfev of SLB entry that translated the EA) for hash guests.
687 */
688 ulong fault_gpa;
689#endif
690
691#ifdef CONFIG_BOOKE
692 ulong fault_dear;
693 ulong fault_esr;
694 ulong queued_dear;
695 ulong queued_esr;
696 spinlock_t wdt_lock;
697 struct timer_list wdt_timer;
698 u32 tlbcfg[4];
699 u32 tlbps[4];
700 u32 mmucfg;
701 u32 eptcfg;
702 u32 epr;
703 u64 sprg9;
704 u32 pwrmgtcr0;
705 u32 crit_save;
706 /* guest debug registers*/
707 struct debug_reg dbg_reg;
708#endif
709 gpa_t paddr_accessed;
710 gva_t vaddr_accessed;
711 pgd_t *pgdir;
712
713 u16 io_gpr; /* GPR used as IO source/target */
714 u8 mmio_host_swabbed;
715 u8 mmio_sign_extend;
716 /* conversion between single and double precision */
717 u8 mmio_sp64_extend;
718 /*
719 * Number of simulations for vsx.
720 * If we use 2*8bytes to simulate 1*16bytes,
721 * then the number should be 2 and
722 * mmio_copy_type=KVMPPC_VSX_COPY_DWORD.
723 * If we use 4*4bytes to simulate 1*16bytes,
724 * the number should be 4 and
725 * mmio_vsx_copy_type=KVMPPC_VSX_COPY_WORD.
726 */
727 u8 mmio_vsx_copy_nums;
728 u8 mmio_vsx_offset;
729 u8 mmio_vmx_copy_nums;
730 u8 mmio_vmx_offset;
731 u8 mmio_copy_type;
732 u8 osi_needed;
733 u8 osi_enabled;
734 u8 papr_enabled;
735 u8 watchdog_enabled;
736 u8 sane;
737 u8 cpu_type;
738 u8 hcall_needed;
739 u8 epr_flags; /* KVMPPC_EPR_xxx */
740 u8 epr_needed;
741 u8 external_oneshot; /* clear external irq after delivery */
742
743 u32 cpr0_cfgaddr; /* holds the last set cpr0_cfgaddr */
744
745 struct hrtimer dec_timer;
746 u64 dec_jiffies;
747 u64 dec_expires; /* Relative to guest timebase. */
748 unsigned long pending_exceptions;
749 u8 ceded;
750 u8 prodded;
751 u8 doorbell_request;
752 u8 irq_pending; /* Used by XIVE to signal pending guest irqs */
753 u32 last_inst;
754
755 struct rcuwait wait;
756 struct rcuwait *waitp;
757 struct kvmppc_vcore *vcore;
758 int ret;
759 int trap;
760 int state;
761 int ptid;
762 int thread_cpu;
763 int prev_cpu;
764 bool timer_running;
765 wait_queue_head_t cpu_run;
766 struct machine_check_event mce_evt; /* Valid if trap == 0x200 */
767
768 struct kvm_vcpu_arch_shared *shared;
769#if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_KVM_BOOK3S_PR_POSSIBLE)
770 bool shared_big_endian;
771#endif
772 unsigned long magic_page_pa; /* phys addr to map the magic page to */
773 unsigned long magic_page_ea; /* effect. addr to map the magic page to */
774 bool disable_kernel_nx;
775
776 int irq_type; /* one of KVM_IRQ_* */
777 int irq_cpu_id;
778 struct openpic *mpic; /* KVM_IRQ_MPIC */
779#ifdef CONFIG_KVM_XICS
780 struct kvmppc_icp *icp; /* XICS presentation controller */
781 struct kvmppc_xive_vcpu *xive_vcpu; /* XIVE virtual CPU data */
782 __be32 xive_cam_word; /* Cooked W2 in proper endian with valid bit */
783 u8 xive_pushed; /* Is the VP pushed on the physical CPU ? */
784 u8 xive_esc_on; /* Is the escalation irq enabled ? */
785 union xive_tma_w01 xive_saved_state; /* W0..1 of XIVE thread state */
786 u64 xive_esc_raddr; /* Escalation interrupt ESB real addr */
787 u64 xive_esc_vaddr; /* Escalation interrupt ESB virt addr */
788#endif
789
790#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
791 struct kvm_vcpu_arch_shared shregs;
792
793 struct mmio_hpte_cache mmio_cache;
794 unsigned long pgfault_addr;
795 long pgfault_index;
796 unsigned long pgfault_hpte[2];
797 struct mmio_hpte_cache_entry *pgfault_cache;
798
799 struct task_struct *run_task;
800
801 spinlock_t vpa_update_lock;
802 struct kvmppc_vpa vpa;
803 struct kvmppc_vpa dtl;
804 struct dtl_entry *dtl_ptr;
805 unsigned long dtl_index;
806 u64 stolen_logged;
807 struct kvmppc_vpa slb_shadow;
808
809 spinlock_t tbacct_lock;
810 u64 busy_stolen;
811 u64 busy_preempt;
812
813 u32 emul_inst;
814
815 u32 online;
816
817 u64 hfscr_permitted; /* A mask of permitted HFSCR facilities */
818
819 /* For support of nested guests */
820 struct kvm_nested_guest *nested;
821 u64 nested_hfscr; /* HFSCR that the L1 requested for the nested guest */
822 u32 nested_vcpu_id;
823 gpa_t nested_io_gpr;
824#endif
825
826#ifdef CONFIG_KVM_BOOK3S_HV_EXIT_TIMING
827 struct kvmhv_tb_accumulator *cur_activity; /* What we're timing */
828 u64 cur_tb_start; /* when it started */
829 struct kvmhv_tb_accumulator rm_entry; /* real-mode entry code */
830 struct kvmhv_tb_accumulator rm_intr; /* real-mode intr handling */
831 struct kvmhv_tb_accumulator rm_exit; /* real-mode exit code */
832 struct kvmhv_tb_accumulator guest_time; /* guest execution */
833 struct kvmhv_tb_accumulator cede_time; /* time napping inside guest */
834#endif /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */
835};
836
837#define VCPU_FPR(vcpu, i) (vcpu)->arch.fp.fpr[i][TS_FPROFFSET]
838#define VCPU_VSX_FPR(vcpu, i, j) ((vcpu)->arch.fp.fpr[i][j])
839#define VCPU_VSX_VR(vcpu, i) ((vcpu)->arch.vr.vr[i])
840
841/* Values for vcpu->arch.state */
842#define KVMPPC_VCPU_NOTREADY 0
843#define KVMPPC_VCPU_RUNNABLE 1
844#define KVMPPC_VCPU_BUSY_IN_HOST 2
845
846/* Values for vcpu->arch.io_gpr */
847#define KVM_MMIO_REG_MASK 0x003f
848#define KVM_MMIO_REG_EXT_MASK 0xffc0
849#define KVM_MMIO_REG_GPR 0x0000
850#define KVM_MMIO_REG_FPR 0x0040
851#define KVM_MMIO_REG_QPR 0x0080
852#define KVM_MMIO_REG_FQPR 0x00c0
853#define KVM_MMIO_REG_VSX 0x0100
854#define KVM_MMIO_REG_VMX 0x0180
855#define KVM_MMIO_REG_NESTED_GPR 0xffc0
856
857
858#define __KVM_HAVE_ARCH_WQP
859#define __KVM_HAVE_CREATE_DEVICE
860
861static inline void kvm_arch_hardware_disable(void) {}
862static inline void kvm_arch_hardware_unsetup(void) {}
863static inline void kvm_arch_sync_events(struct kvm *kvm) {}
864static inline void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen) {}
865static inline void kvm_arch_flush_shadow_all(struct kvm *kvm) {}
866static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {}
867static inline void kvm_arch_exit(void) {}
868static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) {}
869static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) {}
870
871#endif /* __POWERPC_KVM_HOST_H__ */