tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2
3%YAML 1.2
4---
5$id: "http://devicetree.org/schemas/spi/qcom,spi-qcom-qspi.yaml#"
6$schema: "http://devicetree.org/meta-schemas/core.yaml#"
7
8title: Qualcomm Quad Serial Peripheral Interface (QSPI)
9
10maintainers:
11 - Mukesh Savaliya <msavaliy@codeaurora.org>
12 - Akash Asthana <akashast@codeaurora.org>
13
14description: The QSPI controller allows SPI protocol communication in single,
15 dual, or quad wire transmission modes for read/write access to slaves such
16 as NOR flash.
17
18allOf:
19 - $ref: /schemas/spi/spi-controller.yaml#
20
21properties:
22 compatible:
23 items:
24 - enum:
25 - qcom,sc7180-qspi
26 - qcom,sc7280-qspi
27 - qcom,sdm845-qspi
28
29 - const: qcom,qspi-v1
30
31 reg:
32 maxItems: 1
33
34 interrupts:
35 maxItems: 1
36
37 clock-names:
38 items:
39 - const: iface
40 - const: core
41
42 clocks:
43 items:
44 - description: AHB clock
45 - description: QSPI core clock
46
47 interconnects:
48 minItems: 1
49 maxItems: 2
50
51 interconnect-names:
52 items:
53 - const: qspi-config
54 - const: qspi-memory
55
56required:
57 - compatible
58 - reg
59 - interrupts
60 - clock-names
61 - clocks
62
63unevaluatedProperties: false
64
65examples:
66 - |
67 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
68 #include <dt-bindings/interrupt-controller/arm-gic.h>
69
70 soc: soc {
71 #address-cells = <2>;
72 #size-cells = <2>;
73
74 qspi: spi@88df000 {
75 compatible = "qcom,sdm845-qspi", "qcom,qspi-v1";
76 reg = <0 0x88df000 0 0x600>;
77 #address-cells = <1>;
78 #size-cells = <0>;
79 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
80 clock-names = "iface", "core";
81 clocks = <&gcc GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
82 <&gcc GCC_QSPI_CORE_CLK>;
83
84 flash@0 {
85 compatible = "jedec,spi-nor";
86 reg = <0>;
87 spi-max-frequency = <25000000>;
88 spi-tx-bus-width = <2>;
89 spi-rx-bus-width = <2>;
90 };
91
92 };
93 };
94...