tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
2/*
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * Copyright(c) 2018 Intel Corporation. All rights reserved.
7 *
8 * Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
9 */
10
11#ifndef __SOUND_SOC_SOF_PRIV_H
12#define __SOUND_SOC_SOF_PRIV_H
13
14#include <linux/device.h>
15#include <sound/hdaudio.h>
16#include <sound/sof.h>
17#include <sound/sof/info.h>
18#include <sound/sof/pm.h>
19#include <sound/sof/trace.h>
20#include <uapi/sound/sof/fw.h>
21#include <sound/sof/ext_manifest.h>
22
23/* Flag definitions used in sof_core_debug (sof_debug module parameter) */
24#define SOF_DBG_ENABLE_TRACE BIT(0)
25#define SOF_DBG_RETAIN_CTX BIT(1) /* prevent DSP D3 on FW exception */
26#define SOF_DBG_VERIFY_TPLG BIT(2) /* verify topology during load */
27#define SOF_DBG_DYNAMIC_PIPELINES_OVERRIDE BIT(3) /* 0: use topology token
28 * 1: override topology
29 */
30#define SOF_DBG_DYNAMIC_PIPELINES_ENABLE BIT(4) /* 0: use static pipelines
31 * 1: use dynamic pipelines
32 */
33#define SOF_DBG_DISABLE_MULTICORE BIT(5) /* schedule all pipelines/widgets
34 * on primary core
35 */
36#define SOF_DBG_PRINT_ALL_DUMPS BIT(6) /* Print all ipc and dsp dumps */
37
38/* Flag definitions used for controlling the DSP dump behavior */
39#define SOF_DBG_DUMP_REGS BIT(0)
40#define SOF_DBG_DUMP_MBOX BIT(1)
41#define SOF_DBG_DUMP_TEXT BIT(2)
42#define SOF_DBG_DUMP_PCI BIT(3)
43/* Output this dump (at the DEBUG level) only when SOF_DBG_PRINT_ALL_DUMPS is set */
44#define SOF_DBG_DUMP_OPTIONAL BIT(4)
45
46/* global debug state set by SOF_DBG_ flags */
47bool sof_debug_check_flag(int mask);
48
49/* max BARs mmaped devices can use */
50#define SND_SOF_BARS 8
51
52/* time in ms for runtime suspend delay */
53#define SND_SOF_SUSPEND_DELAY_MS 2000
54
55/* DMA buffer size for trace */
56#define DMA_BUF_SIZE_FOR_TRACE (PAGE_SIZE * 16)
57
58#define SOF_IPC_DSP_REPLY 0
59#define SOF_IPC_HOST_REPLY 1
60
61/* convenience constructor for DAI driver streams */
62#define SOF_DAI_STREAM(sname, scmin, scmax, srates, sfmt) \
63 {.stream_name = sname, .channels_min = scmin, .channels_max = scmax, \
64 .rates = srates, .formats = sfmt}
65
66#define SOF_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE | \
67 SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_FLOAT)
68
69#define ENABLE_DEBUGFS_CACHEBUF \
70 (IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_ENABLE_DEBUGFS_CACHE) || \
71 IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_IPC_FLOOD_TEST))
72
73/* So far the primary core on all DSPs has ID 0 */
74#define SOF_DSP_PRIMARY_CORE 0
75
76/* max number of DSP cores */
77#define SOF_MAX_DSP_NUM_CORES 8
78
79/* DSP power state */
80enum sof_dsp_power_states {
81 SOF_DSP_PM_D0,
82 SOF_DSP_PM_D1,
83 SOF_DSP_PM_D2,
84 SOF_DSP_PM_D3_HOT,
85 SOF_DSP_PM_D3,
86 SOF_DSP_PM_D3_COLD,
87};
88
89struct sof_dsp_power_state {
90 u32 state;
91 u32 substate; /* platform-specific */
92};
93
94/* System suspend target state */
95enum sof_system_suspend_state {
96 SOF_SUSPEND_NONE = 0,
97 SOF_SUSPEND_S0IX,
98 SOF_SUSPEND_S3,
99};
100
101enum sof_dfsentry_type {
102 SOF_DFSENTRY_TYPE_IOMEM = 0,
103 SOF_DFSENTRY_TYPE_BUF,
104};
105
106enum sof_debugfs_access_type {
107 SOF_DEBUGFS_ACCESS_ALWAYS = 0,
108 SOF_DEBUGFS_ACCESS_D0_ONLY,
109};
110
111struct snd_sof_dev;
112struct snd_sof_ipc_msg;
113struct snd_sof_ipc;
114struct snd_sof_debugfs_map;
115struct snd_soc_tplg_ops;
116struct snd_soc_component;
117struct snd_sof_pdata;
118
119/*
120 * SOF DSP HW abstraction operations.
121 * Used to abstract DSP HW architecture and any IO busses between host CPU
122 * and DSP device(s).
123 */
124struct snd_sof_dsp_ops {
125
126 /* probe/remove/shutdown */
127 int (*probe)(struct snd_sof_dev *sof_dev); /* mandatory */
128 int (*remove)(struct snd_sof_dev *sof_dev); /* optional */
129 int (*shutdown)(struct snd_sof_dev *sof_dev); /* optional */
130
131 /* DSP core boot / reset */
132 int (*run)(struct snd_sof_dev *sof_dev); /* mandatory */
133 int (*stall)(struct snd_sof_dev *sof_dev, unsigned int core_mask); /* optional */
134 int (*reset)(struct snd_sof_dev *sof_dev); /* optional */
135 int (*core_get)(struct snd_sof_dev *sof_dev, int core); /* optional */
136 int (*core_put)(struct snd_sof_dev *sof_dev, int core); /* optional */
137
138 /*
139 * Register IO: only used by respective drivers themselves,
140 * TODO: consider removing these operations and calling respective
141 * implementations directly
142 */
143 void (*write)(struct snd_sof_dev *sof_dev, void __iomem *addr,
144 u32 value); /* optional */
145 u32 (*read)(struct snd_sof_dev *sof_dev,
146 void __iomem *addr); /* optional */
147 void (*write64)(struct snd_sof_dev *sof_dev, void __iomem *addr,
148 u64 value); /* optional */
149 u64 (*read64)(struct snd_sof_dev *sof_dev,
150 void __iomem *addr); /* optional */
151
152 /* memcpy IO */
153 int (*block_read)(struct snd_sof_dev *sof_dev,
154 enum snd_sof_fw_blk_type type, u32 offset,
155 void *dest, size_t size); /* mandatory */
156 int (*block_write)(struct snd_sof_dev *sof_dev,
157 enum snd_sof_fw_blk_type type, u32 offset,
158 void *src, size_t size); /* mandatory */
159
160 /* Mailbox IO */
161 void (*mailbox_read)(struct snd_sof_dev *sof_dev,
162 u32 offset, void *dest,
163 size_t size); /* optional */
164 void (*mailbox_write)(struct snd_sof_dev *sof_dev,
165 u32 offset, void *src,
166 size_t size); /* optional */
167
168 /* doorbell */
169 irqreturn_t (*irq_handler)(int irq, void *context); /* optional */
170 irqreturn_t (*irq_thread)(int irq, void *context); /* optional */
171
172 /* ipc */
173 int (*send_msg)(struct snd_sof_dev *sof_dev,
174 struct snd_sof_ipc_msg *msg); /* mandatory */
175
176 /* FW loading */
177 int (*load_firmware)(struct snd_sof_dev *sof_dev); /* mandatory */
178 int (*load_module)(struct snd_sof_dev *sof_dev,
179 struct snd_sof_mod_hdr *hdr); /* optional */
180 /*
181 * FW ready checks for ABI compatibility and creates
182 * memory windows at first boot
183 */
184 int (*fw_ready)(struct snd_sof_dev *sdev, u32 msg_id); /* mandatory */
185
186 /* connect pcm substream to a host stream */
187 int (*pcm_open)(struct snd_sof_dev *sdev,
188 struct snd_pcm_substream *substream); /* optional */
189 /* disconnect pcm substream to a host stream */
190 int (*pcm_close)(struct snd_sof_dev *sdev,
191 struct snd_pcm_substream *substream); /* optional */
192
193 /* host stream hw params */
194 int (*pcm_hw_params)(struct snd_sof_dev *sdev,
195 struct snd_pcm_substream *substream,
196 struct snd_pcm_hw_params *params,
197 struct sof_ipc_stream_params *ipc_params); /* optional */
198
199 /* host stream hw_free */
200 int (*pcm_hw_free)(struct snd_sof_dev *sdev,
201 struct snd_pcm_substream *substream); /* optional */
202
203 /* host stream trigger */
204 int (*pcm_trigger)(struct snd_sof_dev *sdev,
205 struct snd_pcm_substream *substream,
206 int cmd); /* optional */
207
208 /* host stream pointer */
209 snd_pcm_uframes_t (*pcm_pointer)(struct snd_sof_dev *sdev,
210 struct snd_pcm_substream *substream); /* optional */
211
212 /* pcm ack */
213 int (*pcm_ack)(struct snd_sof_dev *sdev, struct snd_pcm_substream *substream); /* optional */
214
215#if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_PROBES)
216 /* Except for probe_pointer, all probe ops are mandatory */
217 int (*probe_assign)(struct snd_sof_dev *sdev,
218 struct snd_compr_stream *cstream,
219 struct snd_soc_dai *dai); /* mandatory */
220 int (*probe_free)(struct snd_sof_dev *sdev,
221 struct snd_compr_stream *cstream,
222 struct snd_soc_dai *dai); /* mandatory */
223 int (*probe_set_params)(struct snd_sof_dev *sdev,
224 struct snd_compr_stream *cstream,
225 struct snd_compr_params *params,
226 struct snd_soc_dai *dai); /* mandatory */
227 int (*probe_trigger)(struct snd_sof_dev *sdev,
228 struct snd_compr_stream *cstream, int cmd,
229 struct snd_soc_dai *dai); /* mandatory */
230 int (*probe_pointer)(struct snd_sof_dev *sdev,
231 struct snd_compr_stream *cstream,
232 struct snd_compr_tstamp *tstamp,
233 struct snd_soc_dai *dai); /* optional */
234#endif
235
236 /* host read DSP stream data */
237 int (*ipc_msg_data)(struct snd_sof_dev *sdev,
238 struct snd_pcm_substream *substream,
239 void *p, size_t sz); /* mandatory */
240
241 /* host configure DSP HW parameters */
242 int (*ipc_pcm_params)(struct snd_sof_dev *sdev,
243 struct snd_pcm_substream *substream,
244 const struct sof_ipc_pcm_params_reply *reply); /* mandatory */
245
246 /* pre/post firmware run */
247 int (*pre_fw_run)(struct snd_sof_dev *sof_dev); /* optional */
248 int (*post_fw_run)(struct snd_sof_dev *sof_dev); /* optional */
249
250 /* parse platform specific extended manifest, optional */
251 int (*parse_platform_ext_manifest)(struct snd_sof_dev *sof_dev,
252 const struct sof_ext_man_elem_header *hdr);
253
254 /* DSP PM */
255 int (*suspend)(struct snd_sof_dev *sof_dev,
256 u32 target_state); /* optional */
257 int (*resume)(struct snd_sof_dev *sof_dev); /* optional */
258 int (*runtime_suspend)(struct snd_sof_dev *sof_dev); /* optional */
259 int (*runtime_resume)(struct snd_sof_dev *sof_dev); /* optional */
260 int (*runtime_idle)(struct snd_sof_dev *sof_dev); /* optional */
261 int (*set_hw_params_upon_resume)(struct snd_sof_dev *sdev); /* optional */
262 int (*set_power_state)(struct snd_sof_dev *sdev,
263 const struct sof_dsp_power_state *target_state); /* optional */
264
265 /* DSP clocking */
266 int (*set_clk)(struct snd_sof_dev *sof_dev, u32 freq); /* optional */
267
268 /* debug */
269 const struct snd_sof_debugfs_map *debug_map; /* optional */
270 int debug_map_count; /* optional */
271 void (*dbg_dump)(struct snd_sof_dev *sof_dev,
272 u32 flags); /* optional */
273 void (*ipc_dump)(struct snd_sof_dev *sof_dev); /* optional */
274 int (*debugfs_add_region_item)(struct snd_sof_dev *sdev,
275 enum snd_sof_fw_blk_type blk_type, u32 offset,
276 size_t size, const char *name,
277 enum sof_debugfs_access_type access_type); /* optional */
278
279 /* host DMA trace initialization */
280 int (*trace_init)(struct snd_sof_dev *sdev,
281 u32 *stream_tag); /* optional */
282 int (*trace_release)(struct snd_sof_dev *sdev); /* optional */
283 int (*trace_trigger)(struct snd_sof_dev *sdev,
284 int cmd); /* optional */
285
286 /* misc */
287 int (*get_bar_index)(struct snd_sof_dev *sdev,
288 u32 type); /* optional */
289 int (*get_mailbox_offset)(struct snd_sof_dev *sdev);/* mandatory for common loader code */
290 int (*get_window_offset)(struct snd_sof_dev *sdev,
291 u32 id);/* mandatory for common loader code */
292
293 /* machine driver ops */
294 int (*machine_register)(struct snd_sof_dev *sdev,
295 void *pdata); /* optional */
296 void (*machine_unregister)(struct snd_sof_dev *sdev,
297 void *pdata); /* optional */
298 struct snd_soc_acpi_mach * (*machine_select)(struct snd_sof_dev *sdev); /* optional */
299 void (*set_mach_params)(struct snd_soc_acpi_mach *mach,
300 struct snd_sof_dev *sdev); /* optional */
301
302 /* DAI ops */
303 struct snd_soc_dai_driver *drv;
304 int num_drv;
305
306 /* ALSA HW info flags, will be stored in snd_pcm_runtime.hw.info */
307 u32 hw_info;
308
309 const struct dsp_arch_ops *dsp_arch_ops;
310};
311
312/* DSP architecture specific callbacks for oops and stack dumps */
313struct dsp_arch_ops {
314 void (*dsp_oops)(struct snd_sof_dev *sdev, const char *level, void *oops);
315 void (*dsp_stack)(struct snd_sof_dev *sdev, const char *level, void *oops,
316 u32 *stack, u32 stack_words);
317};
318
319#define sof_dsp_arch_ops(sdev) ((sdev)->pdata->desc->ops->dsp_arch_ops)
320
321/* FS entry for debug files that can expose DSP memories, registers */
322struct snd_sof_dfsentry {
323 size_t size;
324 size_t buf_data_size; /* length of buffered data for file read operation */
325 enum sof_dfsentry_type type;
326 /*
327 * access_type specifies if the
328 * memory -> DSP resource (memory, register etc) is always accessible
329 * or if it is accessible only when the DSP is in D0.
330 */
331 enum sof_debugfs_access_type access_type;
332#if ENABLE_DEBUGFS_CACHEBUF
333 char *cache_buf; /* buffer to cache the contents of debugfs memory */
334#endif
335#if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_IPC_MSG_INJECTOR)
336 void *msg_inject_tx;
337 void *msg_inject_rx;
338#endif
339 struct snd_sof_dev *sdev;
340 struct list_head list; /* list in sdev dfsentry list */
341 union {
342 void __iomem *io_mem;
343 void *buf;
344 };
345};
346
347/* Debug mapping for any DSP memory or registers that can used for debug */
348struct snd_sof_debugfs_map {
349 const char *name;
350 u32 bar;
351 u32 offset;
352 u32 size;
353 /*
354 * access_type specifies if the memory is always accessible
355 * or if it is accessible only when the DSP is in D0.
356 */
357 enum sof_debugfs_access_type access_type;
358};
359
360/* mailbox descriptor, used for host <-> DSP IPC */
361struct snd_sof_mailbox {
362 u32 offset;
363 size_t size;
364};
365
366/* IPC message descriptor for host <-> DSP IO */
367struct snd_sof_ipc_msg {
368 /* message data */
369 u32 header;
370 void *msg_data;
371 void *reply_data;
372 size_t msg_size;
373 size_t reply_size;
374 int reply_error;
375
376 wait_queue_head_t waitq;
377 bool ipc_complete;
378};
379
380/*
381 * SOF Device Level.
382 */
383struct snd_sof_dev {
384 struct device *dev;
385 spinlock_t ipc_lock; /* lock for IPC users */
386 spinlock_t hw_lock; /* lock for HW IO access */
387
388 /*
389 * ASoC components. plat_drv fields are set dynamically so
390 * can't use const
391 */
392 struct snd_soc_component_driver plat_drv;
393
394 /* current DSP power state */
395 struct sof_dsp_power_state dsp_power_state;
396 /* mutex to protect the dsp_power_state access */
397 struct mutex power_state_access;
398
399 /* Intended power target of system suspend */
400 enum sof_system_suspend_state system_suspend_target;
401
402 /* DSP firmware boot */
403 wait_queue_head_t boot_wait;
404 enum sof_fw_state fw_state;
405 bool first_boot;
406
407 /* work queue in case the probe is implemented in two steps */
408 struct work_struct probe_work;
409 bool probe_completed;
410
411 /* DSP HW differentiation */
412 struct snd_sof_pdata *pdata;
413
414 /* IPC */
415 struct snd_sof_ipc *ipc;
416 struct snd_sof_mailbox dsp_box; /* DSP initiated IPC */
417 struct snd_sof_mailbox host_box; /* Host initiated IPC */
418 struct snd_sof_mailbox stream_box; /* Stream position update */
419 struct snd_sof_mailbox debug_box; /* Debug info updates */
420 struct snd_sof_ipc_msg *msg;
421 int ipc_irq;
422 u32 next_comp_id; /* monotonic - reset during S3 */
423
424 /* memory bases for mmaped DSPs - set by dsp_init() */
425 void __iomem *bar[SND_SOF_BARS]; /* DSP base address */
426 int mmio_bar;
427 int mailbox_bar;
428 size_t dsp_oops_offset;
429
430 /* debug */
431 struct dentry *debugfs_root;
432 struct list_head dfsentry_list;
433 bool dbg_dump_printed;
434 bool ipc_dump_printed;
435
436 /* firmware loader */
437 struct snd_dma_buffer dmab;
438 struct snd_dma_buffer dmab_bdl;
439 struct sof_ipc_fw_ready fw_ready;
440 struct sof_ipc_fw_version fw_version;
441 struct sof_ipc_cc_version *cc_version;
442
443 /* topology */
444 struct snd_soc_tplg_ops *tplg_ops;
445 struct list_head pcm_list;
446 struct list_head kcontrol_list;
447 struct list_head widget_list;
448 struct list_head dai_list;
449 struct list_head route_list;
450 struct snd_soc_component *component;
451 u32 enabled_cores_mask; /* keep track of enabled cores */
452
453 /* FW configuration */
454 struct sof_ipc_window *info_window;
455
456 /* IPC timeouts in ms */
457 int ipc_timeout;
458 int boot_timeout;
459
460#if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_PROBES)
461 unsigned int extractor_stream_tag;
462#endif
463
464 /* DMA for Trace */
465 struct snd_dma_buffer dmatb;
466 struct snd_dma_buffer dmatp;
467 int dma_trace_pages;
468 wait_queue_head_t trace_sleep;
469 u32 host_offset;
470 bool dtrace_is_supported; /* set with Kconfig or module parameter */
471 bool dtrace_is_enabled;
472 bool dtrace_error;
473 bool dtrace_draining;
474
475 bool msi_enabled;
476
477 /* DSP core context */
478 u32 num_cores;
479
480 /*
481 * ref count per core that will be modified during system suspend/resume and during pcm
482 * hw_params/hw_free. This doesn't need to be protected with a mutex because pcm
483 * hw_params/hw_free are already protected by the PCM mutex in the ALSA framework in
484 * sound/core/ when streams are active and during system suspend/resume, streams are
485 * already suspended.
486 */
487 int dsp_core_ref_count[SOF_MAX_DSP_NUM_CORES];
488
489 void *private; /* core does not touch this */
490};
491
492/*
493 * Device Level.
494 */
495
496int snd_sof_device_probe(struct device *dev, struct snd_sof_pdata *plat_data);
497int snd_sof_device_remove(struct device *dev);
498int snd_sof_device_shutdown(struct device *dev);
499bool snd_sof_device_probe_completed(struct device *dev);
500
501int snd_sof_runtime_suspend(struct device *dev);
502int snd_sof_runtime_resume(struct device *dev);
503int snd_sof_runtime_idle(struct device *dev);
504int snd_sof_resume(struct device *dev);
505int snd_sof_suspend(struct device *dev);
506int snd_sof_dsp_power_down_notify(struct snd_sof_dev *sdev);
507int snd_sof_prepare(struct device *dev);
508void snd_sof_complete(struct device *dev);
509
510void snd_sof_new_platform_drv(struct snd_sof_dev *sdev);
511
512int snd_sof_create_page_table(struct device *dev,
513 struct snd_dma_buffer *dmab,
514 unsigned char *page_table, size_t size);
515
516/*
517 * Firmware loading.
518 */
519int snd_sof_load_firmware_raw(struct snd_sof_dev *sdev);
520int snd_sof_load_firmware_memcpy(struct snd_sof_dev *sdev);
521int snd_sof_run_firmware(struct snd_sof_dev *sdev);
522int snd_sof_parse_module_memcpy(struct snd_sof_dev *sdev,
523 struct snd_sof_mod_hdr *module);
524void snd_sof_fw_unload(struct snd_sof_dev *sdev);
525
526/*
527 * IPC low level APIs.
528 */
529struct snd_sof_ipc *snd_sof_ipc_init(struct snd_sof_dev *sdev);
530void snd_sof_ipc_free(struct snd_sof_dev *sdev);
531void snd_sof_ipc_get_reply(struct snd_sof_dev *sdev);
532void snd_sof_ipc_reply(struct snd_sof_dev *sdev, u32 msg_id);
533void snd_sof_ipc_msgs_rx(struct snd_sof_dev *sdev);
534int snd_sof_ipc_stream_pcm_params(struct snd_sof_dev *sdev,
535 struct sof_ipc_pcm_params *params);
536int snd_sof_ipc_valid(struct snd_sof_dev *sdev);
537int sof_ipc_tx_message(struct snd_sof_ipc *ipc, u32 header,
538 void *msg_data, size_t msg_bytes, void *reply_data,
539 size_t reply_bytes);
540int sof_ipc_tx_message_no_pm(struct snd_sof_ipc *ipc, u32 header,
541 void *msg_data, size_t msg_bytes,
542 void *reply_data, size_t reply_bytes);
543int sof_ipc_init_msg_memory(struct snd_sof_dev *sdev);
544static inline void snd_sof_ipc_process_reply(struct snd_sof_dev *sdev, u32 msg_id)
545{
546 snd_sof_ipc_get_reply(sdev);
547 snd_sof_ipc_reply(sdev, msg_id);
548}
549
550/*
551 * Trace/debug
552 */
553int snd_sof_init_trace(struct snd_sof_dev *sdev);
554void snd_sof_release_trace(struct snd_sof_dev *sdev);
555void snd_sof_free_trace(struct snd_sof_dev *sdev);
556int snd_sof_dbg_init(struct snd_sof_dev *sdev);
557void snd_sof_free_debug(struct snd_sof_dev *sdev);
558int snd_sof_debugfs_buf_item(struct snd_sof_dev *sdev,
559 void *base, size_t size,
560 const char *name, mode_t mode);
561int snd_sof_trace_update_pos(struct snd_sof_dev *sdev,
562 struct sof_ipc_dma_trace_posn *posn);
563void snd_sof_trace_notify_for_error(struct snd_sof_dev *sdev);
564void sof_print_oops_and_stack(struct snd_sof_dev *sdev, const char *level,
565 u32 panic_code, u32 tracep_code, void *oops,
566 struct sof_ipc_panic_info *panic_info,
567 void *stack, size_t stack_words);
568int snd_sof_init_trace_ipc(struct snd_sof_dev *sdev);
569void snd_sof_handle_fw_exception(struct snd_sof_dev *sdev);
570int snd_sof_dbg_memory_info_init(struct snd_sof_dev *sdev);
571int snd_sof_debugfs_add_region_item_iomem(struct snd_sof_dev *sdev,
572 enum snd_sof_fw_blk_type blk_type, u32 offset, size_t size,
573 const char *name, enum sof_debugfs_access_type access_type);
574
575/*
576 * DSP Architectures.
577 */
578static inline void sof_stack(struct snd_sof_dev *sdev, const char *level,
579 void *oops, u32 *stack, u32 stack_words)
580{
581 sof_dsp_arch_ops(sdev)->dsp_stack(sdev, level, oops, stack,
582 stack_words);
583}
584
585static inline void sof_oops(struct snd_sof_dev *sdev, const char *level, void *oops)
586{
587 if (sof_dsp_arch_ops(sdev)->dsp_oops)
588 sof_dsp_arch_ops(sdev)->dsp_oops(sdev, level, oops);
589}
590
591extern const struct dsp_arch_ops sof_xtensa_arch_ops;
592
593/*
594 * Firmware state tracking
595 */
596static inline void sof_set_fw_state(struct snd_sof_dev *sdev,
597 enum sof_fw_state new_state)
598{
599 if (sdev->fw_state == new_state)
600 return;
601
602 dev_dbg(sdev->dev, "fw_state change: %d -> %d\n", sdev->fw_state, new_state);
603 sdev->fw_state = new_state;
604}
605
606/*
607 * Utilities
608 */
609void sof_io_write(struct snd_sof_dev *sdev, void __iomem *addr, u32 value);
610void sof_io_write64(struct snd_sof_dev *sdev, void __iomem *addr, u64 value);
611u32 sof_io_read(struct snd_sof_dev *sdev, void __iomem *addr);
612u64 sof_io_read64(struct snd_sof_dev *sdev, void __iomem *addr);
613void sof_mailbox_write(struct snd_sof_dev *sdev, u32 offset,
614 void *message, size_t bytes);
615void sof_mailbox_read(struct snd_sof_dev *sdev, u32 offset,
616 void *message, size_t bytes);
617int sof_block_write(struct snd_sof_dev *sdev, enum snd_sof_fw_blk_type blk_type,
618 u32 offset, void *src, size_t size);
619int sof_block_read(struct snd_sof_dev *sdev, enum snd_sof_fw_blk_type blk_type,
620 u32 offset, void *dest, size_t size);
621
622int sof_fw_ready(struct snd_sof_dev *sdev, u32 msg_id);
623
624int sof_ipc_msg_data(struct snd_sof_dev *sdev,
625 struct snd_pcm_substream *substream,
626 void *p, size_t sz);
627int sof_ipc_pcm_params(struct snd_sof_dev *sdev,
628 struct snd_pcm_substream *substream,
629 const struct sof_ipc_pcm_params_reply *reply);
630
631int sof_stream_pcm_open(struct snd_sof_dev *sdev,
632 struct snd_pcm_substream *substream);
633int sof_stream_pcm_close(struct snd_sof_dev *sdev,
634 struct snd_pcm_substream *substream);
635
636int sof_machine_check(struct snd_sof_dev *sdev);
637#endif