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1/* SPDX-License-Identifier: GPL-2.0 */ 2#ifndef _ASM_X86_PGTABLE_H 3#define _ASM_X86_PGTABLE_H 4 5#include <linux/mem_encrypt.h> 6#include <asm/page.h> 7#include <asm/pgtable_types.h> 8 9/* 10 * Macro to mark a page protection value as UC- 11 */ 12#define pgprot_noncached(prot) \ 13 ((boot_cpu_data.x86 > 3) \ 14 ? (__pgprot(pgprot_val(prot) | \ 15 cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS))) \ 16 : (prot)) 17 18/* 19 * Macros to add or remove encryption attribute 20 */ 21#define pgprot_encrypted(prot) __pgprot(__sme_set(pgprot_val(prot))) 22#define pgprot_decrypted(prot) __pgprot(__sme_clr(pgprot_val(prot))) 23 24#ifndef __ASSEMBLY__ 25#include <linux/spinlock.h> 26#include <asm/x86_init.h> 27#include <asm/pkru.h> 28#include <asm/fpu/api.h> 29#include <asm-generic/pgtable_uffd.h> 30#include <linux/page_table_check.h> 31 32extern pgd_t early_top_pgt[PTRS_PER_PGD]; 33bool __init __early_make_pgtable(unsigned long address, pmdval_t pmd); 34 35void ptdump_walk_pgd_level(struct seq_file *m, struct mm_struct *mm); 36void ptdump_walk_pgd_level_debugfs(struct seq_file *m, struct mm_struct *mm, 37 bool user); 38void ptdump_walk_pgd_level_checkwx(void); 39void ptdump_walk_user_pgd_level_checkwx(void); 40 41#ifdef CONFIG_DEBUG_WX 42#define debug_checkwx() ptdump_walk_pgd_level_checkwx() 43#define debug_checkwx_user() ptdump_walk_user_pgd_level_checkwx() 44#else 45#define debug_checkwx() do { } while (0) 46#define debug_checkwx_user() do { } while (0) 47#endif 48 49/* 50 * ZERO_PAGE is a global shared page that is always zero: used 51 * for zero-mapped memory areas etc.. 52 */ 53extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] 54 __visible; 55#define ZERO_PAGE(vaddr) ((void)(vaddr),virt_to_page(empty_zero_page)) 56 57extern spinlock_t pgd_lock; 58extern struct list_head pgd_list; 59 60extern struct mm_struct *pgd_page_get_mm(struct page *page); 61 62extern pmdval_t early_pmd_flags; 63 64#ifdef CONFIG_PARAVIRT_XXL 65#include <asm/paravirt.h> 66#else /* !CONFIG_PARAVIRT_XXL */ 67#define set_pte(ptep, pte) native_set_pte(ptep, pte) 68 69#define set_pte_atomic(ptep, pte) \ 70 native_set_pte_atomic(ptep, pte) 71 72#define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd) 73 74#ifndef __PAGETABLE_P4D_FOLDED 75#define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd) 76#define pgd_clear(pgd) (pgtable_l5_enabled() ? native_pgd_clear(pgd) : 0) 77#endif 78 79#ifndef set_p4d 80# define set_p4d(p4dp, p4d) native_set_p4d(p4dp, p4d) 81#endif 82 83#ifndef __PAGETABLE_PUD_FOLDED 84#define p4d_clear(p4d) native_p4d_clear(p4d) 85#endif 86 87#ifndef set_pud 88# define set_pud(pudp, pud) native_set_pud(pudp, pud) 89#endif 90 91#ifndef __PAGETABLE_PUD_FOLDED 92#define pud_clear(pud) native_pud_clear(pud) 93#endif 94 95#define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep) 96#define pmd_clear(pmd) native_pmd_clear(pmd) 97 98#define pgd_val(x) native_pgd_val(x) 99#define __pgd(x) native_make_pgd(x) 100 101#ifndef __PAGETABLE_P4D_FOLDED 102#define p4d_val(x) native_p4d_val(x) 103#define __p4d(x) native_make_p4d(x) 104#endif 105 106#ifndef __PAGETABLE_PUD_FOLDED 107#define pud_val(x) native_pud_val(x) 108#define __pud(x) native_make_pud(x) 109#endif 110 111#ifndef __PAGETABLE_PMD_FOLDED 112#define pmd_val(x) native_pmd_val(x) 113#define __pmd(x) native_make_pmd(x) 114#endif 115 116#define pte_val(x) native_pte_val(x) 117#define __pte(x) native_make_pte(x) 118 119#define arch_end_context_switch(prev) do {} while(0) 120#endif /* CONFIG_PARAVIRT_XXL */ 121 122/* 123 * The following only work if pte_present() is true. 124 * Undefined behaviour if not.. 125 */ 126static inline int pte_dirty(pte_t pte) 127{ 128 return pte_flags(pte) & _PAGE_DIRTY; 129} 130 131static inline int pte_young(pte_t pte) 132{ 133 return pte_flags(pte) & _PAGE_ACCESSED; 134} 135 136static inline int pmd_dirty(pmd_t pmd) 137{ 138 return pmd_flags(pmd) & _PAGE_DIRTY; 139} 140 141static inline int pmd_young(pmd_t pmd) 142{ 143 return pmd_flags(pmd) & _PAGE_ACCESSED; 144} 145 146static inline int pud_dirty(pud_t pud) 147{ 148 return pud_flags(pud) & _PAGE_DIRTY; 149} 150 151static inline int pud_young(pud_t pud) 152{ 153 return pud_flags(pud) & _PAGE_ACCESSED; 154} 155 156static inline int pte_write(pte_t pte) 157{ 158 return pte_flags(pte) & _PAGE_RW; 159} 160 161static inline int pte_huge(pte_t pte) 162{ 163 return pte_flags(pte) & _PAGE_PSE; 164} 165 166static inline int pte_global(pte_t pte) 167{ 168 return pte_flags(pte) & _PAGE_GLOBAL; 169} 170 171static inline int pte_exec(pte_t pte) 172{ 173 return !(pte_flags(pte) & _PAGE_NX); 174} 175 176static inline int pte_special(pte_t pte) 177{ 178 return pte_flags(pte) & _PAGE_SPECIAL; 179} 180 181/* Entries that were set to PROT_NONE are inverted */ 182 183static inline u64 protnone_mask(u64 val); 184 185static inline unsigned long pte_pfn(pte_t pte) 186{ 187 phys_addr_t pfn = pte_val(pte); 188 pfn ^= protnone_mask(pfn); 189 return (pfn & PTE_PFN_MASK) >> PAGE_SHIFT; 190} 191 192static inline unsigned long pmd_pfn(pmd_t pmd) 193{ 194 phys_addr_t pfn = pmd_val(pmd); 195 pfn ^= protnone_mask(pfn); 196 return (pfn & pmd_pfn_mask(pmd)) >> PAGE_SHIFT; 197} 198 199static inline unsigned long pud_pfn(pud_t pud) 200{ 201 phys_addr_t pfn = pud_val(pud); 202 pfn ^= protnone_mask(pfn); 203 return (pfn & pud_pfn_mask(pud)) >> PAGE_SHIFT; 204} 205 206static inline unsigned long p4d_pfn(p4d_t p4d) 207{ 208 return (p4d_val(p4d) & p4d_pfn_mask(p4d)) >> PAGE_SHIFT; 209} 210 211static inline unsigned long pgd_pfn(pgd_t pgd) 212{ 213 return (pgd_val(pgd) & PTE_PFN_MASK) >> PAGE_SHIFT; 214} 215 216#define p4d_leaf p4d_large 217static inline int p4d_large(p4d_t p4d) 218{ 219 /* No 512 GiB pages yet */ 220 return 0; 221} 222 223#define pte_page(pte) pfn_to_page(pte_pfn(pte)) 224 225#define pmd_leaf pmd_large 226static inline int pmd_large(pmd_t pte) 227{ 228 return pmd_flags(pte) & _PAGE_PSE; 229} 230 231#ifdef CONFIG_TRANSPARENT_HUGEPAGE 232/* NOTE: when predicate huge page, consider also pmd_devmap, or use pmd_large */ 233static inline int pmd_trans_huge(pmd_t pmd) 234{ 235 return (pmd_val(pmd) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE; 236} 237 238#ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD 239static inline int pud_trans_huge(pud_t pud) 240{ 241 return (pud_val(pud) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE; 242} 243#endif 244 245#define has_transparent_hugepage has_transparent_hugepage 246static inline int has_transparent_hugepage(void) 247{ 248 return boot_cpu_has(X86_FEATURE_PSE); 249} 250 251#ifdef CONFIG_ARCH_HAS_PTE_DEVMAP 252static inline int pmd_devmap(pmd_t pmd) 253{ 254 return !!(pmd_val(pmd) & _PAGE_DEVMAP); 255} 256 257#ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD 258static inline int pud_devmap(pud_t pud) 259{ 260 return !!(pud_val(pud) & _PAGE_DEVMAP); 261} 262#else 263static inline int pud_devmap(pud_t pud) 264{ 265 return 0; 266} 267#endif 268 269static inline int pgd_devmap(pgd_t pgd) 270{ 271 return 0; 272} 273#endif 274#endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 275 276static inline pte_t pte_set_flags(pte_t pte, pteval_t set) 277{ 278 pteval_t v = native_pte_val(pte); 279 280 return native_make_pte(v | set); 281} 282 283static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear) 284{ 285 pteval_t v = native_pte_val(pte); 286 287 return native_make_pte(v & ~clear); 288} 289 290#ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP 291static inline int pte_uffd_wp(pte_t pte) 292{ 293 return pte_flags(pte) & _PAGE_UFFD_WP; 294} 295 296static inline pte_t pte_mkuffd_wp(pte_t pte) 297{ 298 return pte_set_flags(pte, _PAGE_UFFD_WP); 299} 300 301static inline pte_t pte_clear_uffd_wp(pte_t pte) 302{ 303 return pte_clear_flags(pte, _PAGE_UFFD_WP); 304} 305#endif /* CONFIG_HAVE_ARCH_USERFAULTFD_WP */ 306 307static inline pte_t pte_mkclean(pte_t pte) 308{ 309 return pte_clear_flags(pte, _PAGE_DIRTY); 310} 311 312static inline pte_t pte_mkold(pte_t pte) 313{ 314 return pte_clear_flags(pte, _PAGE_ACCESSED); 315} 316 317static inline pte_t pte_wrprotect(pte_t pte) 318{ 319 return pte_clear_flags(pte, _PAGE_RW); 320} 321 322static inline pte_t pte_mkexec(pte_t pte) 323{ 324 return pte_clear_flags(pte, _PAGE_NX); 325} 326 327static inline pte_t pte_mkdirty(pte_t pte) 328{ 329 return pte_set_flags(pte, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); 330} 331 332static inline pte_t pte_mkyoung(pte_t pte) 333{ 334 return pte_set_flags(pte, _PAGE_ACCESSED); 335} 336 337static inline pte_t pte_mkwrite(pte_t pte) 338{ 339 return pte_set_flags(pte, _PAGE_RW); 340} 341 342static inline pte_t pte_mkhuge(pte_t pte) 343{ 344 return pte_set_flags(pte, _PAGE_PSE); 345} 346 347static inline pte_t pte_clrhuge(pte_t pte) 348{ 349 return pte_clear_flags(pte, _PAGE_PSE); 350} 351 352static inline pte_t pte_mkglobal(pte_t pte) 353{ 354 return pte_set_flags(pte, _PAGE_GLOBAL); 355} 356 357static inline pte_t pte_clrglobal(pte_t pte) 358{ 359 return pte_clear_flags(pte, _PAGE_GLOBAL); 360} 361 362static inline pte_t pte_mkspecial(pte_t pte) 363{ 364 return pte_set_flags(pte, _PAGE_SPECIAL); 365} 366 367static inline pte_t pte_mkdevmap(pte_t pte) 368{ 369 return pte_set_flags(pte, _PAGE_SPECIAL|_PAGE_DEVMAP); 370} 371 372static inline pmd_t pmd_set_flags(pmd_t pmd, pmdval_t set) 373{ 374 pmdval_t v = native_pmd_val(pmd); 375 376 return native_make_pmd(v | set); 377} 378 379static inline pmd_t pmd_clear_flags(pmd_t pmd, pmdval_t clear) 380{ 381 pmdval_t v = native_pmd_val(pmd); 382 383 return native_make_pmd(v & ~clear); 384} 385 386#ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP 387static inline int pmd_uffd_wp(pmd_t pmd) 388{ 389 return pmd_flags(pmd) & _PAGE_UFFD_WP; 390} 391 392static inline pmd_t pmd_mkuffd_wp(pmd_t pmd) 393{ 394 return pmd_set_flags(pmd, _PAGE_UFFD_WP); 395} 396 397static inline pmd_t pmd_clear_uffd_wp(pmd_t pmd) 398{ 399 return pmd_clear_flags(pmd, _PAGE_UFFD_WP); 400} 401#endif /* CONFIG_HAVE_ARCH_USERFAULTFD_WP */ 402 403static inline pmd_t pmd_mkold(pmd_t pmd) 404{ 405 return pmd_clear_flags(pmd, _PAGE_ACCESSED); 406} 407 408static inline pmd_t pmd_mkclean(pmd_t pmd) 409{ 410 return pmd_clear_flags(pmd, _PAGE_DIRTY); 411} 412 413static inline pmd_t pmd_wrprotect(pmd_t pmd) 414{ 415 return pmd_clear_flags(pmd, _PAGE_RW); 416} 417 418static inline pmd_t pmd_mkdirty(pmd_t pmd) 419{ 420 return pmd_set_flags(pmd, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); 421} 422 423static inline pmd_t pmd_mkdevmap(pmd_t pmd) 424{ 425 return pmd_set_flags(pmd, _PAGE_DEVMAP); 426} 427 428static inline pmd_t pmd_mkhuge(pmd_t pmd) 429{ 430 return pmd_set_flags(pmd, _PAGE_PSE); 431} 432 433static inline pmd_t pmd_mkyoung(pmd_t pmd) 434{ 435 return pmd_set_flags(pmd, _PAGE_ACCESSED); 436} 437 438static inline pmd_t pmd_mkwrite(pmd_t pmd) 439{ 440 return pmd_set_flags(pmd, _PAGE_RW); 441} 442 443static inline pud_t pud_set_flags(pud_t pud, pudval_t set) 444{ 445 pudval_t v = native_pud_val(pud); 446 447 return native_make_pud(v | set); 448} 449 450static inline pud_t pud_clear_flags(pud_t pud, pudval_t clear) 451{ 452 pudval_t v = native_pud_val(pud); 453 454 return native_make_pud(v & ~clear); 455} 456 457static inline pud_t pud_mkold(pud_t pud) 458{ 459 return pud_clear_flags(pud, _PAGE_ACCESSED); 460} 461 462static inline pud_t pud_mkclean(pud_t pud) 463{ 464 return pud_clear_flags(pud, _PAGE_DIRTY); 465} 466 467static inline pud_t pud_wrprotect(pud_t pud) 468{ 469 return pud_clear_flags(pud, _PAGE_RW); 470} 471 472static inline pud_t pud_mkdirty(pud_t pud) 473{ 474 return pud_set_flags(pud, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); 475} 476 477static inline pud_t pud_mkdevmap(pud_t pud) 478{ 479 return pud_set_flags(pud, _PAGE_DEVMAP); 480} 481 482static inline pud_t pud_mkhuge(pud_t pud) 483{ 484 return pud_set_flags(pud, _PAGE_PSE); 485} 486 487static inline pud_t pud_mkyoung(pud_t pud) 488{ 489 return pud_set_flags(pud, _PAGE_ACCESSED); 490} 491 492static inline pud_t pud_mkwrite(pud_t pud) 493{ 494 return pud_set_flags(pud, _PAGE_RW); 495} 496 497#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY 498static inline int pte_soft_dirty(pte_t pte) 499{ 500 return pte_flags(pte) & _PAGE_SOFT_DIRTY; 501} 502 503static inline int pmd_soft_dirty(pmd_t pmd) 504{ 505 return pmd_flags(pmd) & _PAGE_SOFT_DIRTY; 506} 507 508static inline int pud_soft_dirty(pud_t pud) 509{ 510 return pud_flags(pud) & _PAGE_SOFT_DIRTY; 511} 512 513static inline pte_t pte_mksoft_dirty(pte_t pte) 514{ 515 return pte_set_flags(pte, _PAGE_SOFT_DIRTY); 516} 517 518static inline pmd_t pmd_mksoft_dirty(pmd_t pmd) 519{ 520 return pmd_set_flags(pmd, _PAGE_SOFT_DIRTY); 521} 522 523static inline pud_t pud_mksoft_dirty(pud_t pud) 524{ 525 return pud_set_flags(pud, _PAGE_SOFT_DIRTY); 526} 527 528static inline pte_t pte_clear_soft_dirty(pte_t pte) 529{ 530 return pte_clear_flags(pte, _PAGE_SOFT_DIRTY); 531} 532 533static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd) 534{ 535 return pmd_clear_flags(pmd, _PAGE_SOFT_DIRTY); 536} 537 538static inline pud_t pud_clear_soft_dirty(pud_t pud) 539{ 540 return pud_clear_flags(pud, _PAGE_SOFT_DIRTY); 541} 542 543#endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */ 544 545/* 546 * Mask out unsupported bits in a present pgprot. Non-present pgprots 547 * can use those bits for other purposes, so leave them be. 548 */ 549static inline pgprotval_t massage_pgprot(pgprot_t pgprot) 550{ 551 pgprotval_t protval = pgprot_val(pgprot); 552 553 if (protval & _PAGE_PRESENT) 554 protval &= __supported_pte_mask; 555 556 return protval; 557} 558 559static inline pgprotval_t check_pgprot(pgprot_t pgprot) 560{ 561 pgprotval_t massaged_val = massage_pgprot(pgprot); 562 563 /* mmdebug.h can not be included here because of dependencies */ 564#ifdef CONFIG_DEBUG_VM 565 WARN_ONCE(pgprot_val(pgprot) != massaged_val, 566 "attempted to set unsupported pgprot: %016llx " 567 "bits: %016llx supported: %016llx\n", 568 (u64)pgprot_val(pgprot), 569 (u64)pgprot_val(pgprot) ^ massaged_val, 570 (u64)__supported_pte_mask); 571#endif 572 573 return massaged_val; 574} 575 576static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot) 577{ 578 phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT; 579 pfn ^= protnone_mask(pgprot_val(pgprot)); 580 pfn &= PTE_PFN_MASK; 581 return __pte(pfn | check_pgprot(pgprot)); 582} 583 584static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot) 585{ 586 phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT; 587 pfn ^= protnone_mask(pgprot_val(pgprot)); 588 pfn &= PHYSICAL_PMD_PAGE_MASK; 589 return __pmd(pfn | check_pgprot(pgprot)); 590} 591 592static inline pud_t pfn_pud(unsigned long page_nr, pgprot_t pgprot) 593{ 594 phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT; 595 pfn ^= protnone_mask(pgprot_val(pgprot)); 596 pfn &= PHYSICAL_PUD_PAGE_MASK; 597 return __pud(pfn | check_pgprot(pgprot)); 598} 599 600static inline pmd_t pmd_mkinvalid(pmd_t pmd) 601{ 602 return pfn_pmd(pmd_pfn(pmd), 603 __pgprot(pmd_flags(pmd) & ~(_PAGE_PRESENT|_PAGE_PROTNONE))); 604} 605 606static inline u64 flip_protnone_guard(u64 oldval, u64 val, u64 mask); 607 608static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 609{ 610 pteval_t val = pte_val(pte), oldval = val; 611 612 /* 613 * Chop off the NX bit (if present), and add the NX portion of 614 * the newprot (if present): 615 */ 616 val &= _PAGE_CHG_MASK; 617 val |= check_pgprot(newprot) & ~_PAGE_CHG_MASK; 618 val = flip_protnone_guard(oldval, val, PTE_PFN_MASK); 619 return __pte(val); 620} 621 622static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot) 623{ 624 pmdval_t val = pmd_val(pmd), oldval = val; 625 626 val &= _HPAGE_CHG_MASK; 627 val |= check_pgprot(newprot) & ~_HPAGE_CHG_MASK; 628 val = flip_protnone_guard(oldval, val, PHYSICAL_PMD_PAGE_MASK); 629 return __pmd(val); 630} 631 632/* 633 * mprotect needs to preserve PAT and encryption bits when updating 634 * vm_page_prot 635 */ 636#define pgprot_modify pgprot_modify 637static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot) 638{ 639 pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK; 640 pgprotval_t addbits = pgprot_val(newprot) & ~_PAGE_CHG_MASK; 641 return __pgprot(preservebits | addbits); 642} 643 644#define pte_pgprot(x) __pgprot(pte_flags(x)) 645#define pmd_pgprot(x) __pgprot(pmd_flags(x)) 646#define pud_pgprot(x) __pgprot(pud_flags(x)) 647#define p4d_pgprot(x) __pgprot(p4d_flags(x)) 648 649#define canon_pgprot(p) __pgprot(massage_pgprot(p)) 650 651static inline pgprot_t arch_filter_pgprot(pgprot_t prot) 652{ 653 return canon_pgprot(prot); 654} 655 656static inline int is_new_memtype_allowed(u64 paddr, unsigned long size, 657 enum page_cache_mode pcm, 658 enum page_cache_mode new_pcm) 659{ 660 /* 661 * PAT type is always WB for untracked ranges, so no need to check. 662 */ 663 if (x86_platform.is_untracked_pat_range(paddr, paddr + size)) 664 return 1; 665 666 /* 667 * Certain new memtypes are not allowed with certain 668 * requested memtype: 669 * - request is uncached, return cannot be write-back 670 * - request is write-combine, return cannot be write-back 671 * - request is write-through, return cannot be write-back 672 * - request is write-through, return cannot be write-combine 673 */ 674 if ((pcm == _PAGE_CACHE_MODE_UC_MINUS && 675 new_pcm == _PAGE_CACHE_MODE_WB) || 676 (pcm == _PAGE_CACHE_MODE_WC && 677 new_pcm == _PAGE_CACHE_MODE_WB) || 678 (pcm == _PAGE_CACHE_MODE_WT && 679 new_pcm == _PAGE_CACHE_MODE_WB) || 680 (pcm == _PAGE_CACHE_MODE_WT && 681 new_pcm == _PAGE_CACHE_MODE_WC)) { 682 return 0; 683 } 684 685 return 1; 686} 687 688pmd_t *populate_extra_pmd(unsigned long vaddr); 689pte_t *populate_extra_pte(unsigned long vaddr); 690 691#ifdef CONFIG_PAGE_TABLE_ISOLATION 692pgd_t __pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd); 693 694/* 695 * Take a PGD location (pgdp) and a pgd value that needs to be set there. 696 * Populates the user and returns the resulting PGD that must be set in 697 * the kernel copy of the page tables. 698 */ 699static inline pgd_t pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd) 700{ 701 if (!static_cpu_has(X86_FEATURE_PTI)) 702 return pgd; 703 return __pti_set_user_pgtbl(pgdp, pgd); 704} 705#else /* CONFIG_PAGE_TABLE_ISOLATION */ 706static inline pgd_t pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd) 707{ 708 return pgd; 709} 710#endif /* CONFIG_PAGE_TABLE_ISOLATION */ 711 712#endif /* __ASSEMBLY__ */ 713 714 715#ifdef CONFIG_X86_32 716# include <asm/pgtable_32.h> 717#else 718# include <asm/pgtable_64.h> 719#endif 720 721#ifndef __ASSEMBLY__ 722#include <linux/mm_types.h> 723#include <linux/mmdebug.h> 724#include <linux/log2.h> 725#include <asm/fixmap.h> 726 727static inline int pte_none(pte_t pte) 728{ 729 return !(pte.pte & ~(_PAGE_KNL_ERRATUM_MASK)); 730} 731 732#define __HAVE_ARCH_PTE_SAME 733static inline int pte_same(pte_t a, pte_t b) 734{ 735 return a.pte == b.pte; 736} 737 738static inline int pte_present(pte_t a) 739{ 740 return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE); 741} 742 743#ifdef CONFIG_ARCH_HAS_PTE_DEVMAP 744static inline int pte_devmap(pte_t a) 745{ 746 return (pte_flags(a) & _PAGE_DEVMAP) == _PAGE_DEVMAP; 747} 748#endif 749 750#define pte_accessible pte_accessible 751static inline bool pte_accessible(struct mm_struct *mm, pte_t a) 752{ 753 if (pte_flags(a) & _PAGE_PRESENT) 754 return true; 755 756 if ((pte_flags(a) & _PAGE_PROTNONE) && 757 atomic_read(&mm->tlb_flush_pending)) 758 return true; 759 760 return false; 761} 762 763static inline int pmd_present(pmd_t pmd) 764{ 765 /* 766 * Checking for _PAGE_PSE is needed too because 767 * split_huge_page will temporarily clear the present bit (but 768 * the _PAGE_PSE flag will remain set at all times while the 769 * _PAGE_PRESENT bit is clear). 770 */ 771 return pmd_flags(pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE | _PAGE_PSE); 772} 773 774#ifdef CONFIG_NUMA_BALANCING 775/* 776 * These work without NUMA balancing but the kernel does not care. See the 777 * comment in include/linux/pgtable.h 778 */ 779static inline int pte_protnone(pte_t pte) 780{ 781 return (pte_flags(pte) & (_PAGE_PROTNONE | _PAGE_PRESENT)) 782 == _PAGE_PROTNONE; 783} 784 785static inline int pmd_protnone(pmd_t pmd) 786{ 787 return (pmd_flags(pmd) & (_PAGE_PROTNONE | _PAGE_PRESENT)) 788 == _PAGE_PROTNONE; 789} 790#endif /* CONFIG_NUMA_BALANCING */ 791 792static inline int pmd_none(pmd_t pmd) 793{ 794 /* Only check low word on 32-bit platforms, since it might be 795 out of sync with upper half. */ 796 unsigned long val = native_pmd_val(pmd); 797 return (val & ~_PAGE_KNL_ERRATUM_MASK) == 0; 798} 799 800static inline unsigned long pmd_page_vaddr(pmd_t pmd) 801{ 802 return (unsigned long)__va(pmd_val(pmd) & pmd_pfn_mask(pmd)); 803} 804 805/* 806 * Currently stuck as a macro due to indirect forward reference to 807 * linux/mmzone.h's __section_mem_map_addr() definition: 808 */ 809#define pmd_page(pmd) pfn_to_page(pmd_pfn(pmd)) 810 811/* 812 * Conversion functions: convert a page and protection to a page entry, 813 * and a page entry and page directory to the page they refer to. 814 * 815 * (Currently stuck as a macro because of indirect forward reference 816 * to linux/mm.h:page_to_nid()) 817 */ 818#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) 819 820static inline int pmd_bad(pmd_t pmd) 821{ 822 return (pmd_flags(pmd) & ~_PAGE_USER) != _KERNPG_TABLE; 823} 824 825static inline unsigned long pages_to_mb(unsigned long npg) 826{ 827 return npg >> (20 - PAGE_SHIFT); 828} 829 830#if CONFIG_PGTABLE_LEVELS > 2 831static inline int pud_none(pud_t pud) 832{ 833 return (native_pud_val(pud) & ~(_PAGE_KNL_ERRATUM_MASK)) == 0; 834} 835 836static inline int pud_present(pud_t pud) 837{ 838 return pud_flags(pud) & _PAGE_PRESENT; 839} 840 841static inline pmd_t *pud_pgtable(pud_t pud) 842{ 843 return (pmd_t *)__va(pud_val(pud) & pud_pfn_mask(pud)); 844} 845 846/* 847 * Currently stuck as a macro due to indirect forward reference to 848 * linux/mmzone.h's __section_mem_map_addr() definition: 849 */ 850#define pud_page(pud) pfn_to_page(pud_pfn(pud)) 851 852#define pud_leaf pud_large 853static inline int pud_large(pud_t pud) 854{ 855 return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) == 856 (_PAGE_PSE | _PAGE_PRESENT); 857} 858 859static inline int pud_bad(pud_t pud) 860{ 861 return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0; 862} 863#else 864#define pud_leaf pud_large 865static inline int pud_large(pud_t pud) 866{ 867 return 0; 868} 869#endif /* CONFIG_PGTABLE_LEVELS > 2 */ 870 871#if CONFIG_PGTABLE_LEVELS > 3 872static inline int p4d_none(p4d_t p4d) 873{ 874 return (native_p4d_val(p4d) & ~(_PAGE_KNL_ERRATUM_MASK)) == 0; 875} 876 877static inline int p4d_present(p4d_t p4d) 878{ 879 return p4d_flags(p4d) & _PAGE_PRESENT; 880} 881 882static inline pud_t *p4d_pgtable(p4d_t p4d) 883{ 884 return (pud_t *)__va(p4d_val(p4d) & p4d_pfn_mask(p4d)); 885} 886 887/* 888 * Currently stuck as a macro due to indirect forward reference to 889 * linux/mmzone.h's __section_mem_map_addr() definition: 890 */ 891#define p4d_page(p4d) pfn_to_page(p4d_pfn(p4d)) 892 893static inline int p4d_bad(p4d_t p4d) 894{ 895 unsigned long ignore_flags = _KERNPG_TABLE | _PAGE_USER; 896 897 if (IS_ENABLED(CONFIG_PAGE_TABLE_ISOLATION)) 898 ignore_flags |= _PAGE_NX; 899 900 return (p4d_flags(p4d) & ~ignore_flags) != 0; 901} 902#endif /* CONFIG_PGTABLE_LEVELS > 3 */ 903 904static inline unsigned long p4d_index(unsigned long address) 905{ 906 return (address >> P4D_SHIFT) & (PTRS_PER_P4D - 1); 907} 908 909#if CONFIG_PGTABLE_LEVELS > 4 910static inline int pgd_present(pgd_t pgd) 911{ 912 if (!pgtable_l5_enabled()) 913 return 1; 914 return pgd_flags(pgd) & _PAGE_PRESENT; 915} 916 917static inline unsigned long pgd_page_vaddr(pgd_t pgd) 918{ 919 return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK); 920} 921 922/* 923 * Currently stuck as a macro due to indirect forward reference to 924 * linux/mmzone.h's __section_mem_map_addr() definition: 925 */ 926#define pgd_page(pgd) pfn_to_page(pgd_pfn(pgd)) 927 928/* to find an entry in a page-table-directory. */ 929static inline p4d_t *p4d_offset(pgd_t *pgd, unsigned long address) 930{ 931 if (!pgtable_l5_enabled()) 932 return (p4d_t *)pgd; 933 return (p4d_t *)pgd_page_vaddr(*pgd) + p4d_index(address); 934} 935 936static inline int pgd_bad(pgd_t pgd) 937{ 938 unsigned long ignore_flags = _PAGE_USER; 939 940 if (!pgtable_l5_enabled()) 941 return 0; 942 943 if (IS_ENABLED(CONFIG_PAGE_TABLE_ISOLATION)) 944 ignore_flags |= _PAGE_NX; 945 946 return (pgd_flags(pgd) & ~ignore_flags) != _KERNPG_TABLE; 947} 948 949static inline int pgd_none(pgd_t pgd) 950{ 951 if (!pgtable_l5_enabled()) 952 return 0; 953 /* 954 * There is no need to do a workaround for the KNL stray 955 * A/D bit erratum here. PGDs only point to page tables 956 * except on 32-bit non-PAE which is not supported on 957 * KNL. 958 */ 959 return !native_pgd_val(pgd); 960} 961#endif /* CONFIG_PGTABLE_LEVELS > 4 */ 962 963#endif /* __ASSEMBLY__ */ 964 965#define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET) 966#define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY) 967 968#ifndef __ASSEMBLY__ 969 970extern int direct_gbpages; 971void init_mem_mapping(void); 972void early_alloc_pgt_buf(void); 973extern void memblock_find_dma_reserve(void); 974void __init poking_init(void); 975unsigned long init_memory_mapping(unsigned long start, 976 unsigned long end, pgprot_t prot); 977 978#ifdef CONFIG_X86_64 979extern pgd_t trampoline_pgd_entry; 980#endif 981 982/* local pte updates need not use xchg for locking */ 983static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep) 984{ 985 pte_t res = *ptep; 986 987 /* Pure native function needs no input for mm, addr */ 988 native_pte_clear(NULL, 0, ptep); 989 return res; 990} 991 992static inline pmd_t native_local_pmdp_get_and_clear(pmd_t *pmdp) 993{ 994 pmd_t res = *pmdp; 995 996 native_pmd_clear(pmdp); 997 return res; 998} 999 1000static inline pud_t native_local_pudp_get_and_clear(pud_t *pudp) 1001{ 1002 pud_t res = *pudp; 1003 1004 native_pud_clear(pudp); 1005 return res; 1006} 1007 1008static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, 1009 pte_t *ptep, pte_t pte) 1010{ 1011 page_table_check_pte_set(mm, addr, ptep, pte); 1012 set_pte(ptep, pte); 1013} 1014 1015static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr, 1016 pmd_t *pmdp, pmd_t pmd) 1017{ 1018 page_table_check_pmd_set(mm, addr, pmdp, pmd); 1019 set_pmd(pmdp, pmd); 1020} 1021 1022static inline void set_pud_at(struct mm_struct *mm, unsigned long addr, 1023 pud_t *pudp, pud_t pud) 1024{ 1025 page_table_check_pud_set(mm, addr, pudp, pud); 1026 native_set_pud(pudp, pud); 1027} 1028 1029/* 1030 * We only update the dirty/accessed state if we set 1031 * the dirty bit by hand in the kernel, since the hardware 1032 * will do the accessed bit for us, and we don't want to 1033 * race with other CPU's that might be updating the dirty 1034 * bit at the same time. 1035 */ 1036struct vm_area_struct; 1037 1038#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS 1039extern int ptep_set_access_flags(struct vm_area_struct *vma, 1040 unsigned long address, pte_t *ptep, 1041 pte_t entry, int dirty); 1042 1043#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG 1044extern int ptep_test_and_clear_young(struct vm_area_struct *vma, 1045 unsigned long addr, pte_t *ptep); 1046 1047#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH 1048extern int ptep_clear_flush_young(struct vm_area_struct *vma, 1049 unsigned long address, pte_t *ptep); 1050 1051#define __HAVE_ARCH_PTEP_GET_AND_CLEAR 1052static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, 1053 pte_t *ptep) 1054{ 1055 pte_t pte = native_ptep_get_and_clear(ptep); 1056 page_table_check_pte_clear(mm, addr, pte); 1057 return pte; 1058} 1059 1060#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL 1061static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, 1062 unsigned long addr, pte_t *ptep, 1063 int full) 1064{ 1065 pte_t pte; 1066 if (full) { 1067 /* 1068 * Full address destruction in progress; paravirt does not 1069 * care about updates and native needs no locking 1070 */ 1071 pte = native_local_ptep_get_and_clear(ptep); 1072 page_table_check_pte_clear(mm, addr, pte); 1073 } else { 1074 pte = ptep_get_and_clear(mm, addr, ptep); 1075 } 1076 return pte; 1077} 1078 1079#define __HAVE_ARCH_PTEP_CLEAR 1080static inline void ptep_clear(struct mm_struct *mm, unsigned long addr, 1081 pte_t *ptep) 1082{ 1083 if (IS_ENABLED(CONFIG_PAGE_TABLE_CHECK)) 1084 ptep_get_and_clear(mm, addr, ptep); 1085 else 1086 pte_clear(mm, addr, ptep); 1087} 1088 1089#define __HAVE_ARCH_PTEP_SET_WRPROTECT 1090static inline void ptep_set_wrprotect(struct mm_struct *mm, 1091 unsigned long addr, pte_t *ptep) 1092{ 1093 clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte); 1094} 1095 1096#define flush_tlb_fix_spurious_fault(vma, address) do { } while (0) 1097 1098#define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot)) 1099 1100#define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS 1101extern int pmdp_set_access_flags(struct vm_area_struct *vma, 1102 unsigned long address, pmd_t *pmdp, 1103 pmd_t entry, int dirty); 1104extern int pudp_set_access_flags(struct vm_area_struct *vma, 1105 unsigned long address, pud_t *pudp, 1106 pud_t entry, int dirty); 1107 1108#define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG 1109extern int pmdp_test_and_clear_young(struct vm_area_struct *vma, 1110 unsigned long addr, pmd_t *pmdp); 1111extern int pudp_test_and_clear_young(struct vm_area_struct *vma, 1112 unsigned long addr, pud_t *pudp); 1113 1114#define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH 1115extern int pmdp_clear_flush_young(struct vm_area_struct *vma, 1116 unsigned long address, pmd_t *pmdp); 1117 1118 1119#define pmd_write pmd_write 1120static inline int pmd_write(pmd_t pmd) 1121{ 1122 return pmd_flags(pmd) & _PAGE_RW; 1123} 1124 1125#define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR 1126static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, unsigned long addr, 1127 pmd_t *pmdp) 1128{ 1129 pmd_t pmd = native_pmdp_get_and_clear(pmdp); 1130 1131 page_table_check_pmd_clear(mm, addr, pmd); 1132 1133 return pmd; 1134} 1135 1136#define __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR 1137static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm, 1138 unsigned long addr, pud_t *pudp) 1139{ 1140 pud_t pud = native_pudp_get_and_clear(pudp); 1141 1142 page_table_check_pud_clear(mm, addr, pud); 1143 1144 return pud; 1145} 1146 1147#define __HAVE_ARCH_PMDP_SET_WRPROTECT 1148static inline void pmdp_set_wrprotect(struct mm_struct *mm, 1149 unsigned long addr, pmd_t *pmdp) 1150{ 1151 clear_bit(_PAGE_BIT_RW, (unsigned long *)pmdp); 1152} 1153 1154#define pud_write pud_write 1155static inline int pud_write(pud_t pud) 1156{ 1157 return pud_flags(pud) & _PAGE_RW; 1158} 1159 1160#ifndef pmdp_establish 1161#define pmdp_establish pmdp_establish 1162static inline pmd_t pmdp_establish(struct vm_area_struct *vma, 1163 unsigned long address, pmd_t *pmdp, pmd_t pmd) 1164{ 1165 page_table_check_pmd_set(vma->vm_mm, address, pmdp, pmd); 1166 if (IS_ENABLED(CONFIG_SMP)) { 1167 return xchg(pmdp, pmd); 1168 } else { 1169 pmd_t old = *pmdp; 1170 WRITE_ONCE(*pmdp, pmd); 1171 return old; 1172 } 1173} 1174#endif 1175/* 1176 * Page table pages are page-aligned. The lower half of the top 1177 * level is used for userspace and the top half for the kernel. 1178 * 1179 * Returns true for parts of the PGD that map userspace and 1180 * false for the parts that map the kernel. 1181 */ 1182static inline bool pgdp_maps_userspace(void *__ptr) 1183{ 1184 unsigned long ptr = (unsigned long)__ptr; 1185 1186 return (((ptr & ~PAGE_MASK) / sizeof(pgd_t)) < PGD_KERNEL_START); 1187} 1188 1189#define pgd_leaf pgd_large 1190static inline int pgd_large(pgd_t pgd) { return 0; } 1191 1192#ifdef CONFIG_PAGE_TABLE_ISOLATION 1193/* 1194 * All top-level PAGE_TABLE_ISOLATION page tables are order-1 pages 1195 * (8k-aligned and 8k in size). The kernel one is at the beginning 4k and 1196 * the user one is in the last 4k. To switch between them, you 1197 * just need to flip the 12th bit in their addresses. 1198 */ 1199#define PTI_PGTABLE_SWITCH_BIT PAGE_SHIFT 1200 1201/* 1202 * This generates better code than the inline assembly in 1203 * __set_bit(). 1204 */ 1205static inline void *ptr_set_bit(void *ptr, int bit) 1206{ 1207 unsigned long __ptr = (unsigned long)ptr; 1208 1209 __ptr |= BIT(bit); 1210 return (void *)__ptr; 1211} 1212static inline void *ptr_clear_bit(void *ptr, int bit) 1213{ 1214 unsigned long __ptr = (unsigned long)ptr; 1215 1216 __ptr &= ~BIT(bit); 1217 return (void *)__ptr; 1218} 1219 1220static inline pgd_t *kernel_to_user_pgdp(pgd_t *pgdp) 1221{ 1222 return ptr_set_bit(pgdp, PTI_PGTABLE_SWITCH_BIT); 1223} 1224 1225static inline pgd_t *user_to_kernel_pgdp(pgd_t *pgdp) 1226{ 1227 return ptr_clear_bit(pgdp, PTI_PGTABLE_SWITCH_BIT); 1228} 1229 1230static inline p4d_t *kernel_to_user_p4dp(p4d_t *p4dp) 1231{ 1232 return ptr_set_bit(p4dp, PTI_PGTABLE_SWITCH_BIT); 1233} 1234 1235static inline p4d_t *user_to_kernel_p4dp(p4d_t *p4dp) 1236{ 1237 return ptr_clear_bit(p4dp, PTI_PGTABLE_SWITCH_BIT); 1238} 1239#endif /* CONFIG_PAGE_TABLE_ISOLATION */ 1240 1241/* 1242 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count); 1243 * 1244 * dst - pointer to pgd range anywhere on a pgd page 1245 * src - "" 1246 * count - the number of pgds to copy. 1247 * 1248 * dst and src can be on the same page, but the range must not overlap, 1249 * and must not cross a page boundary. 1250 */ 1251static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count) 1252{ 1253 memcpy(dst, src, count * sizeof(pgd_t)); 1254#ifdef CONFIG_PAGE_TABLE_ISOLATION 1255 if (!static_cpu_has(X86_FEATURE_PTI)) 1256 return; 1257 /* Clone the user space pgd as well */ 1258 memcpy(kernel_to_user_pgdp(dst), kernel_to_user_pgdp(src), 1259 count * sizeof(pgd_t)); 1260#endif 1261} 1262 1263#define PTE_SHIFT ilog2(PTRS_PER_PTE) 1264static inline int page_level_shift(enum pg_level level) 1265{ 1266 return (PAGE_SHIFT - PTE_SHIFT) + level * PTE_SHIFT; 1267} 1268static inline unsigned long page_level_size(enum pg_level level) 1269{ 1270 return 1UL << page_level_shift(level); 1271} 1272static inline unsigned long page_level_mask(enum pg_level level) 1273{ 1274 return ~(page_level_size(level) - 1); 1275} 1276 1277/* 1278 * The x86 doesn't have any external MMU info: the kernel page 1279 * tables contain all the necessary information. 1280 */ 1281static inline void update_mmu_cache(struct vm_area_struct *vma, 1282 unsigned long addr, pte_t *ptep) 1283{ 1284} 1285static inline void update_mmu_cache_pmd(struct vm_area_struct *vma, 1286 unsigned long addr, pmd_t *pmd) 1287{ 1288} 1289static inline void update_mmu_cache_pud(struct vm_area_struct *vma, 1290 unsigned long addr, pud_t *pud) 1291{ 1292} 1293 1294#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY 1295static inline pte_t pte_swp_mksoft_dirty(pte_t pte) 1296{ 1297 return pte_set_flags(pte, _PAGE_SWP_SOFT_DIRTY); 1298} 1299 1300static inline int pte_swp_soft_dirty(pte_t pte) 1301{ 1302 return pte_flags(pte) & _PAGE_SWP_SOFT_DIRTY; 1303} 1304 1305static inline pte_t pte_swp_clear_soft_dirty(pte_t pte) 1306{ 1307 return pte_clear_flags(pte, _PAGE_SWP_SOFT_DIRTY); 1308} 1309 1310#ifdef CONFIG_ARCH_ENABLE_THP_MIGRATION 1311static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd) 1312{ 1313 return pmd_set_flags(pmd, _PAGE_SWP_SOFT_DIRTY); 1314} 1315 1316static inline int pmd_swp_soft_dirty(pmd_t pmd) 1317{ 1318 return pmd_flags(pmd) & _PAGE_SWP_SOFT_DIRTY; 1319} 1320 1321static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd) 1322{ 1323 return pmd_clear_flags(pmd, _PAGE_SWP_SOFT_DIRTY); 1324} 1325#endif 1326#endif 1327 1328#ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP 1329static inline pte_t pte_swp_mkuffd_wp(pte_t pte) 1330{ 1331 return pte_set_flags(pte, _PAGE_SWP_UFFD_WP); 1332} 1333 1334static inline int pte_swp_uffd_wp(pte_t pte) 1335{ 1336 return pte_flags(pte) & _PAGE_SWP_UFFD_WP; 1337} 1338 1339static inline pte_t pte_swp_clear_uffd_wp(pte_t pte) 1340{ 1341 return pte_clear_flags(pte, _PAGE_SWP_UFFD_WP); 1342} 1343 1344static inline pmd_t pmd_swp_mkuffd_wp(pmd_t pmd) 1345{ 1346 return pmd_set_flags(pmd, _PAGE_SWP_UFFD_WP); 1347} 1348 1349static inline int pmd_swp_uffd_wp(pmd_t pmd) 1350{ 1351 return pmd_flags(pmd) & _PAGE_SWP_UFFD_WP; 1352} 1353 1354static inline pmd_t pmd_swp_clear_uffd_wp(pmd_t pmd) 1355{ 1356 return pmd_clear_flags(pmd, _PAGE_SWP_UFFD_WP); 1357} 1358#endif /* CONFIG_HAVE_ARCH_USERFAULTFD_WP */ 1359 1360static inline u16 pte_flags_pkey(unsigned long pte_flags) 1361{ 1362#ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS 1363 /* ifdef to avoid doing 59-bit shift on 32-bit values */ 1364 return (pte_flags & _PAGE_PKEY_MASK) >> _PAGE_BIT_PKEY_BIT0; 1365#else 1366 return 0; 1367#endif 1368} 1369 1370static inline bool __pkru_allows_pkey(u16 pkey, bool write) 1371{ 1372 u32 pkru = read_pkru(); 1373 1374 if (!__pkru_allows_read(pkru, pkey)) 1375 return false; 1376 if (write && !__pkru_allows_write(pkru, pkey)) 1377 return false; 1378 1379 return true; 1380} 1381 1382/* 1383 * 'pteval' can come from a PTE, PMD or PUD. We only check 1384 * _PAGE_PRESENT, _PAGE_USER, and _PAGE_RW in here which are the 1385 * same value on all 3 types. 1386 */ 1387static inline bool __pte_access_permitted(unsigned long pteval, bool write) 1388{ 1389 unsigned long need_pte_bits = _PAGE_PRESENT|_PAGE_USER; 1390 1391 if (write) 1392 need_pte_bits |= _PAGE_RW; 1393 1394 if ((pteval & need_pte_bits) != need_pte_bits) 1395 return 0; 1396 1397 return __pkru_allows_pkey(pte_flags_pkey(pteval), write); 1398} 1399 1400#define pte_access_permitted pte_access_permitted 1401static inline bool pte_access_permitted(pte_t pte, bool write) 1402{ 1403 return __pte_access_permitted(pte_val(pte), write); 1404} 1405 1406#define pmd_access_permitted pmd_access_permitted 1407static inline bool pmd_access_permitted(pmd_t pmd, bool write) 1408{ 1409 return __pte_access_permitted(pmd_val(pmd), write); 1410} 1411 1412#define pud_access_permitted pud_access_permitted 1413static inline bool pud_access_permitted(pud_t pud, bool write) 1414{ 1415 return __pte_access_permitted(pud_val(pud), write); 1416} 1417 1418#define __HAVE_ARCH_PFN_MODIFY_ALLOWED 1 1419extern bool pfn_modify_allowed(unsigned long pfn, pgprot_t prot); 1420 1421static inline bool arch_has_pfn_modify_check(void) 1422{ 1423 return boot_cpu_has_bug(X86_BUG_L1TF); 1424} 1425 1426#define arch_faults_on_old_pte arch_faults_on_old_pte 1427static inline bool arch_faults_on_old_pte(void) 1428{ 1429 return false; 1430} 1431 1432#endif /* __ASSEMBLY__ */ 1433 1434#endif /* _ASM_X86_PGTABLE_H */