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1/* SPDX-License-Identifier: GPL-2.0-or-later */
2/*
3 * smp.h: PowerPC-specific SMP code.
4 *
5 * Original was a copy of sparc smp.h. Now heavily modified
6 * for PPC.
7 *
8 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
9 * Copyright (C) 1996-2001 Cort Dougan <cort@fsmlabs.com>
10 */
11
12#ifndef _ASM_POWERPC_SMP_H
13#define _ASM_POWERPC_SMP_H
14#ifdef __KERNEL__
15
16#include <linux/threads.h>
17#include <linux/cpumask.h>
18#include <linux/kernel.h>
19#include <linux/irqreturn.h>
20
21#ifndef __ASSEMBLY__
22
23#ifdef CONFIG_PPC64
24#include <asm/paca.h>
25#endif
26#include <asm/percpu.h>
27
28extern int boot_cpuid;
29extern int spinning_secondaries;
30extern u32 *cpu_to_phys_id;
31extern bool coregroup_enabled;
32
33extern int cpu_to_chip_id(int cpu);
34extern int *chip_id_lookup_table;
35
36DECLARE_PER_CPU(cpumask_var_t, thread_group_l1_cache_map);
37DECLARE_PER_CPU(cpumask_var_t, thread_group_l2_cache_map);
38DECLARE_PER_CPU(cpumask_var_t, thread_group_l3_cache_map);
39
40#ifdef CONFIG_SMP
41
42struct smp_ops_t {
43 void (*message_pass)(int cpu, int msg);
44#ifdef CONFIG_PPC_SMP_MUXED_IPI
45 void (*cause_ipi)(int cpu);
46#endif
47 int (*cause_nmi_ipi)(int cpu);
48 void (*probe)(void);
49 int (*kick_cpu)(int nr);
50 int (*prepare_cpu)(int nr);
51 void (*setup_cpu)(int nr);
52 void (*bringup_done)(void);
53 void (*take_timebase)(void);
54 void (*give_timebase)(void);
55 int (*cpu_disable)(void);
56 void (*cpu_die)(unsigned int nr);
57 int (*cpu_bootable)(unsigned int nr);
58#ifdef CONFIG_HOTPLUG_CPU
59 void (*cpu_offline_self)(void);
60#endif
61};
62
63extern int smp_send_nmi_ipi(int cpu, void (*fn)(struct pt_regs *), u64 delay_us);
64extern int smp_send_safe_nmi_ipi(int cpu, void (*fn)(struct pt_regs *), u64 delay_us);
65extern void smp_send_debugger_break(void);
66extern void start_secondary_resume(void);
67extern void smp_generic_give_timebase(void);
68extern void smp_generic_take_timebase(void);
69
70DECLARE_PER_CPU(unsigned int, cpu_pvr);
71
72#ifdef CONFIG_HOTPLUG_CPU
73int generic_cpu_disable(void);
74void generic_cpu_die(unsigned int cpu);
75void generic_set_cpu_dead(unsigned int cpu);
76void generic_set_cpu_up(unsigned int cpu);
77int generic_check_cpu_restart(unsigned int cpu);
78int is_cpu_dead(unsigned int cpu);
79#else
80#define generic_set_cpu_up(i) do { } while (0)
81#endif
82
83#ifdef CONFIG_PPC64
84#define raw_smp_processor_id() (local_paca->paca_index)
85#define hard_smp_processor_id() (get_paca()->hw_cpu_id)
86#else
87/* 32-bit */
88extern int smp_hw_index[];
89
90#define raw_smp_processor_id() (current_thread_info()->cpu)
91#define hard_smp_processor_id() (smp_hw_index[smp_processor_id()])
92
93static inline int get_hard_smp_processor_id(int cpu)
94{
95 return smp_hw_index[cpu];
96}
97
98static inline void set_hard_smp_processor_id(int cpu, int phys)
99{
100 smp_hw_index[cpu] = phys;
101}
102#endif
103
104DECLARE_PER_CPU(cpumask_var_t, cpu_sibling_map);
105DECLARE_PER_CPU(cpumask_var_t, cpu_l2_cache_map);
106DECLARE_PER_CPU(cpumask_var_t, cpu_core_map);
107DECLARE_PER_CPU(cpumask_var_t, cpu_smallcore_map);
108
109static inline struct cpumask *cpu_sibling_mask(int cpu)
110{
111 return per_cpu(cpu_sibling_map, cpu);
112}
113
114static inline struct cpumask *cpu_core_mask(int cpu)
115{
116 return per_cpu(cpu_core_map, cpu);
117}
118
119static inline struct cpumask *cpu_l2_cache_mask(int cpu)
120{
121 return per_cpu(cpu_l2_cache_map, cpu);
122}
123
124static inline struct cpumask *cpu_smallcore_mask(int cpu)
125{
126 return per_cpu(cpu_smallcore_map, cpu);
127}
128
129extern int cpu_to_core_id(int cpu);
130
131extern bool has_big_cores;
132extern bool thread_group_shares_l2;
133extern bool thread_group_shares_l3;
134
135#define cpu_smt_mask cpu_smt_mask
136#ifdef CONFIG_SCHED_SMT
137static inline const struct cpumask *cpu_smt_mask(int cpu)
138{
139 if (has_big_cores)
140 return per_cpu(cpu_smallcore_map, cpu);
141
142 return per_cpu(cpu_sibling_map, cpu);
143}
144#endif /* CONFIG_SCHED_SMT */
145
146/* Since OpenPIC has only 4 IPIs, we use slightly different message numbers.
147 *
148 * Make sure this matches openpic_request_IPIs in open_pic.c, or what shows up
149 * in /proc/interrupts will be wrong!!! --Troy */
150#define PPC_MSG_CALL_FUNCTION 0
151#define PPC_MSG_RESCHEDULE 1
152#define PPC_MSG_TICK_BROADCAST 2
153#define PPC_MSG_NMI_IPI 3
154
155/* This is only used by the powernv kernel */
156#define PPC_MSG_RM_HOST_ACTION 4
157
158#define NMI_IPI_ALL_OTHERS -2
159
160#ifdef CONFIG_NMI_IPI
161extern int smp_handle_nmi_ipi(struct pt_regs *regs);
162#else
163static inline int smp_handle_nmi_ipi(struct pt_regs *regs) { return 0; }
164#endif
165
166/* for irq controllers that have dedicated ipis per message (4) */
167extern int smp_request_message_ipi(int virq, int message);
168extern const char *smp_ipi_name[];
169
170/* for irq controllers with only a single ipi */
171extern void smp_muxed_ipi_message_pass(int cpu, int msg);
172extern void smp_muxed_ipi_set_message(int cpu, int msg);
173extern irqreturn_t smp_ipi_demux(void);
174extern irqreturn_t smp_ipi_demux_relaxed(void);
175
176void smp_init_pSeries(void);
177void smp_init_cell(void);
178void smp_setup_cpu_maps(void);
179
180extern int __cpu_disable(void);
181extern void __cpu_die(unsigned int cpu);
182
183#else
184/* for UP */
185#define hard_smp_processor_id() get_hard_smp_processor_id(0)
186#define smp_setup_cpu_maps()
187#define thread_group_shares_l2 0
188#define thread_group_shares_l3 0
189static inline void inhibit_secondary_onlining(void) {}
190static inline void uninhibit_secondary_onlining(void) {}
191static inline const struct cpumask *cpu_sibling_mask(int cpu)
192{
193 return cpumask_of(cpu);
194}
195
196static inline const struct cpumask *cpu_smallcore_mask(int cpu)
197{
198 return cpumask_of(cpu);
199}
200
201static inline const struct cpumask *cpu_l2_cache_mask(int cpu)
202{
203 return cpumask_of(cpu);
204}
205#endif /* CONFIG_SMP */
206
207#ifdef CONFIG_PPC64
208static inline int get_hard_smp_processor_id(int cpu)
209{
210 return paca_ptrs[cpu]->hw_cpu_id;
211}
212
213static inline void set_hard_smp_processor_id(int cpu, int phys)
214{
215 paca_ptrs[cpu]->hw_cpu_id = phys;
216}
217#else
218/* 32-bit */
219#ifndef CONFIG_SMP
220extern int boot_cpuid_phys;
221static inline int get_hard_smp_processor_id(int cpu)
222{
223 return boot_cpuid_phys;
224}
225
226static inline void set_hard_smp_processor_id(int cpu, int phys)
227{
228 boot_cpuid_phys = phys;
229}
230#endif /* !CONFIG_SMP */
231#endif /* !CONFIG_PPC64 */
232
233#if defined(CONFIG_PPC64) && (defined(CONFIG_SMP) || defined(CONFIG_KEXEC_CORE))
234extern void smp_release_cpus(void);
235#else
236static inline void smp_release_cpus(void) { }
237#endif
238
239extern int smt_enabled_at_boot;
240
241extern void smp_mpic_probe(void);
242extern void smp_mpic_setup_cpu(int cpu);
243extern int smp_generic_kick_cpu(int nr);
244extern int smp_generic_cpu_bootable(unsigned int nr);
245
246
247extern void smp_generic_give_timebase(void);
248extern void smp_generic_take_timebase(void);
249
250extern struct smp_ops_t *smp_ops;
251
252extern void arch_send_call_function_single_ipi(int cpu);
253extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
254
255/* Definitions relative to the secondary CPU spin loop
256 * and entry point. Not all of them exist on both 32 and
257 * 64-bit but defining them all here doesn't harm
258 */
259extern void generic_secondary_smp_init(void);
260extern unsigned long __secondary_hold_spinloop;
261extern unsigned long __secondary_hold_acknowledge;
262extern char __secondary_hold;
263extern unsigned int booting_thread_hwid;
264
265extern void __early_start(void);
266#endif /* __ASSEMBLY__ */
267
268#endif /* __KERNEL__ */
269#endif /* _ASM_POWERPC_SMP_H) */