tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1// SPDX-License-Identifier: GPL-2.0
2/dts-v1/;
3
4#include <dt-bindings/input/linux-event-codes.h>
5#include <dt-bindings/input/gpio-keys.h>
6
7#include "tegra194-p2888.dtsi"
8
9/ {
10 model = "NVIDIA Jetson AGX Xavier Developer Kit";
11 compatible = "nvidia,p2972-0000", "nvidia,tegra194";
12
13 bus@0 {
14 aconnect@2900000 {
15 status = "okay";
16
17 dma-controller@2930000 {
18 status = "okay";
19 };
20
21 interrupt-controller@2a40000 {
22 status = "okay";
23 };
24
25 ahub@2900800 {
26 status = "okay";
27
28 ports {
29 #address-cells = <1>;
30 #size-cells = <0>;
31
32 port@0 {
33 reg = <0x0>;
34
35 xbar_admaif0_ep: endpoint {
36 remote-endpoint = <&admaif0_ep>;
37 };
38 };
39
40 port@1 {
41 reg = <0x1>;
42
43 xbar_admaif1_ep: endpoint {
44 remote-endpoint = <&admaif1_ep>;
45 };
46 };
47
48 port@2 {
49 reg = <0x2>;
50
51 xbar_admaif2_ep: endpoint {
52 remote-endpoint = <&admaif2_ep>;
53 };
54 };
55
56 port@3 {
57 reg = <0x3>;
58
59 xbar_admaif3_ep: endpoint {
60 remote-endpoint = <&admaif3_ep>;
61 };
62 };
63
64 port@4 {
65 reg = <0x4>;
66
67 xbar_admaif4_ep: endpoint {
68 remote-endpoint = <&admaif4_ep>;
69 };
70 };
71
72 port@5 {
73 reg = <0x5>;
74
75 xbar_admaif5_ep: endpoint {
76 remote-endpoint = <&admaif5_ep>;
77 };
78 };
79
80 port@6 {
81 reg = <0x6>;
82
83 xbar_admaif6_ep: endpoint {
84 remote-endpoint = <&admaif6_ep>;
85 };
86 };
87
88 port@7 {
89 reg = <0x7>;
90
91 xbar_admaif7_ep: endpoint {
92 remote-endpoint = <&admaif7_ep>;
93 };
94 };
95
96 port@8 {
97 reg = <0x8>;
98
99 xbar_admaif8_ep: endpoint {
100 remote-endpoint = <&admaif8_ep>;
101 };
102 };
103
104 port@9 {
105 reg = <0x9>;
106
107 xbar_admaif9_ep: endpoint {
108 remote-endpoint = <&admaif9_ep>;
109 };
110 };
111
112 port@a {
113 reg = <0xa>;
114
115 xbar_admaif10_ep: endpoint {
116 remote-endpoint = <&admaif10_ep>;
117 };
118 };
119
120 port@b {
121 reg = <0xb>;
122
123 xbar_admaif11_ep: endpoint {
124 remote-endpoint = <&admaif11_ep>;
125 };
126 };
127
128 port@c {
129 reg = <0xc>;
130
131 xbar_admaif12_ep: endpoint {
132 remote-endpoint = <&admaif12_ep>;
133 };
134 };
135
136 port@d {
137 reg = <0xd>;
138
139 xbar_admaif13_ep: endpoint {
140 remote-endpoint = <&admaif13_ep>;
141 };
142 };
143
144 port@e {
145 reg = <0xe>;
146
147 xbar_admaif14_ep: endpoint {
148 remote-endpoint = <&admaif14_ep>;
149 };
150 };
151
152 port@f {
153 reg = <0xf>;
154
155 xbar_admaif15_ep: endpoint {
156 remote-endpoint = <&admaif15_ep>;
157 };
158 };
159
160 port@10 {
161 reg = <0x10>;
162
163 xbar_admaif16_ep: endpoint {
164 remote-endpoint = <&admaif16_ep>;
165 };
166 };
167
168 port@11 {
169 reg = <0x11>;
170
171 xbar_admaif17_ep: endpoint {
172 remote-endpoint = <&admaif17_ep>;
173 };
174 };
175
176 port@12 {
177 reg = <0x12>;
178
179 xbar_admaif18_ep: endpoint {
180 remote-endpoint = <&admaif18_ep>;
181 };
182 };
183
184 port@13 {
185 reg = <0x13>;
186
187 xbar_admaif19_ep: endpoint {
188 remote-endpoint = <&admaif19_ep>;
189 };
190 };
191
192 xbar_i2s1_port: port@14 {
193 reg = <0x14>;
194
195 xbar_i2s1_ep: endpoint {
196 remote-endpoint = <&i2s1_cif_ep>;
197 };
198 };
199
200 xbar_i2s2_port: port@15 {
201 reg = <0x15>;
202
203 xbar_i2s2_ep: endpoint {
204 remote-endpoint = <&i2s2_cif_ep>;
205 };
206 };
207
208 xbar_i2s4_port: port@17 {
209 reg = <0x17>;
210
211 xbar_i2s4_ep: endpoint {
212 remote-endpoint = <&i2s4_cif_ep>;
213 };
214 };
215
216 xbar_i2s6_port: port@19 {
217 reg = <0x19>;
218
219 xbar_i2s6_ep: endpoint {
220 remote-endpoint = <&i2s6_cif_ep>;
221 };
222 };
223
224 xbar_dmic3_port: port@1c {
225 reg = <0x1c>;
226
227 xbar_dmic3_ep: endpoint {
228 remote-endpoint = <&dmic3_cif_ep>;
229 };
230 };
231
232 xbar_sfc1_in_port: port@20 {
233 reg = <0x20>;
234
235 xbar_sfc1_in_ep: endpoint {
236 remote-endpoint = <&sfc1_cif_in_ep>;
237 };
238 };
239
240 port@21 {
241 reg = <0x21>;
242
243 xbar_sfc1_out_ep: endpoint {
244 remote-endpoint = <&sfc1_cif_out_ep>;
245 };
246 };
247
248 xbar_sfc2_in_port: port@22 {
249 reg = <0x22>;
250
251 xbar_sfc2_in_ep: endpoint {
252 remote-endpoint = <&sfc2_cif_in_ep>;
253 };
254 };
255
256 port@23 {
257 reg = <0x23>;
258
259 xbar_sfc2_out_ep: endpoint {
260 remote-endpoint = <&sfc2_cif_out_ep>;
261 };
262 };
263
264 xbar_sfc3_in_port: port@24 {
265 reg = <0x24>;
266
267 xbar_sfc3_in_ep: endpoint {
268 remote-endpoint = <&sfc3_cif_in_ep>;
269 };
270 };
271
272 port@25 {
273 reg = <0x25>;
274
275 xbar_sfc3_out_ep: endpoint {
276 remote-endpoint = <&sfc3_cif_out_ep>;
277 };
278 };
279
280 xbar_sfc4_in_port: port@26 {
281 reg = <0x26>;
282
283 xbar_sfc4_in_ep: endpoint {
284 remote-endpoint = <&sfc4_cif_in_ep>;
285 };
286 };
287
288 port@27 {
289 reg = <0x27>;
290
291 xbar_sfc4_out_ep: endpoint {
292 remote-endpoint = <&sfc4_cif_out_ep>;
293 };
294 };
295
296 xbar_mvc1_in_port: port@28 {
297 reg = <0x28>;
298
299 xbar_mvc1_in_ep: endpoint {
300 remote-endpoint = <&mvc1_cif_in_ep>;
301 };
302 };
303
304 port@29 {
305 reg = <0x29>;
306
307 xbar_mvc1_out_ep: endpoint {
308 remote-endpoint = <&mvc1_cif_out_ep>;
309 };
310 };
311
312 xbar_mvc2_in_port: port@2a {
313 reg = <0x2a>;
314
315 xbar_mvc2_in_ep: endpoint {
316 remote-endpoint = <&mvc2_cif_in_ep>;
317 };
318 };
319
320 port@2b {
321 reg = <0x2b>;
322
323 xbar_mvc2_out_ep: endpoint {
324 remote-endpoint = <&mvc2_cif_out_ep>;
325 };
326 };
327
328 xbar_amx1_in1_port: port@2c {
329 reg = <0x2c>;
330
331 xbar_amx1_in1_ep: endpoint {
332 remote-endpoint = <&amx1_in1_ep>;
333 };
334 };
335
336 xbar_amx1_in2_port: port@2d {
337 reg = <0x2d>;
338
339 xbar_amx1_in2_ep: endpoint {
340 remote-endpoint = <&amx1_in2_ep>;
341 };
342 };
343
344 xbar_amx1_in3_port: port@2e {
345 reg = <0x2e>;
346
347 xbar_amx1_in3_ep: endpoint {
348 remote-endpoint = <&amx1_in3_ep>;
349 };
350 };
351
352 xbar_amx1_in4_port: port@2f {
353 reg = <0x2f>;
354
355 xbar_amx1_in4_ep: endpoint {
356 remote-endpoint = <&amx1_in4_ep>;
357 };
358 };
359
360 port@30 {
361 reg = <0x30>;
362
363 xbar_amx1_out_ep: endpoint {
364 remote-endpoint = <&amx1_out_ep>;
365 };
366 };
367
368 xbar_amx2_in1_port: port@31 {
369 reg = <0x31>;
370
371 xbar_amx2_in1_ep: endpoint {
372 remote-endpoint = <&amx2_in1_ep>;
373 };
374 };
375
376 xbar_amx2_in2_port: port@32 {
377 reg = <0x32>;
378
379 xbar_amx2_in2_ep: endpoint {
380 remote-endpoint = <&amx2_in2_ep>;
381 };
382 };
383
384 xbar_amx2_in3_port: port@33 {
385 reg = <0x33>;
386
387 xbar_amx2_in3_ep: endpoint {
388 remote-endpoint = <&amx2_in3_ep>;
389 };
390 };
391
392 xbar_amx2_in4_port: port@34 {
393 reg = <0x34>;
394
395 xbar_amx2_in4_ep: endpoint {
396 remote-endpoint = <&amx2_in4_ep>;
397 };
398 };
399
400 port@35 {
401 reg = <0x35>;
402
403 xbar_amx2_out_ep: endpoint {
404 remote-endpoint = <&amx2_out_ep>;
405 };
406 };
407
408 xbar_amx3_in1_port: port@36 {
409 reg = <0x36>;
410
411 xbar_amx3_in1_ep: endpoint {
412 remote-endpoint = <&amx3_in1_ep>;
413 };
414 };
415
416 xbar_amx3_in2_port: port@37 {
417 reg = <0x37>;
418
419 xbar_amx3_in2_ep: endpoint {
420 remote-endpoint = <&amx3_in2_ep>;
421 };
422 };
423
424 xbar_amx3_in3_port: port@38 {
425 reg = <0x38>;
426
427 xbar_amx3_in3_ep: endpoint {
428 remote-endpoint = <&amx3_in3_ep>;
429 };
430 };
431
432 xbar_amx3_in4_port: port@39 {
433 reg = <0x39>;
434
435 xbar_amx3_in4_ep: endpoint {
436 remote-endpoint = <&amx3_in4_ep>;
437 };
438 };
439
440 port@3a {
441 reg = <0x3a>;
442
443 xbar_amx3_out_ep: endpoint {
444 remote-endpoint = <&amx3_out_ep>;
445 };
446 };
447
448 xbar_amx4_in1_port: port@3b {
449 reg = <0x3b>;
450
451 xbar_amx4_in1_ep: endpoint {
452 remote-endpoint = <&amx4_in1_ep>;
453 };
454 };
455
456 xbar_amx4_in2_port: port@3c {
457 reg = <0x3c>;
458
459 xbar_amx4_in2_ep: endpoint {
460 remote-endpoint = <&amx4_in2_ep>;
461 };
462 };
463
464 xbar_amx4_in3_port: port@3d {
465 reg = <0x3d>;
466
467 xbar_amx4_in3_ep: endpoint {
468 remote-endpoint = <&amx4_in3_ep>;
469 };
470 };
471
472 xbar_amx4_in4_port: port@3e {
473 reg = <0x3e>;
474
475 xbar_amx4_in4_ep: endpoint {
476 remote-endpoint = <&amx4_in4_ep>;
477 };
478 };
479
480 port@3f {
481 reg = <0x3f>;
482
483 xbar_amx4_out_ep: endpoint {
484 remote-endpoint = <&amx4_out_ep>;
485 };
486 };
487
488 xbar_adx1_in_port: port@40 {
489 reg = <0x40>;
490
491 xbar_adx1_in_ep: endpoint {
492 remote-endpoint = <&adx1_in_ep>;
493 };
494 };
495
496 port@41 {
497 reg = <0x41>;
498
499 xbar_adx1_out1_ep: endpoint {
500 remote-endpoint = <&adx1_out1_ep>;
501 };
502 };
503
504 port@42 {
505 reg = <0x42>;
506
507 xbar_adx1_out2_ep: endpoint {
508 remote-endpoint = <&adx1_out2_ep>;
509 };
510 };
511
512 port@43 {
513 reg = <0x43>;
514
515 xbar_adx1_out3_ep: endpoint {
516 remote-endpoint = <&adx1_out3_ep>;
517 };
518 };
519
520 port@44 {
521 reg = <0x44>;
522
523 xbar_adx1_out4_ep: endpoint {
524 remote-endpoint = <&adx1_out4_ep>;
525 };
526 };
527
528 xbar_adx2_in_port: port@45 {
529 reg = <0x45>;
530
531 xbar_adx2_in_ep: endpoint {
532 remote-endpoint = <&adx2_in_ep>;
533 };
534 };
535
536 port@46 {
537 reg = <0x46>;
538
539 xbar_adx2_out1_ep: endpoint {
540 remote-endpoint = <&adx2_out1_ep>;
541 };
542 };
543
544 port@47 {
545 reg = <0x47>;
546
547 xbar_adx2_out2_ep: endpoint {
548 remote-endpoint = <&adx2_out2_ep>;
549 };
550 };
551
552 port@48 {
553 reg = <0x48>;
554
555 xbar_adx2_out3_ep: endpoint {
556 remote-endpoint = <&adx2_out3_ep>;
557 };
558 };
559
560 port@49 {
561 reg = <0x49>;
562
563 xbar_adx2_out4_ep: endpoint {
564 remote-endpoint = <&adx2_out4_ep>;
565 };
566 };
567
568 xbar_adx3_in_port: port@4a {
569 reg = <0x4a>;
570
571 xbar_adx3_in_ep: endpoint {
572 remote-endpoint = <&adx3_in_ep>;
573 };
574 };
575
576 port@4b {
577 reg = <0x4b>;
578
579 xbar_adx3_out1_ep: endpoint {
580 remote-endpoint = <&adx3_out1_ep>;
581 };
582 };
583
584 port@4c {
585 reg = <0x4c>;
586
587 xbar_adx3_out2_ep: endpoint {
588 remote-endpoint = <&adx3_out2_ep>;
589 };
590 };
591
592 port@4d {
593 reg = <0x4d>;
594
595 xbar_adx3_out3_ep: endpoint {
596 remote-endpoint = <&adx3_out3_ep>;
597 };
598 };
599
600 port@4e {
601 reg = <0x4e>;
602
603 xbar_adx3_out4_ep: endpoint {
604 remote-endpoint = <&adx3_out4_ep>;
605 };
606 };
607
608 xbar_adx4_in_port: port@4f {
609 reg = <0x4f>;
610
611 xbar_adx4_in_ep: endpoint {
612 remote-endpoint = <&adx4_in_ep>;
613 };
614 };
615
616 port@50 {
617 reg = <0x50>;
618
619 xbar_adx4_out1_ep: endpoint {
620 remote-endpoint = <&adx4_out1_ep>;
621 };
622 };
623
624 port@51 {
625 reg = <0x51>;
626
627 xbar_adx4_out2_ep: endpoint {
628 remote-endpoint = <&adx4_out2_ep>;
629 };
630 };
631
632 port@52 {
633 reg = <0x52>;
634
635 xbar_adx4_out3_ep: endpoint {
636 remote-endpoint = <&adx4_out3_ep>;
637 };
638 };
639
640 port@53 {
641 reg = <0x53>;
642
643 xbar_adx4_out4_ep: endpoint {
644 remote-endpoint = <&adx4_out4_ep>;
645 };
646 };
647
648 xbar_mixer_in1_port: port@54 {
649 reg = <0x54>;
650
651 xbar_mixer_in1_ep: endpoint {
652 remote-endpoint = <&mixer_in1_ep>;
653 };
654 };
655
656 xbar_mixer_in2_port: port@55 {
657 reg = <0x55>;
658
659 xbar_mixer_in2_ep: endpoint {
660 remote-endpoint = <&mixer_in2_ep>;
661 };
662 };
663
664 xbar_mixer_in3_port: port@56 {
665 reg = <0x56>;
666
667 xbar_mixer_in3_ep: endpoint {
668 remote-endpoint = <&mixer_in3_ep>;
669 };
670 };
671
672 xbar_mixer_in4_port: port@57 {
673 reg = <0x57>;
674
675 xbar_mixer_in4_ep: endpoint {
676 remote-endpoint = <&mixer_in4_ep>;
677 };
678 };
679
680 xbar_mixer_in5_port: port@58 {
681 reg = <0x58>;
682
683 xbar_mixer_in5_ep: endpoint {
684 remote-endpoint = <&mixer_in5_ep>;
685 };
686 };
687
688 xbar_mixer_in6_port: port@59 {
689 reg = <0x59>;
690
691 xbar_mixer_in6_ep: endpoint {
692 remote-endpoint = <&mixer_in6_ep>;
693 };
694 };
695
696 xbar_mixer_in7_port: port@5a {
697 reg = <0x5a>;
698
699 xbar_mixer_in7_ep: endpoint {
700 remote-endpoint = <&mixer_in7_ep>;
701 };
702 };
703
704 xbar_mixer_in8_port: port@5b {
705 reg = <0x5b>;
706
707 xbar_mixer_in8_ep: endpoint {
708 remote-endpoint = <&mixer_in8_ep>;
709 };
710 };
711
712 xbar_mixer_in9_port: port@5c {
713 reg = <0x5c>;
714
715 xbar_mixer_in9_ep: endpoint {
716 remote-endpoint = <&mixer_in9_ep>;
717 };
718 };
719
720 xbar_mixer_in10_port: port@5d {
721 reg = <0x5d>;
722
723 xbar_mixer_in10_ep: endpoint {
724 remote-endpoint = <&mixer_in10_ep>;
725 };
726 };
727
728 port@5e {
729 reg = <0x5e>;
730
731 xbar_mixer_out1_ep: endpoint {
732 remote-endpoint = <&mixer_out1_ep>;
733 };
734 };
735
736 port@5f {
737 reg = <0x5f>;
738
739 xbar_mixer_out2_ep: endpoint {
740 remote-endpoint = <&mixer_out2_ep>;
741 };
742 };
743
744 port@60 {
745 reg = <0x60>;
746
747 xbar_mixer_out3_ep: endpoint {
748 remote-endpoint = <&mixer_out3_ep>;
749 };
750 };
751
752 port@61 {
753 reg = <0x61>;
754
755 xbar_mixer_out4_ep: endpoint {
756 remote-endpoint = <&mixer_out4_ep>;
757 };
758 };
759
760 port@62 {
761 reg = <0x62>;
762
763 xbar_mixer_out5_ep: endpoint {
764 remote-endpoint = <&mixer_out5_ep>;
765 };
766 };
767 };
768
769 admaif@290f000 {
770 status = "okay";
771
772 ports {
773 #address-cells = <1>;
774 #size-cells = <0>;
775
776 admaif0_port: port@0 {
777 reg = <0x0>;
778
779 admaif0_ep: endpoint {
780 remote-endpoint = <&xbar_admaif0_ep>;
781 };
782 };
783
784 admaif1_port: port@1 {
785 reg = <0x1>;
786
787 admaif1_ep: endpoint {
788 remote-endpoint = <&xbar_admaif1_ep>;
789 };
790 };
791
792 admaif2_port: port@2 {
793 reg = <0x2>;
794
795 admaif2_ep: endpoint {
796 remote-endpoint = <&xbar_admaif2_ep>;
797 };
798 };
799
800 admaif3_port: port@3 {
801 reg = <0x3>;
802
803 admaif3_ep: endpoint {
804 remote-endpoint = <&xbar_admaif3_ep>;
805 };
806 };
807
808 admaif4_port: port@4 {
809 reg = <0x4>;
810
811 admaif4_ep: endpoint {
812 remote-endpoint = <&xbar_admaif4_ep>;
813 };
814 };
815
816 admaif5_port: port@5 {
817 reg = <0x5>;
818
819 admaif5_ep: endpoint {
820 remote-endpoint = <&xbar_admaif5_ep>;
821 };
822 };
823
824 admaif6_port: port@6 {
825 reg = <0x6>;
826
827 admaif6_ep: endpoint {
828 remote-endpoint = <&xbar_admaif6_ep>;
829 };
830 };
831
832 admaif7_port: port@7 {
833 reg = <0x7>;
834
835 admaif7_ep: endpoint {
836 remote-endpoint = <&xbar_admaif7_ep>;
837 };
838 };
839
840 admaif8_port: port@8 {
841 reg = <0x8>;
842
843 admaif8_ep: endpoint {
844 remote-endpoint = <&xbar_admaif8_ep>;
845 };
846 };
847
848 admaif9_port: port@9 {
849 reg = <0x9>;
850
851 admaif9_ep: endpoint {
852 remote-endpoint = <&xbar_admaif9_ep>;
853 };
854 };
855
856 admaif10_port: port@a {
857 reg = <0xa>;
858
859 admaif10_ep: endpoint {
860 remote-endpoint = <&xbar_admaif10_ep>;
861 };
862 };
863
864 admaif11_port: port@b {
865 reg = <0xb>;
866
867 admaif11_ep: endpoint {
868 remote-endpoint = <&xbar_admaif11_ep>;
869 };
870 };
871
872 admaif12_port: port@c {
873 reg = <0xc>;
874
875 admaif12_ep: endpoint {
876 remote-endpoint = <&xbar_admaif12_ep>;
877 };
878 };
879
880 admaif13_port: port@d {
881 reg = <0xd>;
882
883 admaif13_ep: endpoint {
884 remote-endpoint = <&xbar_admaif13_ep>;
885 };
886 };
887
888 admaif14_port: port@e {
889 reg = <0xe>;
890
891 admaif14_ep: endpoint {
892 remote-endpoint = <&xbar_admaif14_ep>;
893 };
894 };
895
896 admaif15_port: port@f {
897 reg = <0xf>;
898
899 admaif15_ep: endpoint {
900 remote-endpoint = <&xbar_admaif15_ep>;
901 };
902 };
903
904 admaif16_port: port@10 {
905 reg = <0x10>;
906
907 admaif16_ep: endpoint {
908 remote-endpoint = <&xbar_admaif16_ep>;
909 };
910 };
911
912 admaif17_port: port@11 {
913 reg = <0x11>;
914
915 admaif17_ep: endpoint {
916 remote-endpoint = <&xbar_admaif17_ep>;
917 };
918 };
919
920 admaif18_port: port@12 {
921 reg = <0x12>;
922
923 admaif18_ep: endpoint {
924 remote-endpoint = <&xbar_admaif18_ep>;
925 };
926 };
927
928 admaif19_port: port@13 {
929 reg = <0x13>;
930
931 admaif19_ep: endpoint {
932 remote-endpoint = <&xbar_admaif19_ep>;
933 };
934 };
935 };
936 };
937
938 i2s@2901000 {
939 status = "okay";
940
941 ports {
942 #address-cells = <1>;
943 #size-cells = <0>;
944
945 port@0 {
946 reg = <0>;
947
948 i2s1_cif_ep: endpoint {
949 remote-endpoint = <&xbar_i2s1_ep>;
950 };
951 };
952
953 i2s1_port: port@1 {
954 reg = <1>;
955
956 i2s1_dap_ep: endpoint {
957 dai-format = "i2s";
958 remote-endpoint = <&rt5658_ep>;
959 };
960 };
961 };
962 };
963
964 i2s@2901100 {
965 status = "okay";
966
967 ports {
968 #address-cells = <1>;
969 #size-cells = <0>;
970
971 port@0 {
972 reg = <0>;
973
974 i2s2_cif_ep: endpoint {
975 remote-endpoint = <&xbar_i2s2_ep>;
976 };
977 };
978
979 i2s2_port: port@1 {
980 reg = <1>;
981
982 i2s2_dap_ep: endpoint {
983 dai-format = "i2s";
984 /* Place holder for external Codec */
985 };
986 };
987 };
988 };
989
990 i2s@2901300 {
991 status = "okay";
992
993 ports {
994 #address-cells = <1>;
995 #size-cells = <0>;
996
997 port@0 {
998 reg = <0>;
999
1000 i2s4_cif_ep: endpoint {
1001 remote-endpoint = <&xbar_i2s4_ep>;
1002 };
1003 };
1004
1005 i2s4_port: port@1 {
1006 reg = <1>;
1007
1008 i2s4_dap_ep: endpoint {
1009 dai-format = "i2s";
1010 /* Place holder for external Codec */
1011 };
1012 };
1013 };
1014 };
1015
1016 i2s@2901500 {
1017 status = "okay";
1018
1019 ports {
1020 #address-cells = <1>;
1021 #size-cells = <0>;
1022
1023 port@0 {
1024 reg = <0>;
1025
1026 i2s6_cif_ep: endpoint {
1027 remote-endpoint = <&xbar_i2s6_ep>;
1028 };
1029 };
1030
1031 i2s6_port: port@1 {
1032 reg = <1>;
1033
1034 i2s6_dap_ep: endpoint {
1035 dai-format = "i2s";
1036 /* Place holder for external Codec */
1037 };
1038 };
1039 };
1040 };
1041
1042 dmic@2904200 {
1043 status = "okay";
1044
1045 ports {
1046 #address-cells = <1>;
1047 #size-cells = <0>;
1048
1049 port@0 {
1050 reg = <0>;
1051
1052 dmic3_cif_ep: endpoint {
1053 remote-endpoint = <&xbar_dmic3_ep>;
1054 };
1055 };
1056
1057 dmic3_port: port@1 {
1058 reg = <1>;
1059
1060 dmic3_dap_ep: endpoint {
1061 /* Place holder for external Codec */
1062 };
1063 };
1064 };
1065 };
1066
1067 sfc@2902000 {
1068 status = "okay";
1069
1070 ports {
1071 #address-cells = <1>;
1072 #size-cells = <0>;
1073
1074 port@0 {
1075 reg = <0>;
1076
1077 sfc1_cif_in_ep: endpoint {
1078 remote-endpoint = <&xbar_sfc1_in_ep>;
1079 };
1080 };
1081
1082 sfc1_out_port: port@1 {
1083 reg = <1>;
1084
1085 sfc1_cif_out_ep: endpoint {
1086 remote-endpoint = <&xbar_sfc1_out_ep>;
1087 };
1088 };
1089 };
1090 };
1091
1092 sfc@2902200 {
1093 status = "okay";
1094
1095 ports {
1096 #address-cells = <1>;
1097 #size-cells = <0>;
1098
1099 port@0 {
1100 reg = <0>;
1101
1102 sfc2_cif_in_ep: endpoint {
1103 remote-endpoint = <&xbar_sfc2_in_ep>;
1104 };
1105 };
1106
1107 sfc2_out_port: port@1 {
1108 reg = <1>;
1109
1110 sfc2_cif_out_ep: endpoint {
1111 remote-endpoint = <&xbar_sfc2_out_ep>;
1112 };
1113 };
1114 };
1115 };
1116
1117 sfc@2902400 {
1118 status = "okay";
1119
1120 ports {
1121 #address-cells = <1>;
1122 #size-cells = <0>;
1123
1124 port@0 {
1125 reg = <0>;
1126
1127 sfc3_cif_in_ep: endpoint {
1128 remote-endpoint = <&xbar_sfc3_in_ep>;
1129 };
1130 };
1131
1132 sfc3_out_port: port@1 {
1133 reg = <1>;
1134
1135 sfc3_cif_out_ep: endpoint {
1136 remote-endpoint = <&xbar_sfc3_out_ep>;
1137 };
1138 };
1139 };
1140 };
1141
1142 sfc@2902600 {
1143 status = "okay";
1144
1145 ports {
1146 #address-cells = <1>;
1147 #size-cells = <0>;
1148
1149 port@0 {
1150 reg = <0>;
1151
1152 sfc4_cif_in_ep: endpoint {
1153 remote-endpoint = <&xbar_sfc4_in_ep>;
1154 };
1155 };
1156
1157 sfc4_out_port: port@1 {
1158 reg = <1>;
1159
1160 sfc4_cif_out_ep: endpoint {
1161 remote-endpoint = <&xbar_sfc4_out_ep>;
1162 };
1163 };
1164 };
1165 };
1166
1167 mvc@290a000 {
1168 status = "okay";
1169
1170 ports {
1171 #address-cells = <1>;
1172 #size-cells = <0>;
1173
1174 port@0 {
1175 reg = <0>;
1176
1177 mvc1_cif_in_ep: endpoint {
1178 remote-endpoint = <&xbar_mvc1_in_ep>;
1179 };
1180 };
1181
1182 mvc1_out_port: port@1 {
1183 reg = <1>;
1184
1185 mvc1_cif_out_ep: endpoint {
1186 remote-endpoint = <&xbar_mvc1_out_ep>;
1187 };
1188 };
1189 };
1190 };
1191
1192 mvc@290a200 {
1193 status = "okay";
1194
1195 ports {
1196 #address-cells = <1>;
1197 #size-cells = <0>;
1198
1199 port@0 {
1200 reg = <0>;
1201
1202 mvc2_cif_in_ep: endpoint {
1203 remote-endpoint = <&xbar_mvc2_in_ep>;
1204 };
1205 };
1206
1207 mvc2_out_port: port@1 {
1208 reg = <1>;
1209
1210 mvc2_cif_out_ep: endpoint {
1211 remote-endpoint = <&xbar_mvc2_out_ep>;
1212 };
1213 };
1214 };
1215 };
1216
1217 amx@2903000 {
1218 status = "okay";
1219
1220 ports {
1221 #address-cells = <1>;
1222 #size-cells = <0>;
1223
1224 port@0 {
1225 reg = <0>;
1226
1227 amx1_in1_ep: endpoint {
1228 remote-endpoint = <&xbar_amx1_in1_ep>;
1229 };
1230 };
1231
1232 port@1 {
1233 reg = <1>;
1234
1235 amx1_in2_ep: endpoint {
1236 remote-endpoint = <&xbar_amx1_in2_ep>;
1237 };
1238 };
1239
1240 port@2 {
1241 reg = <2>;
1242
1243 amx1_in3_ep: endpoint {
1244 remote-endpoint = <&xbar_amx1_in3_ep>;
1245 };
1246 };
1247
1248 port@3 {
1249 reg = <3>;
1250
1251 amx1_in4_ep: endpoint {
1252 remote-endpoint = <&xbar_amx1_in4_ep>;
1253 };
1254 };
1255
1256 amx1_out_port: port@4 {
1257 reg = <4>;
1258
1259 amx1_out_ep: endpoint {
1260 remote-endpoint = <&xbar_amx1_out_ep>;
1261 };
1262 };
1263 };
1264 };
1265
1266 amx@2903100 {
1267 status = "okay";
1268
1269 ports {
1270 #address-cells = <1>;
1271 #size-cells = <0>;
1272
1273 port@0 {
1274 reg = <0>;
1275
1276 amx2_in1_ep: endpoint {
1277 remote-endpoint = <&xbar_amx2_in1_ep>;
1278 };
1279 };
1280
1281 port@1 {
1282 reg = <1>;
1283
1284 amx2_in2_ep: endpoint {
1285 remote-endpoint = <&xbar_amx2_in2_ep>;
1286 };
1287 };
1288
1289 amx2_in3_port: port@2 {
1290 reg = <2>;
1291
1292 amx2_in3_ep: endpoint {
1293 remote-endpoint = <&xbar_amx2_in3_ep>;
1294 };
1295 };
1296
1297 amx2_in4_port: port@3 {
1298 reg = <3>;
1299
1300 amx2_in4_ep: endpoint {
1301 remote-endpoint = <&xbar_amx2_in4_ep>;
1302 };
1303 };
1304
1305 amx2_out_port: port@4 {
1306 reg = <4>;
1307
1308 amx2_out_ep: endpoint {
1309 remote-endpoint = <&xbar_amx2_out_ep>;
1310 };
1311 };
1312 };
1313 };
1314
1315 amx@2903200 {
1316 status = "okay";
1317
1318 ports {
1319 #address-cells = <1>;
1320 #size-cells = <0>;
1321
1322 port@0 {
1323 reg = <0>;
1324
1325 amx3_in1_ep: endpoint {
1326 remote-endpoint = <&xbar_amx3_in1_ep>;
1327 };
1328 };
1329
1330 port@1 {
1331 reg = <1>;
1332
1333 amx3_in2_ep: endpoint {
1334 remote-endpoint = <&xbar_amx3_in2_ep>;
1335 };
1336 };
1337
1338 port@2 {
1339 reg = <2>;
1340
1341 amx3_in3_ep: endpoint {
1342 remote-endpoint = <&xbar_amx3_in3_ep>;
1343 };
1344 };
1345
1346 port@3 {
1347 reg = <3>;
1348
1349 amx3_in4_ep: endpoint {
1350 remote-endpoint = <&xbar_amx3_in4_ep>;
1351 };
1352 };
1353
1354 amx3_out_port: port@4 {
1355 reg = <4>;
1356
1357 amx3_out_ep: endpoint {
1358 remote-endpoint = <&xbar_amx3_out_ep>;
1359 };
1360 };
1361 };
1362 };
1363
1364 amx@2903300 {
1365 status = "okay";
1366
1367 ports {
1368 #address-cells = <1>;
1369 #size-cells = <0>;
1370
1371 port@0 {
1372 reg = <0>;
1373
1374 amx4_in1_ep: endpoint {
1375 remote-endpoint = <&xbar_amx4_in1_ep>;
1376 };
1377 };
1378
1379 port@1 {
1380 reg = <1>;
1381
1382 amx4_in2_ep: endpoint {
1383 remote-endpoint = <&xbar_amx4_in2_ep>;
1384 };
1385 };
1386
1387 port@2 {
1388 reg = <2>;
1389
1390 amx4_in3_ep: endpoint {
1391 remote-endpoint = <&xbar_amx4_in3_ep>;
1392 };
1393 };
1394
1395 port@3 {
1396 reg = <3>;
1397
1398 amx4_in4_ep: endpoint {
1399 remote-endpoint = <&xbar_amx4_in4_ep>;
1400 };
1401 };
1402
1403 amx4_out_port: port@4 {
1404 reg = <4>;
1405
1406 amx4_out_ep: endpoint {
1407 remote-endpoint = <&xbar_amx4_out_ep>;
1408 };
1409 };
1410 };
1411 };
1412
1413 adx@2903800 {
1414 status = "okay";
1415
1416 ports {
1417 #address-cells = <1>;
1418 #size-cells = <0>;
1419
1420 port@0 {
1421 reg = <0>;
1422
1423 adx1_in_ep: endpoint {
1424 remote-endpoint = <&xbar_adx1_in_ep>;
1425 };
1426 };
1427
1428 adx1_out1_port: port@1 {
1429 reg = <1>;
1430
1431 adx1_out1_ep: endpoint {
1432 remote-endpoint = <&xbar_adx1_out1_ep>;
1433 };
1434 };
1435
1436 adx1_out2_port: port@2 {
1437 reg = <2>;
1438
1439 adx1_out2_ep: endpoint {
1440 remote-endpoint = <&xbar_adx1_out2_ep>;
1441 };
1442 };
1443
1444 adx1_out3_port: port@3 {
1445 reg = <3>;
1446
1447 adx1_out3_ep: endpoint {
1448 remote-endpoint = <&xbar_adx1_out3_ep>;
1449 };
1450 };
1451
1452 adx1_out4_port: port@4 {
1453 reg = <4>;
1454
1455 adx1_out4_ep: endpoint {
1456 remote-endpoint = <&xbar_adx1_out4_ep>;
1457 };
1458 };
1459 };
1460 };
1461
1462 adx@2903900 {
1463 status = "okay";
1464
1465 ports {
1466 #address-cells = <1>;
1467 #size-cells = <0>;
1468
1469 port@0 {
1470 reg = <0>;
1471
1472 adx2_in_ep: endpoint {
1473 remote-endpoint = <&xbar_adx2_in_ep>;
1474 };
1475 };
1476
1477 adx2_out1_port: port@1 {
1478 reg = <1>;
1479
1480 adx2_out1_ep: endpoint {
1481 remote-endpoint = <&xbar_adx2_out1_ep>;
1482 };
1483 };
1484
1485 adx2_out2_port: port@2 {
1486 reg = <2>;
1487
1488 adx2_out2_ep: endpoint {
1489 remote-endpoint = <&xbar_adx2_out2_ep>;
1490 };
1491 };
1492
1493 adx2_out3_port: port@3 {
1494 reg = <3>;
1495
1496 adx2_out3_ep: endpoint {
1497 remote-endpoint = <&xbar_adx2_out3_ep>;
1498 };
1499 };
1500
1501 adx2_out4_port: port@4 {
1502 reg = <4>;
1503
1504 adx2_out4_ep: endpoint {
1505 remote-endpoint = <&xbar_adx2_out4_ep>;
1506 };
1507 };
1508 };
1509 };
1510
1511 adx@2903a00 {
1512 status = "okay";
1513
1514 ports {
1515 #address-cells = <1>;
1516 #size-cells = <0>;
1517
1518 port@0 {
1519 reg = <0>;
1520
1521 adx3_in_ep: endpoint {
1522 remote-endpoint = <&xbar_adx3_in_ep>;
1523 };
1524 };
1525
1526 adx3_out1_port: port@1 {
1527 reg = <1>;
1528
1529 adx3_out1_ep: endpoint {
1530 remote-endpoint = <&xbar_adx3_out1_ep>;
1531 };
1532 };
1533
1534 adx3_out2_port: port@2 {
1535 reg = <2>;
1536
1537 adx3_out2_ep: endpoint {
1538 remote-endpoint = <&xbar_adx3_out2_ep>;
1539 };
1540 };
1541
1542 adx3_out3_port: port@3 {
1543 reg = <3>;
1544
1545 adx3_out3_ep: endpoint {
1546 remote-endpoint = <&xbar_adx3_out3_ep>;
1547 };
1548 };
1549
1550 adx3_out4_port: port@4 {
1551 reg = <4>;
1552
1553 adx3_out4_ep: endpoint {
1554 remote-endpoint = <&xbar_adx3_out4_ep>;
1555 };
1556 };
1557 };
1558 };
1559
1560 adx@2903b00 {
1561 status = "okay";
1562
1563 ports {
1564 #address-cells = <1>;
1565 #size-cells = <0>;
1566
1567 port@0 {
1568 reg = <0>;
1569
1570 adx4_in_ep: endpoint {
1571 remote-endpoint = <&xbar_adx4_in_ep>;
1572 };
1573 };
1574
1575 adx4_out1_port: port@1 {
1576 reg = <1>;
1577
1578 adx4_out1_ep: endpoint {
1579 remote-endpoint = <&xbar_adx4_out1_ep>;
1580 };
1581 };
1582
1583 adx4_out2_port: port@2 {
1584 reg = <2>;
1585
1586 adx4_out2_ep: endpoint {
1587 remote-endpoint = <&xbar_adx4_out2_ep>;
1588 };
1589 };
1590
1591 adx4_out3_port: port@3 {
1592 reg = <3>;
1593
1594 adx4_out3_ep: endpoint {
1595 remote-endpoint = <&xbar_adx4_out3_ep>;
1596 };
1597 };
1598
1599 adx4_out4_port: port@4 {
1600 reg = <4>;
1601
1602 adx4_out4_ep: endpoint {
1603 remote-endpoint = <&xbar_adx4_out4_ep>;
1604 };
1605 };
1606 };
1607 };
1608
1609 amixer@290bb00 {
1610 status = "okay";
1611
1612 ports {
1613 #address-cells = <1>;
1614 #size-cells = <0>;
1615
1616 port@0 {
1617 reg = <0x0>;
1618
1619 mixer_in1_ep: endpoint {
1620 remote-endpoint = <&xbar_mixer_in1_ep>;
1621 };
1622 };
1623
1624 port@1 {
1625 reg = <0x1>;
1626
1627 mixer_in2_ep: endpoint {
1628 remote-endpoint = <&xbar_mixer_in2_ep>;
1629 };
1630 };
1631
1632 port@2 {
1633 reg = <0x2>;
1634
1635 mixer_in3_ep: endpoint {
1636 remote-endpoint = <&xbar_mixer_in3_ep>;
1637 };
1638 };
1639
1640 port@3 {
1641 reg = <0x3>;
1642
1643 mixer_in4_ep: endpoint {
1644 remote-endpoint = <&xbar_mixer_in4_ep>;
1645 };
1646 };
1647
1648 port@4 {
1649 reg = <0x4>;
1650
1651 mixer_in5_ep: endpoint {
1652 remote-endpoint = <&xbar_mixer_in5_ep>;
1653 };
1654 };
1655
1656 port@5 {
1657 reg = <0x5>;
1658
1659 mixer_in6_ep: endpoint {
1660 remote-endpoint = <&xbar_mixer_in6_ep>;
1661 };
1662 };
1663
1664 port@6 {
1665 reg = <0x6>;
1666
1667 mixer_in7_ep: endpoint {
1668 remote-endpoint = <&xbar_mixer_in7_ep>;
1669 };
1670 };
1671
1672 port@7 {
1673 reg = <0x7>;
1674
1675 mixer_in8_ep: endpoint {
1676 remote-endpoint = <&xbar_mixer_in8_ep>;
1677 };
1678 };
1679
1680 port@8 {
1681 reg = <0x8>;
1682
1683 mixer_in9_ep: endpoint {
1684 remote-endpoint = <&xbar_mixer_in9_ep>;
1685 };
1686 };
1687
1688 port@9 {
1689 reg = <0x9>;
1690
1691 mixer_in10_ep: endpoint {
1692 remote-endpoint = <&xbar_mixer_in10_ep>;
1693 };
1694 };
1695
1696 mixer_out1_port: port@a {
1697 reg = <0xa>;
1698
1699 mixer_out1_ep: endpoint {
1700 remote-endpoint = <&xbar_mixer_out1_ep>;
1701 };
1702 };
1703
1704 mixer_out2_port: port@b {
1705 reg = <0xb>;
1706
1707 mixer_out2_ep: endpoint {
1708 remote-endpoint = <&xbar_mixer_out2_ep>;
1709 };
1710 };
1711
1712 mixer_out3_port: port@c {
1713 reg = <0xc>;
1714
1715 mixer_out3_ep: endpoint {
1716 remote-endpoint = <&xbar_mixer_out3_ep>;
1717 };
1718 };
1719
1720 mixer_out4_port: port@d {
1721 reg = <0xd>;
1722
1723 mixer_out4_ep: endpoint {
1724 remote-endpoint = <&xbar_mixer_out4_ep>;
1725 };
1726 };
1727
1728 mixer_out5_port: port@e {
1729 reg = <0xe>;
1730
1731 mixer_out5_ep: endpoint {
1732 remote-endpoint = <&xbar_mixer_out5_ep>;
1733 };
1734 };
1735 };
1736 };
1737 };
1738 };
1739
1740 i2c@3160000 {
1741 eeprom@56 {
1742 compatible = "atmel,24c02";
1743 reg = <0x56>;
1744
1745 label = "system";
1746 vcc-supply = <&vdd_1v8ls>;
1747 address-width = <8>;
1748 pagesize = <8>;
1749 size = <256>;
1750 read-only;
1751 };
1752 };
1753
1754 ddc: i2c@31c0000 {
1755 status = "okay";
1756 };
1757
1758 /* SDMMC1 (SD/MMC) */
1759 mmc@3400000 {
1760 status = "okay";
1761 };
1762
1763 hda@3510000 {
1764 nvidia,model = "NVIDIA Jetson AGX Xavier HDA";
1765 status = "okay";
1766 };
1767
1768 padctl@3520000 {
1769 status = "okay";
1770
1771 pads {
1772 usb2 {
1773 lanes {
1774 usb2-0 {
1775 status = "okay";
1776 };
1777
1778 usb2-1 {
1779 status = "okay";
1780 };
1781
1782 usb2-3 {
1783 status = "okay";
1784 };
1785 };
1786 };
1787
1788 usb3 {
1789 lanes {
1790 usb3-0 {
1791 status = "okay";
1792 };
1793
1794 usb3-2 {
1795 status = "okay";
1796 };
1797
1798 usb3-3 {
1799 status = "okay";
1800 };
1801 };
1802 };
1803 };
1804
1805 ports {
1806 usb2-0 {
1807 mode = "host";
1808 status = "okay";
1809 };
1810
1811 usb2-1 {
1812 mode = "host";
1813 status = "okay";
1814 };
1815
1816 usb2-3 {
1817 mode = "host";
1818 status = "okay";
1819 };
1820
1821 usb3-0 {
1822 nvidia,usb2-companion = <1>;
1823 status = "okay";
1824 };
1825
1826 usb3-2 {
1827 nvidia,usb2-companion = <0>;
1828 status = "okay";
1829 };
1830
1831 usb3-3 {
1832 nvidia,usb2-companion = <3>;
1833 maximum-speed = "super-speed";
1834 status = "okay";
1835 };
1836 };
1837 };
1838
1839 usb@3610000 {
1840 status = "okay";
1841
1842 phys = <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-0}>,
1843 <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-1}>,
1844 <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-3}>,
1845 <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-0}>,
1846 <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-2}>,
1847 <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-3}>;
1848 phy-names = "usb2-0", "usb2-1", "usb2-3", "usb3-0", "usb3-2", "usb3-3";
1849 };
1850
1851 i2c@c250000 {
1852 status = "okay";
1853
1854 rt5658: audio-codec@1a {
1855 status = "okay";
1856
1857 compatible = "realtek,rt5658";
1858 reg = <0x1a>;
1859 interrupt-parent = <&gpio>;
1860 interrupts = <TEGRA194_MAIN_GPIO(S, 5) GPIO_ACTIVE_HIGH>;
1861 clocks = <&bpmp TEGRA194_CLK_AUD_MCLK>;
1862 clock-names = "mclk";
1863 realtek,jd-src = <2>;
1864 sound-name-prefix = "CVB-RT";
1865
1866 port {
1867 rt5658_ep: endpoint {
1868 remote-endpoint = <&i2s1_dap_ep>;
1869 mclk-fs = <256>;
1870 };
1871 };
1872 };
1873 };
1874
1875 pwm@c340000 {
1876 status = "okay";
1877 };
1878
1879 host1x@13e00000 {
1880 display-hub@15200000 {
1881 status = "okay";
1882 };
1883
1884 dpaux@155c0000 {
1885 status = "okay";
1886 };
1887
1888 dpaux@155d0000 {
1889 status = "okay";
1890 };
1891
1892 dpaux@155e0000 {
1893 status = "okay";
1894 };
1895
1896 /* DP0 */
1897 sor@15b00000 {
1898 status = "okay";
1899
1900 avdd-io-hdmi-dp-supply = <&vdd_1v0>;
1901 vdd-hdmi-dp-pll-supply = <&vdd_1v8hs>;
1902
1903 nvidia,dpaux = <&dpaux0>;
1904 };
1905
1906 /* DP1 */
1907 sor@15b40000 {
1908 status = "okay";
1909
1910 avdd-io-hdmi-dp-supply = <&vdd_1v0>;
1911 vdd-hdmi-dp-pll-supply = <&vdd_1v8hs>;
1912
1913 nvidia,dpaux = <&dpaux1>;
1914 };
1915
1916 /* HDMI */
1917 sor@15b80000 {
1918 status = "okay";
1919
1920 avdd-io-hdmi-dp-supply = <&vdd_1v0>;
1921 vdd-hdmi-dp-pll-supply = <&vdd_1v8hs>;
1922 hdmi-supply = <&vdd_hdmi>;
1923
1924 nvidia,ddc-i2c-bus = <&ddc>;
1925 nvidia,hpd-gpio = <&gpio TEGRA194_MAIN_GPIO(M, 2)
1926 GPIO_ACTIVE_LOW>;
1927 };
1928 };
1929 };
1930
1931 pcie@14100000 {
1932 status = "okay";
1933
1934 vddio-pex-ctl-supply = <&vdd_1v8ao>;
1935
1936 phys = <&p2u_hsio_0>;
1937 phy-names = "p2u-0";
1938 };
1939
1940 pcie@14140000 {
1941 status = "okay";
1942
1943 vddio-pex-ctl-supply = <&vdd_1v8ao>;
1944
1945 phys = <&p2u_hsio_7>;
1946 phy-names = "p2u-0";
1947 };
1948
1949 pcie@14180000 {
1950 status = "okay";
1951
1952 vddio-pex-ctl-supply = <&vdd_1v8ao>;
1953
1954 phys = <&p2u_hsio_2>, <&p2u_hsio_3>, <&p2u_hsio_4>,
1955 <&p2u_hsio_5>;
1956 phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3";
1957 };
1958
1959 pcie@141a0000 {
1960 status = "okay";
1961
1962 vddio-pex-ctl-supply = <&vdd_1v8ao>;
1963 vpcie3v3-supply = <&vdd_3v3_pcie>;
1964 vpcie12v-supply = <&vdd_12v_pcie>;
1965
1966 phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
1967 <&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
1968 <&p2u_nvhs_6>, <&p2u_nvhs_7>;
1969
1970 phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
1971 "p2u-5", "p2u-6", "p2u-7";
1972 };
1973
1974 pcie-ep@141a0000 {
1975 status = "disabled";
1976
1977 vddio-pex-ctl-supply = <&vdd_1v8ao>;
1978
1979 reset-gpios = <&gpio TEGRA194_MAIN_GPIO(GG, 1) GPIO_ACTIVE_LOW>;
1980
1981 nvidia,refclk-select-gpios = <&gpio_aon TEGRA194_AON_GPIO(AA, 5)
1982 GPIO_ACTIVE_HIGH>;
1983
1984 phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
1985 <&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
1986 <&p2u_nvhs_6>, <&p2u_nvhs_7>;
1987
1988 phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
1989 "p2u-5", "p2u-6", "p2u-7";
1990 };
1991
1992 fan: fan {
1993 compatible = "pwm-fan";
1994 pwms = <&pwm4 0 45334>;
1995
1996 cooling-levels = <0 64 128 255>;
1997 #cooling-cells = <2>;
1998 };
1999
2000 gpio-keys {
2001 compatible = "gpio-keys";
2002
2003 force-recovery {
2004 label = "Force Recovery";
2005 gpios = <&gpio TEGRA194_MAIN_GPIO(G, 0)
2006 GPIO_ACTIVE_LOW>;
2007 linux,input-type = <EV_KEY>;
2008 linux,code = <KEY_SLEEP>;
2009 debounce-interval = <10>;
2010 };
2011
2012 power {
2013 label = "Power";
2014 gpios = <&gpio_aon TEGRA194_AON_GPIO(EE, 4)
2015 GPIO_ACTIVE_LOW>;
2016 linux,input-type = <EV_KEY>;
2017 linux,code = <KEY_POWER>;
2018 debounce-interval = <10>;
2019 wakeup-event-action = <EV_ACT_ASSERTED>;
2020 wakeup-source;
2021 };
2022 };
2023
2024 sound {
2025 compatible = "nvidia,tegra186-audio-graph-card";
2026 status = "okay";
2027
2028 dais = /* ADMAIF (FE) Ports */
2029 <&admaif0_port>, <&admaif1_port>, <&admaif2_port>, <&admaif3_port>,
2030 <&admaif4_port>, <&admaif5_port>, <&admaif6_port>, <&admaif7_port>,
2031 <&admaif8_port>, <&admaif9_port>, <&admaif10_port>, <&admaif11_port>,
2032 <&admaif12_port>, <&admaif13_port>, <&admaif14_port>, <&admaif15_port>,
2033 <&admaif16_port>, <&admaif17_port>, <&admaif18_port>, <&admaif19_port>,
2034 /* XBAR Ports */
2035 <&xbar_i2s1_port>, <&xbar_i2s2_port>, <&xbar_i2s4_port>,
2036 <&xbar_i2s6_port>, <&xbar_dmic3_port>,
2037 <&xbar_sfc1_in_port>, <&xbar_sfc2_in_port>,
2038 <&xbar_sfc3_in_port>, <&xbar_sfc4_in_port>,
2039 <&xbar_mvc1_in_port>, <&xbar_mvc2_in_port>,
2040 <&xbar_amx1_in1_port>, <&xbar_amx1_in2_port>,
2041 <&xbar_amx1_in3_port>, <&xbar_amx1_in4_port>,
2042 <&xbar_amx2_in1_port>, <&xbar_amx2_in2_port>,
2043 <&xbar_amx2_in3_port>, <&xbar_amx2_in4_port>,
2044 <&xbar_amx3_in1_port>, <&xbar_amx3_in2_port>,
2045 <&xbar_amx3_in3_port>, <&xbar_amx3_in4_port>,
2046 <&xbar_amx4_in1_port>, <&xbar_amx4_in2_port>,
2047 <&xbar_amx4_in3_port>, <&xbar_amx4_in4_port>,
2048 <&xbar_adx1_in_port>, <&xbar_adx2_in_port>,
2049 <&xbar_adx3_in_port>, <&xbar_adx4_in_port>,
2050 <&xbar_mixer_in1_port>, <&xbar_mixer_in2_port>,
2051 <&xbar_mixer_in3_port>, <&xbar_mixer_in4_port>,
2052 <&xbar_mixer_in5_port>, <&xbar_mixer_in6_port>,
2053 <&xbar_mixer_in7_port>, <&xbar_mixer_in8_port>,
2054 <&xbar_mixer_in9_port>, <&xbar_mixer_in10_port>,
2055 /* HW accelerators */
2056 <&sfc1_out_port>, <&sfc2_out_port>,
2057 <&sfc3_out_port>, <&sfc4_out_port>,
2058 <&mvc1_out_port>, <&mvc2_out_port>,
2059 <&amx1_out_port>, <&amx2_out_port>,
2060 <&amx3_out_port>, <&amx4_out_port>,
2061 <&adx1_out1_port>, <&adx1_out2_port>,
2062 <&adx1_out3_port>, <&adx1_out4_port>,
2063 <&adx2_out1_port>, <&adx2_out2_port>,
2064 <&adx2_out3_port>, <&adx2_out4_port>,
2065 <&adx3_out1_port>, <&adx3_out2_port>,
2066 <&adx3_out3_port>, <&adx3_out4_port>,
2067 <&adx4_out1_port>, <&adx4_out2_port>,
2068 <&adx4_out3_port>, <&adx4_out4_port>,
2069 <&mixer_out1_port>, <&mixer_out2_port>, <&mixer_out3_port>,
2070 <&mixer_out4_port>, <&mixer_out5_port>,
2071 /* BE I/O Ports */
2072 <&i2s1_port>, <&i2s2_port>, <&i2s4_port>, <&i2s6_port>,
2073 <&dmic3_port>;
2074
2075 label = "NVIDIA Jetson AGX Xavier APE";
2076
2077 widgets =
2078 "Microphone", "CVB-RT MIC Jack",
2079 "Microphone", "CVB-RT MIC",
2080 "Headphone", "CVB-RT HP Jack",
2081 "Speaker", "CVB-RT SPK";
2082
2083 routing =
2084 /* I2S1 <-> RT5658 */
2085 "CVB-RT AIF1 Playback", "I2S1 DAP-Playback",
2086 "I2S1 DAP-Capture", "CVB-RT AIF1 Capture",
2087 /* RT5658 Codec controls */
2088 "CVB-RT HP Jack", "CVB-RT HPO L Playback",
2089 "CVB-RT HP Jack", "CVB-RT HPO R Playback",
2090 "CVB-RT IN1P", "CVB-RT MIC Jack",
2091 "CVB-RT IN2P", "CVB-RT MIC Jack",
2092 "CVB-RT SPK", "CVB-RT SPO Playback",
2093 "CVB-RT DMIC L1", "CVB-RT MIC",
2094 "CVB-RT DMIC L2", "CVB-RT MIC",
2095 "CVB-RT DMIC R1", "CVB-RT MIC",
2096 "CVB-RT DMIC R2", "CVB-RT MIC";
2097 };
2098
2099 thermal-zones {
2100 cpu-thermal {
2101 polling-delay = <0>;
2102 polling-delay-passive = <500>;
2103 status = "okay";
2104
2105 trips {
2106 cpu_trip_critical: critical {
2107 temperature = <96500>;
2108 hysteresis = <0>;
2109 type = "critical";
2110 };
2111
2112 cpu_trip_hot: hot {
2113 temperature = <70000>;
2114 hysteresis = <2000>;
2115 type = "hot";
2116 };
2117
2118 cpu_trip_active: active {
2119 temperature = <50000>;
2120 hysteresis = <2000>;
2121 type = "active";
2122 };
2123
2124 cpu_trip_passive: passive {
2125 temperature = <30000>;
2126 hysteresis = <2000>;
2127 type = "passive";
2128 };
2129 };
2130
2131 cooling-maps {
2132 cpu-critical {
2133 cooling-device = <&fan 3 3>;
2134 trip = <&cpu_trip_critical>;
2135 };
2136
2137 cpu-hot {
2138 cooling-device = <&fan 2 2>;
2139 trip = <&cpu_trip_hot>;
2140 };
2141
2142 cpu-active {
2143 cooling-device = <&fan 1 1>;
2144 trip = <&cpu_trip_active>;
2145 };
2146
2147 cpu-passive {
2148 cooling-device = <&fan 0 0>;
2149 trip = <&cpu_trip_passive>;
2150 };
2151 };
2152 };
2153
2154 gpu-thermal {
2155 polling-delay = <0>;
2156 polling-delay-passive = <500>;
2157 status = "okay";
2158
2159 trips {
2160 gpu_alert0: critical {
2161 temperature = <99000>;
2162 hysteresis = <0>;
2163 type = "critical";
2164 };
2165 };
2166 };
2167
2168 aux-thermal {
2169 polling-delay = <0>;
2170 polling-delay-passive = <500>;
2171 status = "okay";
2172
2173 trips {
2174 aux_alert0: critical {
2175 temperature = <90000>;
2176 hysteresis = <0>;
2177 type = "critical";
2178 };
2179 };
2180 };
2181 };
2182};