tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright 2012 Red Hat
4 *
5 * Authors: Matthew Garrett
6 * Dave Airlie
7 */
8
9#include <linux/module.h>
10#include <linux/pci.h>
11#include <linux/vmalloc.h>
12
13#include <drm/drm_aperture.h>
14#include <drm/drm_drv.h>
15#include <drm/drm_file.h>
16#include <drm/drm_ioctl.h>
17#include <drm/drm_pciids.h>
18
19#include "mgag200_drv.h"
20
21int mgag200_modeset = -1;
22MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
23module_param_named(modeset, mgag200_modeset, int, 0400);
24
25/*
26 * DRM driver
27 */
28
29DEFINE_DRM_GEM_FOPS(mgag200_driver_fops);
30
31static const struct drm_driver mgag200_driver = {
32 .driver_features = DRIVER_ATOMIC | DRIVER_GEM | DRIVER_MODESET,
33 .fops = &mgag200_driver_fops,
34 .name = DRIVER_NAME,
35 .desc = DRIVER_DESC,
36 .date = DRIVER_DATE,
37 .major = DRIVER_MAJOR,
38 .minor = DRIVER_MINOR,
39 .patchlevel = DRIVER_PATCHLEVEL,
40 DRM_GEM_SHMEM_DRIVER_OPS,
41};
42
43/*
44 * DRM device
45 */
46
47static bool mgag200_has_sgram(struct mga_device *mdev)
48{
49 struct drm_device *dev = &mdev->base;
50 struct pci_dev *pdev = to_pci_dev(dev->dev);
51 u32 option;
52 int ret;
53
54 ret = pci_read_config_dword(pdev, PCI_MGA_OPTION, &option);
55 if (drm_WARN(dev, ret, "failed to read PCI config dword: %d\n", ret))
56 return false;
57
58 return !!(option & PCI_MGA_OPTION_HARDPWMSK);
59}
60
61static int mgag200_regs_init(struct mga_device *mdev)
62{
63 struct drm_device *dev = &mdev->base;
64 struct pci_dev *pdev = to_pci_dev(dev->dev);
65 u32 option, option2;
66 u8 crtcext3;
67
68 switch (mdev->type) {
69 case G200_PCI:
70 case G200_AGP:
71 if (mgag200_has_sgram(mdev))
72 option = 0x4049cd21;
73 else
74 option = 0x40499121;
75 option2 = 0x00008000;
76 break;
77 case G200_SE_A:
78 case G200_SE_B:
79 option = 0x40049120;
80 if (mgag200_has_sgram(mdev))
81 option |= PCI_MGA_OPTION_HARDPWMSK;
82 option2 = 0x00008000;
83 break;
84 case G200_WB:
85 case G200_EW3:
86 option = 0x41049120;
87 option2 = 0x0000b000;
88 break;
89 case G200_EV:
90 option = 0x00000120;
91 option2 = 0x0000b000;
92 break;
93 case G200_EH:
94 case G200_EH3:
95 option = 0x00000120;
96 option2 = 0x0000b000;
97 break;
98 default:
99 option = 0;
100 option2 = 0;
101 }
102
103 if (option)
104 pci_write_config_dword(pdev, PCI_MGA_OPTION, option);
105 if (option2)
106 pci_write_config_dword(pdev, PCI_MGA_OPTION2, option2);
107
108 /* BAR 1 contains registers */
109 mdev->rmmio_base = pci_resource_start(pdev, 1);
110 mdev->rmmio_size = pci_resource_len(pdev, 1);
111
112 if (!devm_request_mem_region(dev->dev, mdev->rmmio_base,
113 mdev->rmmio_size, "mgadrmfb_mmio")) {
114 drm_err(dev, "can't reserve mmio registers\n");
115 return -ENOMEM;
116 }
117
118 mdev->rmmio = pcim_iomap(pdev, 1, 0);
119 if (mdev->rmmio == NULL)
120 return -ENOMEM;
121
122 RREG_ECRT(0x03, crtcext3);
123 crtcext3 |= MGAREG_CRTCEXT3_MGAMODE;
124 WREG_ECRT(0x03, crtcext3);
125
126 return 0;
127}
128
129static void mgag200_g200_interpret_bios(struct mga_device *mdev,
130 const unsigned char *bios,
131 size_t size)
132{
133 static const char matrox[] = {'M', 'A', 'T', 'R', 'O', 'X'};
134 static const unsigned int expected_length[6] = {
135 0, 64, 64, 64, 128, 128
136 };
137 struct drm_device *dev = &mdev->base;
138 const unsigned char *pins;
139 unsigned int pins_len, version;
140 int offset;
141 int tmp;
142
143 /* Test for MATROX string. */
144 if (size < 45 + sizeof(matrox))
145 return;
146 if (memcmp(&bios[45], matrox, sizeof(matrox)) != 0)
147 return;
148
149 /* Get the PInS offset. */
150 if (size < MGA_BIOS_OFFSET + 2)
151 return;
152 offset = (bios[MGA_BIOS_OFFSET + 1] << 8) | bios[MGA_BIOS_OFFSET];
153
154 /* Get PInS data structure. */
155
156 if (size < offset + 6)
157 return;
158 pins = bios + offset;
159 if (pins[0] == 0x2e && pins[1] == 0x41) {
160 version = pins[5];
161 pins_len = pins[2];
162 } else {
163 version = 1;
164 pins_len = pins[0] + (pins[1] << 8);
165 }
166
167 if (version < 1 || version > 5) {
168 drm_warn(dev, "Unknown BIOS PInS version: %d\n", version);
169 return;
170 }
171 if (pins_len != expected_length[version]) {
172 drm_warn(dev, "Unexpected BIOS PInS size: %d expected: %d\n",
173 pins_len, expected_length[version]);
174 return;
175 }
176 if (size < offset + pins_len)
177 return;
178
179 drm_dbg_kms(dev, "MATROX BIOS PInS version %d size: %d found\n",
180 version, pins_len);
181
182 /* Extract the clock values */
183
184 switch (version) {
185 case 1:
186 tmp = pins[24] + (pins[25] << 8);
187 if (tmp)
188 mdev->model.g200.pclk_max = tmp * 10;
189 break;
190 case 2:
191 if (pins[41] != 0xff)
192 mdev->model.g200.pclk_max = (pins[41] + 100) * 1000;
193 break;
194 case 3:
195 if (pins[36] != 0xff)
196 mdev->model.g200.pclk_max = (pins[36] + 100) * 1000;
197 if (pins[52] & 0x20)
198 mdev->model.g200.ref_clk = 14318;
199 break;
200 case 4:
201 if (pins[39] != 0xff)
202 mdev->model.g200.pclk_max = pins[39] * 4 * 1000;
203 if (pins[92] & 0x01)
204 mdev->model.g200.ref_clk = 14318;
205 break;
206 case 5:
207 tmp = pins[4] ? 8000 : 6000;
208 if (pins[123] != 0xff)
209 mdev->model.g200.pclk_min = pins[123] * tmp;
210 if (pins[38] != 0xff)
211 mdev->model.g200.pclk_max = pins[38] * tmp;
212 if (pins[110] & 0x01)
213 mdev->model.g200.ref_clk = 14318;
214 break;
215 default:
216 break;
217 }
218}
219
220static void mgag200_g200_init_refclk(struct mga_device *mdev)
221{
222 struct drm_device *dev = &mdev->base;
223 struct pci_dev *pdev = to_pci_dev(dev->dev);
224 unsigned char __iomem *rom;
225 unsigned char *bios;
226 size_t size;
227
228 mdev->model.g200.pclk_min = 50000;
229 mdev->model.g200.pclk_max = 230000;
230 mdev->model.g200.ref_clk = 27050;
231
232 rom = pci_map_rom(pdev, &size);
233 if (!rom)
234 return;
235
236 bios = vmalloc(size);
237 if (!bios)
238 goto out;
239 memcpy_fromio(bios, rom, size);
240
241 if (size != 0 && bios[0] == 0x55 && bios[1] == 0xaa)
242 mgag200_g200_interpret_bios(mdev, bios, size);
243
244 drm_dbg_kms(dev, "pclk_min: %ld pclk_max: %ld ref_clk: %ld\n",
245 mdev->model.g200.pclk_min, mdev->model.g200.pclk_max,
246 mdev->model.g200.ref_clk);
247
248 vfree(bios);
249out:
250 pci_unmap_rom(pdev, rom);
251}
252
253static void mgag200_g200se_init_unique_id(struct mga_device *mdev)
254{
255 struct drm_device *dev = &mdev->base;
256
257 /* stash G200 SE model number for later use */
258 mdev->model.g200se.unique_rev_id = RREG32(0x1e24);
259
260 drm_dbg(dev, "G200 SE unique revision id is 0x%x\n",
261 mdev->model.g200se.unique_rev_id);
262}
263
264static struct mga_device *
265mgag200_device_create(struct pci_dev *pdev, enum mga_type type, unsigned long flags)
266{
267 struct mga_device *mdev;
268 struct drm_device *dev;
269 int ret;
270
271 mdev = devm_drm_dev_alloc(&pdev->dev, &mgag200_driver, struct mga_device, base);
272 if (IS_ERR(mdev))
273 return mdev;
274 dev = &mdev->base;
275
276 pci_set_drvdata(pdev, dev);
277
278 mdev->flags = flags;
279 mdev->type = type;
280
281 ret = mgag200_regs_init(mdev);
282 if (ret)
283 return ERR_PTR(ret);
284
285 if (mdev->type == G200_PCI || mdev->type == G200_AGP)
286 mgag200_g200_init_refclk(mdev);
287 else if (IS_G200_SE(mdev))
288 mgag200_g200se_init_unique_id(mdev);
289
290 ret = mgag200_mm_init(mdev);
291 if (ret)
292 return ERR_PTR(ret);
293
294 ret = mgag200_modeset_init(mdev);
295 if (ret)
296 return ERR_PTR(ret);
297
298 return mdev;
299}
300
301/*
302 * PCI driver
303 */
304
305static const struct pci_device_id mgag200_pciidlist[] = {
306 { PCI_VENDOR_ID_MATROX, 0x520, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_PCI },
307 { PCI_VENDOR_ID_MATROX, 0x521, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_AGP },
308 { PCI_VENDOR_ID_MATROX, 0x522, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
309 G200_SE_A | MGAG200_FLAG_HW_BUG_NO_STARTADD},
310 { PCI_VENDOR_ID_MATROX, 0x524, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_SE_B },
311 { PCI_VENDOR_ID_MATROX, 0x530, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_EV },
312 { PCI_VENDOR_ID_MATROX, 0x532, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_WB },
313 { PCI_VENDOR_ID_MATROX, 0x533, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_EH },
314 { PCI_VENDOR_ID_MATROX, 0x534, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_ER },
315 { PCI_VENDOR_ID_MATROX, 0x536, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_EW3 },
316 { PCI_VENDOR_ID_MATROX, 0x538, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_EH3 },
317 {0,}
318};
319
320MODULE_DEVICE_TABLE(pci, mgag200_pciidlist);
321
322static enum mga_type mgag200_type_from_driver_data(kernel_ulong_t driver_data)
323{
324 return (enum mga_type)(driver_data & MGAG200_TYPE_MASK);
325}
326
327static unsigned long mgag200_flags_from_driver_data(kernel_ulong_t driver_data)
328{
329 return driver_data & MGAG200_FLAG_MASK;
330}
331
332static int
333mgag200_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
334{
335 kernel_ulong_t driver_data = ent->driver_data;
336 enum mga_type type = mgag200_type_from_driver_data(driver_data);
337 unsigned long flags = mgag200_flags_from_driver_data(driver_data);
338 struct mga_device *mdev;
339 struct drm_device *dev;
340 int ret;
341
342 ret = drm_aperture_remove_conflicting_pci_framebuffers(pdev, &mgag200_driver);
343 if (ret)
344 return ret;
345
346 ret = pcim_enable_device(pdev);
347 if (ret)
348 return ret;
349
350 mdev = mgag200_device_create(pdev, type, flags);
351 if (IS_ERR(mdev))
352 return PTR_ERR(mdev);
353 dev = &mdev->base;
354
355 ret = drm_dev_register(dev, 0);
356 if (ret)
357 return ret;
358
359 drm_fbdev_generic_setup(dev, 0);
360
361 return 0;
362}
363
364static void mgag200_pci_remove(struct pci_dev *pdev)
365{
366 struct drm_device *dev = pci_get_drvdata(pdev);
367
368 drm_dev_unregister(dev);
369}
370
371static struct pci_driver mgag200_pci_driver = {
372 .name = DRIVER_NAME,
373 .id_table = mgag200_pciidlist,
374 .probe = mgag200_pci_probe,
375 .remove = mgag200_pci_remove,
376};
377
378static int __init mgag200_init(void)
379{
380 if (drm_firmware_drivers_only() && mgag200_modeset == -1)
381 return -EINVAL;
382
383 if (mgag200_modeset == 0)
384 return -EINVAL;
385
386 return pci_register_driver(&mgag200_pci_driver);
387}
388
389static void __exit mgag200_exit(void)
390{
391 pci_unregister_driver(&mgag200_pci_driver);
392}
393
394module_init(mgag200_init);
395module_exit(mgag200_exit);
396
397MODULE_AUTHOR(DRIVER_AUTHOR);
398MODULE_DESCRIPTION(DRIVER_DESC);
399MODULE_LICENSE("GPL");