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Linux kernel mirror (for testing)
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linux
1/*
2 * arch/xtensa/include/asm/traps.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2012 Tensilica Inc.
9 */
10#ifndef _XTENSA_TRAPS_H
11#define _XTENSA_TRAPS_H
12
13#include <asm/ptrace.h>
14
15/*
16 * Per-CPU exception handling data structure.
17 * EXCSAVE1 points to it.
18 */
19struct exc_table {
20 /* Kernel Stack */
21 void *kstk;
22 /* Double exception save area for a0 */
23 unsigned long double_save;
24 /* Fixup handler */
25 void *fixup;
26 /* For passing a parameter to fixup */
27 void *fixup_param;
28 /* Fast user exception handlers */
29 void *fast_user_handler[EXCCAUSE_N];
30 /* Fast kernel exception handlers */
31 void *fast_kernel_handler[EXCCAUSE_N];
32 /* Default C-Handlers */
33 void *default_handler[EXCCAUSE_N];
34};
35
36/*
37 * handler must be either of the following:
38 * void (*)(struct pt_regs *regs);
39 * void (*)(struct pt_regs *regs, unsigned long exccause);
40 */
41extern void * __init trap_set_handler(int cause, void *handler);
42extern void do_unhandled(struct pt_regs *regs, unsigned long exccause);
43void fast_second_level_miss(void);
44
45/* Initialize minimal exc_table structure sufficient for basic paging */
46static inline void __init early_trap_init(void)
47{
48 static struct exc_table exc_table __initdata = {
49 .fast_kernel_handler[EXCCAUSE_DTLB_MISS] =
50 fast_second_level_miss,
51 };
52 __asm__ __volatile__("wsr %0, excsave1\n" : : "a" (&exc_table));
53}
54
55void secondary_trap_init(void);
56
57static inline void spill_registers(void)
58{
59#if defined(__XTENSA_WINDOWED_ABI__)
60#if XCHAL_NUM_AREGS > 16
61 __asm__ __volatile__ (
62 " call8 1f\n"
63 " _j 2f\n"
64 " retw\n"
65 " .align 4\n"
66 "1:\n"
67#if XCHAL_NUM_AREGS == 32
68 " _entry a1, 32\n"
69 " addi a8, a0, 3\n"
70 " _entry a1, 16\n"
71 " mov a12, a12\n"
72 " retw\n"
73#else
74 " _entry a1, 48\n"
75 " call12 1f\n"
76 " retw\n"
77 " .align 4\n"
78 "1:\n"
79 " .rept (" __stringify(XCHAL_NUM_AREGS) " - 16) / 12\n"
80 " _entry a1, 48\n"
81 " mov a12, a0\n"
82 " .endr\n"
83 " _entry a1, 16\n"
84#if XCHAL_NUM_AREGS % 12 == 0
85 " mov a12, a12\n"
86#elif XCHAL_NUM_AREGS % 12 == 4
87 " mov a4, a4\n"
88#elif XCHAL_NUM_AREGS % 12 == 8
89 " mov a8, a8\n"
90#endif
91 " retw\n"
92#endif
93 "2:\n"
94 : : : "a8", "a9", "memory");
95#else
96 __asm__ __volatile__ (
97 " mov a12, a12\n"
98 : : : "memory");
99#endif
100#endif
101}
102
103struct debug_table {
104 /* Pointer to debug exception handler */
105 void (*debug_exception)(void);
106 /* Temporary register save area */
107 unsigned long debug_save[1];
108#ifdef CONFIG_HAVE_HW_BREAKPOINT
109 /* Save area for DBREAKC registers */
110 unsigned long dbreakc_save[XCHAL_NUM_DBREAK];
111 /* Saved ICOUNT register */
112 unsigned long icount_save;
113 /* Saved ICOUNTLEVEL register */
114 unsigned long icount_level_save;
115#endif
116};
117
118void debug_exception(void);
119
120#endif /* _XTENSA_TRAPS_H */