tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
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linux
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/timer/renesas,ostm.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Renesas OS Timer (OSTM)
8
9maintainers:
10 - Chris Brandt <chris.brandt@renesas.com>
11 - Geert Uytterhoeven <geert+renesas@glider.be>
12
13description:
14 The OSTM is a multi-channel 32-bit timer/counter with fixed clock source that
15 can operate in either interval count down timer or free-running compare match
16 mode.
17
18 Channels are independent from each other.
19
20properties:
21 compatible:
22 items:
23 - enum:
24 - renesas,r7s72100-ostm # RZ/A1H
25 - renesas,r7s9210-ostm # RZ/A2M
26 - renesas,r9a07g044-ostm # RZ/G2{L,LC}
27 - const: renesas,ostm # Generic
28
29 reg:
30 maxItems: 1
31
32 interrupts:
33 maxItems: 1
34
35 clocks:
36 maxItems: 1
37
38 power-domains:
39 maxItems: 1
40
41 resets:
42 maxItems: 1
43
44required:
45 - compatible
46 - reg
47 - interrupts
48 - clocks
49 - power-domains
50
51if:
52 properties:
53 compatible:
54 contains:
55 enum:
56 - renesas,r9a07g044-ostm
57then:
58 required:
59 - resets
60
61additionalProperties: false
62
63examples:
64 - |
65 #include <dt-bindings/clock/r7s72100-clock.h>
66 #include <dt-bindings/interrupt-controller/arm-gic.h>
67 ostm0: timer@fcfec000 {
68 compatible = "renesas,r7s72100-ostm", "renesas,ostm";
69 reg = <0xfcfec000 0x30>;
70 interrupts = <GIC_SPI 102 IRQ_TYPE_EDGE_RISING>;
71 clocks = <&mstp5_clks R7S72100_CLK_OSTM0>;
72 power-domains = <&cpg_clocks>;
73 };