tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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linux
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/phy/socionext,uniphier-ahci-phy.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Socionext UniPhier AHCI PHY
8
9description: |
10 This describes the deivcetree bindings for PHY interfaces built into
11 AHCI controller implemented on Socionext UniPhier SoCs.
12
13maintainers:
14 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
15
16properties:
17 compatible:
18 enum:
19 - socionext,uniphier-pxs2-ahci-phy
20 - socionext,uniphier-pxs3-ahci-phy
21
22 reg:
23 maxItems: 1
24
25 "#phy-cells":
26 const: 0
27
28 clocks:
29 maxItems: 2
30
31 clock-names:
32 oneOf:
33 - items: # for PXs2
34 - const: link
35 - items: # for others
36 - const: link
37 - const: phy
38
39 resets:
40 maxItems: 2
41
42 reset-names:
43 items:
44 - const: link
45 - const: phy
46
47required:
48 - compatible
49 - reg
50 - "#phy-cells"
51 - clocks
52 - clock-names
53 - resets
54 - reset-names
55
56additionalProperties: false
57
58examples:
59 - |
60 ahci-glue@65700000 {
61 compatible = "socionext,uniphier-pxs3-ahci-glue",
62 "simple-mfd";
63 #address-cells = <1>;
64 #size-cells = <1>;
65 ranges = <0 0x65700000 0x100>;
66
67 ahci_phy: phy@10 {
68 compatible = "socionext,uniphier-pxs3-ahci-phy";
69 reg = <0x10 0x10>;
70 #phy-cells = <0>;
71 clock-names = "link", "phy";
72 clocks = <&sys_clk 28>, <&sys_clk 30>;
73 reset-names = "link", "phy";
74 resets = <&sys_rst 28>, <&sys_rst 30>;
75 };
76 };