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1/*
2 * Copyright 2012-14 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26#ifndef DC_LINK_H_
27#define DC_LINK_H_
28
29#include "dc.h"
30#include "dc_types.h"
31#include "grph_object_defs.h"
32
33enum dc_link_fec_state {
34 dc_link_fec_not_ready,
35 dc_link_fec_ready,
36 dc_link_fec_enabled
37};
38
39struct dc_link_status {
40 bool link_active;
41 struct dpcd_caps *dpcd_caps;
42};
43
44/* DP MST stream allocation (payload bandwidth number) */
45struct link_mst_stream_allocation {
46 /* DIG front */
47 const struct stream_encoder *stream_enc;
48#if defined(CONFIG_DRM_AMD_DC_DCN)
49 /* HPO DP Stream Encoder */
50 const struct hpo_dp_stream_encoder *hpo_dp_stream_enc;
51#endif
52 /* associate DRM payload table with DC stream encoder */
53 uint8_t vcp_id;
54 /* number of slots required for the DP stream in transport packet */
55 uint8_t slot_count;
56};
57
58/* DP MST stream allocation table */
59struct link_mst_stream_allocation_table {
60 /* number of DP video streams */
61 int stream_count;
62 /* array of stream allocations */
63 struct link_mst_stream_allocation stream_allocations[MAX_CONTROLLER_NUM];
64};
65
66struct time_stamp {
67 uint64_t edp_poweroff;
68 uint64_t edp_poweron;
69};
70
71struct link_trace {
72 struct time_stamp time_stamp;
73};
74
75/* PSR feature flags */
76struct psr_settings {
77 bool psr_feature_enabled; // PSR is supported by sink
78 bool psr_allow_active; // PSR is currently active
79 enum dc_psr_version psr_version; // Internal PSR version, determined based on DPCD
80
81 /* These parameters are calculated in Driver,
82 * based on display timing and Sink capabilities.
83 * If VBLANK region is too small and Sink takes a long time
84 * to set up RFB, it may take an extra frame to enter PSR state.
85 */
86 bool psr_frame_capture_indication_req;
87 unsigned int psr_sdp_transmit_line_num_deadline;
88 unsigned int psr_power_opt;
89};
90
91/*
92 * A link contains one or more sinks and their connected status.
93 * The currently active signal type (HDMI, DP-SST, DP-MST) is also reported.
94 */
95struct dc_link {
96 struct dc_sink *remote_sinks[MAX_SINKS_PER_LINK];
97 unsigned int sink_count;
98 struct dc_sink *local_sink;
99 unsigned int link_index;
100 enum dc_connection_type type;
101 enum signal_type connector_signal;
102 enum dc_irq_source irq_source_hpd;
103 enum dc_irq_source irq_source_hpd_rx;/* aka DP Short Pulse */
104 bool is_hpd_filter_disabled;
105 bool dp_ss_off;
106 bool link_state_valid;
107 bool aux_access_disabled;
108 bool sync_lt_in_progress;
109 enum lttpr_mode lttpr_mode;
110 bool is_internal_display;
111
112 /* TODO: Rename. Flag an endpoint as having a programmable mapping to a
113 * DIG encoder. */
114 bool is_dig_mapping_flexible;
115 bool hpd_status; /* HPD status of link without physical HPD pin. */
116
117 bool edp_sink_present;
118
119 /* caps is the same as reported_link_cap. link_traing use
120 * reported_link_cap. Will clean up. TODO
121 */
122 struct dc_link_settings reported_link_cap;
123 struct dc_link_settings verified_link_cap;
124 struct dc_link_settings cur_link_settings;
125 struct dc_lane_settings cur_lane_setting[LANE_COUNT_DP_MAX];
126 struct dc_link_settings preferred_link_setting;
127 /* preferred_training_settings are override values that
128 * come from DM. DM is responsible for the memory
129 * management of the override pointers.
130 */
131 struct dc_link_training_overrides preferred_training_settings;
132 struct dp_audio_test_data audio_test_data;
133
134 uint8_t ddc_hw_inst;
135
136 uint8_t hpd_src;
137
138 uint8_t link_enc_hw_inst;
139 /* DIG link encoder ID. Used as index in link encoder resource pool.
140 * For links with fixed mapping to DIG, this is not changed after dc_link
141 * object creation.
142 */
143 enum engine_id eng_id;
144
145 bool test_pattern_enabled;
146 union compliance_test_state compliance_test_state;
147
148 void *priv;
149
150 struct ddc_service *ddc;
151
152 bool aux_mode;
153
154 /* Private to DC core */
155
156 const struct dc *dc;
157
158 struct dc_context *ctx;
159
160 struct panel_cntl *panel_cntl;
161 struct link_encoder *link_enc;
162#if defined(CONFIG_DRM_AMD_DC_DCN)
163 struct hpo_dp_link_encoder *hpo_dp_link_enc;
164#endif
165 struct graphics_object_id link_id;
166 /* Endpoint type distinguishes display endpoints which do not have entries
167 * in the BIOS connector table from those that do. Helps when tracking link
168 * encoder to display endpoint assignments.
169 */
170 enum display_endpoint_type ep_type;
171 union ddi_channel_mapping ddi_channel_mapping;
172 struct connector_device_tag_info device_tag;
173 struct dpcd_caps dpcd_caps;
174 uint32_t dongle_max_pix_clk;
175 unsigned short chip_caps;
176 unsigned int dpcd_sink_count;
177#if defined(CONFIG_DRM_AMD_DC_HDCP)
178 struct hdcp_caps hdcp_caps;
179#endif
180 enum edp_revision edp_revision;
181 union dpcd_sink_ext_caps dpcd_sink_ext_caps;
182
183 struct psr_settings psr_settings;
184
185 /* Drive settings read from integrated info table */
186 struct dc_lane_settings bios_forced_drive_settings;
187
188 /* MST record stream using this link */
189 struct link_flags {
190 bool dp_keep_receiver_powered;
191 bool dp_skip_DID2;
192 bool dp_skip_reset_segment;
193 bool dp_mot_reset_segment;
194 } wa_flags;
195 struct link_mst_stream_allocation_table mst_stream_alloc_table;
196
197 struct dc_link_status link_status;
198
199 struct link_trace link_trace;
200 struct gpio *hpd_gpio;
201 enum dc_link_fec_state fec_state;
202};
203
204const struct dc_link_status *dc_link_get_status(const struct dc_link *dc_link);
205
206/**
207 * dc_get_link_at_index() - Return an enumerated dc_link.
208 *
209 * dc_link order is constant and determined at
210 * boot time. They cannot be created or destroyed.
211 * Use dc_get_caps() to get number of links.
212 */
213static inline struct dc_link *dc_get_link_at_index(struct dc *dc, uint32_t link_index)
214{
215 return dc->links[link_index];
216}
217
218static inline void get_edp_links(const struct dc *dc,
219 struct dc_link **edp_links,
220 int *edp_num)
221{
222 int i;
223
224 *edp_num = 0;
225 for (i = 0; i < dc->link_count; i++) {
226 // report any eDP links, even unconnected DDI's
227 if (dc->links[i]->connector_signal == SIGNAL_TYPE_EDP) {
228 edp_links[*edp_num] = dc->links[i];
229 if (++(*edp_num) == MAX_NUM_EDP)
230 return;
231 }
232 }
233}
234
235static inline bool dc_get_edp_link_panel_inst(const struct dc *dc,
236 const struct dc_link *link,
237 unsigned int *inst_out)
238{
239 struct dc_link *edp_links[MAX_NUM_EDP];
240 int edp_num;
241
242 if (link->connector_signal != SIGNAL_TYPE_EDP)
243 return false;
244 get_edp_links(dc, edp_links, &edp_num);
245 if ((edp_num > 1) && (link->link_index > edp_links[0]->link_index))
246 *inst_out = 1;
247 else
248 *inst_out = 0;
249 return true;
250}
251
252/* Set backlight level of an embedded panel (eDP, LVDS).
253 * backlight_pwm_u16_16 is unsigned 32 bit with 16 bit integer
254 * and 16 bit fractional, where 1.0 is max backlight value.
255 */
256bool dc_link_set_backlight_level(const struct dc_link *dc_link,
257 uint32_t backlight_pwm_u16_16,
258 uint32_t frame_ramp);
259
260/* Set/get nits-based backlight level of an embedded panel (eDP, LVDS). */
261bool dc_link_set_backlight_level_nits(struct dc_link *link,
262 bool isHDR,
263 uint32_t backlight_millinits,
264 uint32_t transition_time_in_ms);
265
266bool dc_link_get_backlight_level_nits(struct dc_link *link,
267 uint32_t *backlight_millinits,
268 uint32_t *backlight_millinits_peak);
269
270bool dc_link_backlight_enable_aux(struct dc_link *link, bool enable);
271
272bool dc_link_read_default_bl_aux(struct dc_link *link, uint32_t *backlight_millinits);
273bool dc_link_set_default_brightness_aux(struct dc_link *link);
274
275int dc_link_get_backlight_level(const struct dc_link *dc_link);
276
277int dc_link_get_target_backlight_pwm(const struct dc_link *link);
278
279bool dc_link_set_psr_allow_active(struct dc_link *dc_link, const bool *enable,
280 bool wait, bool force_static, const unsigned int *power_opts);
281
282bool dc_link_get_psr_state(const struct dc_link *dc_link, enum dc_psr_state *state);
283
284bool dc_link_setup_psr(struct dc_link *dc_link,
285 const struct dc_stream_state *stream, struct psr_config *psr_config,
286 struct psr_context *psr_context);
287
288void dc_link_get_psr_residency(const struct dc_link *link, uint32_t *residency);
289
290/* Request DC to detect if there is a Panel connected.
291 * boot - If this call is during initial boot.
292 * Return false for any type of detection failure or MST detection
293 * true otherwise. True meaning further action is required (status update
294 * and OS notification).
295 */
296enum dc_detect_reason {
297 DETECT_REASON_BOOT,
298 DETECT_REASON_HPD,
299 DETECT_REASON_HPDRX,
300 DETECT_REASON_FALLBACK,
301 DETECT_REASON_RETRAIN
302};
303
304bool dc_link_detect(struct dc_link *dc_link, enum dc_detect_reason reason);
305bool dc_link_get_hpd_state(struct dc_link *dc_link);
306enum dc_status dc_link_allocate_mst_payload(struct pipe_ctx *pipe_ctx);
307#if defined(CONFIG_DRM_AMD_DC_DCN)
308enum dc_status dc_link_reduce_mst_payload(struct pipe_ctx *pipe_ctx, uint32_t req_pbn);
309enum dc_status dc_link_increase_mst_payload(struct pipe_ctx *pipe_ctx, uint32_t req_pbn);
310#endif
311
312/* Notify DC about DP RX Interrupt (aka Short Pulse Interrupt).
313 * Return:
314 * true - Downstream port status changed. DM should call DC to do the
315 * detection.
316 * false - no change in Downstream port status. No further action required
317 * from DM. */
318bool dc_link_handle_hpd_rx_irq(struct dc_link *dc_link,
319 union hpd_irq_data *hpd_irq_dpcd_data, bool *out_link_loss,
320 bool defer_handling, bool *has_left_work);
321
322/*
323 * On eDP links this function call will stall until T12 has elapsed.
324 * If the panel is not in power off state, this function will return
325 * immediately.
326 */
327bool dc_link_wait_for_t12(struct dc_link *link);
328
329void dc_link_dp_handle_automated_test(struct dc_link *link);
330void dc_link_dp_handle_link_loss(struct dc_link *link);
331bool dc_link_dp_allow_hpd_rx_irq(const struct dc_link *link);
332
333struct dc_sink_init_data;
334
335struct dc_sink *dc_link_add_remote_sink(
336 struct dc_link *dc_link,
337 const uint8_t *edid,
338 int len,
339 struct dc_sink_init_data *init_data);
340
341void dc_link_remove_remote_sink(
342 struct dc_link *link,
343 struct dc_sink *sink);
344
345/* Used by diagnostics for virtual link at the moment */
346
347void dc_link_dp_set_drive_settings(
348 struct dc_link *link,
349 struct link_training_settings *lt_settings);
350
351bool dc_link_dp_perform_link_training_skip_aux(
352 struct dc_link *link,
353 const struct dc_link_settings *link_setting);
354
355enum link_training_result dc_link_dp_perform_link_training(
356 struct dc_link *link,
357 const struct dc_link_settings *link_settings,
358 bool skip_video_pattern);
359
360bool dc_link_dp_sync_lt_begin(struct dc_link *link);
361
362enum link_training_result dc_link_dp_sync_lt_attempt(
363 struct dc_link *link,
364 struct dc_link_settings *link_setting,
365 struct dc_link_training_overrides *lt_settings);
366
367bool dc_link_dp_sync_lt_end(struct dc_link *link, bool link_down);
368
369void dc_link_dp_enable_hpd(const struct dc_link *link);
370
371void dc_link_dp_disable_hpd(const struct dc_link *link);
372
373bool dc_link_dp_set_test_pattern(
374 struct dc_link *link,
375 enum dp_test_pattern test_pattern,
376 enum dp_test_pattern_color_space test_pattern_color_space,
377 const struct link_training_settings *p_link_settings,
378 const unsigned char *p_custom_pattern,
379 unsigned int cust_pattern_size);
380
381bool dc_link_dp_get_max_link_enc_cap(const struct dc_link *link, struct dc_link_settings *max_link_enc_cap);
382
383void dc_link_enable_hpd_filter(struct dc_link *link, bool enable);
384
385bool dc_link_is_dp_sink_present(struct dc_link *link);
386
387bool dc_link_detect_sink(struct dc_link *link, enum dc_connection_type *type);
388/*
389 * DPCD access interfaces
390 */
391
392#ifdef CONFIG_DRM_AMD_DC_HDCP
393bool dc_link_is_hdcp14(struct dc_link *link, enum signal_type signal);
394bool dc_link_is_hdcp22(struct dc_link *link, enum signal_type signal);
395#endif
396void dc_link_set_drive_settings(struct dc *dc,
397 struct link_training_settings *lt_settings,
398 const struct dc_link *link);
399void dc_link_set_preferred_link_settings(struct dc *dc,
400 struct dc_link_settings *link_setting,
401 struct dc_link *link);
402void dc_link_set_preferred_training_settings(struct dc *dc,
403 struct dc_link_settings *link_setting,
404 struct dc_link_training_overrides *lt_overrides,
405 struct dc_link *link,
406 bool skip_immediate_retrain);
407void dc_link_enable_hpd(const struct dc_link *link);
408void dc_link_disable_hpd(const struct dc_link *link);
409void dc_link_set_test_pattern(struct dc_link *link,
410 enum dp_test_pattern test_pattern,
411 enum dp_test_pattern_color_space test_pattern_color_space,
412 const struct link_training_settings *p_link_settings,
413 const unsigned char *p_custom_pattern,
414 unsigned int cust_pattern_size);
415uint32_t dc_link_bandwidth_kbps(
416 const struct dc_link *link,
417 const struct dc_link_settings *link_setting);
418
419const struct dc_link_settings *dc_link_get_link_cap(
420 const struct dc_link *link);
421
422void dc_link_overwrite_extended_receiver_cap(
423 struct dc_link *link);
424
425bool dc_submit_i2c(
426 struct dc *dc,
427 uint32_t link_index,
428 struct i2c_command *cmd);
429
430bool dc_submit_i2c_oem(
431 struct dc *dc,
432 struct i2c_command *cmd);
433
434uint32_t dc_bandwidth_in_kbps_from_timing(
435 const struct dc_crtc_timing *timing);
436
437bool dc_link_is_fec_supported(const struct dc_link *link);
438bool dc_link_should_enable_fec(const struct dc_link *link);
439
440#if defined(CONFIG_DRM_AMD_DC_DCN)
441enum dp_link_encoding dc_link_dp_mst_decide_link_encoding_format(const struct dc_link *link);
442#endif
443#endif /* DC_LINK_H_ */