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1/* SPDX-License-Identifier: GPL-2.0-or-later */ 2/* 3 * Framework and drivers for configuring and reading different PHYs 4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c 5 * 6 * Author: Andy Fleming 7 * 8 * Copyright (c) 2004 Freescale Semiconductor, Inc. 9 */ 10 11#ifndef __PHY_H 12#define __PHY_H 13 14#include <linux/compiler.h> 15#include <linux/spinlock.h> 16#include <linux/ethtool.h> 17#include <linux/linkmode.h> 18#include <linux/netlink.h> 19#include <linux/mdio.h> 20#include <linux/mii.h> 21#include <linux/mii_timestamper.h> 22#include <linux/module.h> 23#include <linux/timer.h> 24#include <linux/workqueue.h> 25#include <linux/mod_devicetable.h> 26#include <linux/u64_stats_sync.h> 27#include <linux/irqreturn.h> 28#include <linux/iopoll.h> 29#include <linux/refcount.h> 30 31#include <linux/atomic.h> 32 33#define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ 34 SUPPORTED_TP | \ 35 SUPPORTED_MII) 36 37#define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ 38 SUPPORTED_10baseT_Full) 39 40#define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ 41 SUPPORTED_100baseT_Full) 42 43#define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ 44 SUPPORTED_1000baseT_Full) 45 46extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init; 47extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init; 48extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init; 49extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init; 50extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init; 51extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init; 52extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init; 53extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init; 54 55#define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features) 56#define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features) 57#define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features) 58#define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features) 59#define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features) 60#define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features) 61#define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features) 62#define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features) 63 64extern const int phy_basic_ports_array[3]; 65extern const int phy_fibre_port_array[1]; 66extern const int phy_all_ports_features_array[7]; 67extern const int phy_10_100_features_array[4]; 68extern const int phy_basic_t1_features_array[2]; 69extern const int phy_gbit_features_array[2]; 70extern const int phy_10gbit_features_array[1]; 71 72/* 73 * Set phydev->irq to PHY_POLL if interrupts are not supported, 74 * or not desired for this PHY. Set to PHY_MAC_INTERRUPT if 75 * the attached MAC driver handles the interrupt 76 */ 77#define PHY_POLL -1 78#define PHY_MAC_INTERRUPT -2 79 80#define PHY_IS_INTERNAL 0x00000001 81#define PHY_RST_AFTER_CLK_EN 0x00000002 82#define PHY_POLL_CABLE_TEST 0x00000004 83#define MDIO_DEVICE_IS_PHY 0x80000000 84 85/** 86 * enum phy_interface_t - Interface Mode definitions 87 * 88 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch 89 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined 90 * @PHY_INTERFACE_MODE_MII: Median-independent interface 91 * @PHY_INTERFACE_MODE_GMII: Gigabit median-independent interface 92 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface 93 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface 94 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface 95 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface 96 * @PHY_INTERFACE_MODE_REVRMII: Reduced Media Independent Interface in PHY role 97 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface 98 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay 99 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay 100 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay 101 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI 102 * @PHY_INTERFACE_MODE_SMII: ??? MII 103 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface 104 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface 105 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax 106 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII 107 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII 108 * @PHY_INTERFACE_MODE_100BASEX: 100 BaseX 109 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX 110 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX 111 * @PHY_INTERFACE_MODE_5GBASER: 5G BaseR 112 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI 113 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface 114 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR 115 * @PHY_INTERFACE_MODE_25GBASER: 25G BaseR 116 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII 117 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN 118 * @PHY_INTERFACE_MODE_MAX: Book keeping 119 * 120 * Describes the interface between the MAC and PHY. 121 */ 122typedef enum { 123 PHY_INTERFACE_MODE_NA, 124 PHY_INTERFACE_MODE_INTERNAL, 125 PHY_INTERFACE_MODE_MII, 126 PHY_INTERFACE_MODE_GMII, 127 PHY_INTERFACE_MODE_SGMII, 128 PHY_INTERFACE_MODE_TBI, 129 PHY_INTERFACE_MODE_REVMII, 130 PHY_INTERFACE_MODE_RMII, 131 PHY_INTERFACE_MODE_REVRMII, 132 PHY_INTERFACE_MODE_RGMII, 133 PHY_INTERFACE_MODE_RGMII_ID, 134 PHY_INTERFACE_MODE_RGMII_RXID, 135 PHY_INTERFACE_MODE_RGMII_TXID, 136 PHY_INTERFACE_MODE_RTBI, 137 PHY_INTERFACE_MODE_SMII, 138 PHY_INTERFACE_MODE_XGMII, 139 PHY_INTERFACE_MODE_XLGMII, 140 PHY_INTERFACE_MODE_MOCA, 141 PHY_INTERFACE_MODE_QSGMII, 142 PHY_INTERFACE_MODE_TRGMII, 143 PHY_INTERFACE_MODE_100BASEX, 144 PHY_INTERFACE_MODE_1000BASEX, 145 PHY_INTERFACE_MODE_2500BASEX, 146 PHY_INTERFACE_MODE_5GBASER, 147 PHY_INTERFACE_MODE_RXAUI, 148 PHY_INTERFACE_MODE_XAUI, 149 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */ 150 PHY_INTERFACE_MODE_10GBASER, 151 PHY_INTERFACE_MODE_25GBASER, 152 PHY_INTERFACE_MODE_USXGMII, 153 /* 10GBASE-KR - with Clause 73 AN */ 154 PHY_INTERFACE_MODE_10GKR, 155 PHY_INTERFACE_MODE_MAX, 156} phy_interface_t; 157 158/* PHY interface mode bitmap handling */ 159#define DECLARE_PHY_INTERFACE_MASK(name) \ 160 DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX) 161 162static inline void phy_interface_zero(unsigned long *intf) 163{ 164 bitmap_zero(intf, PHY_INTERFACE_MODE_MAX); 165} 166 167static inline bool phy_interface_empty(const unsigned long *intf) 168{ 169 return bitmap_empty(intf, PHY_INTERFACE_MODE_MAX); 170} 171 172static inline void phy_interface_and(unsigned long *dst, const unsigned long *a, 173 const unsigned long *b) 174{ 175 bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX); 176} 177 178static inline void phy_interface_or(unsigned long *dst, const unsigned long *a, 179 const unsigned long *b) 180{ 181 bitmap_or(dst, a, b, PHY_INTERFACE_MODE_MAX); 182} 183 184static inline void phy_interface_set_rgmii(unsigned long *intf) 185{ 186 __set_bit(PHY_INTERFACE_MODE_RGMII, intf); 187 __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf); 188 __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf); 189 __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf); 190} 191 192/* 193 * phy_supported_speeds - return all speeds currently supported by a PHY device 194 */ 195unsigned int phy_supported_speeds(struct phy_device *phy, 196 unsigned int *speeds, 197 unsigned int size); 198 199/** 200 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode 201 * @interface: enum phy_interface_t value 202 * 203 * Description: maps enum &phy_interface_t defined in this file 204 * into the device tree binding of 'phy-mode', so that Ethernet 205 * device driver can get PHY interface from device tree. 206 */ 207static inline const char *phy_modes(phy_interface_t interface) 208{ 209 switch (interface) { 210 case PHY_INTERFACE_MODE_NA: 211 return ""; 212 case PHY_INTERFACE_MODE_INTERNAL: 213 return "internal"; 214 case PHY_INTERFACE_MODE_MII: 215 return "mii"; 216 case PHY_INTERFACE_MODE_GMII: 217 return "gmii"; 218 case PHY_INTERFACE_MODE_SGMII: 219 return "sgmii"; 220 case PHY_INTERFACE_MODE_TBI: 221 return "tbi"; 222 case PHY_INTERFACE_MODE_REVMII: 223 return "rev-mii"; 224 case PHY_INTERFACE_MODE_RMII: 225 return "rmii"; 226 case PHY_INTERFACE_MODE_REVRMII: 227 return "rev-rmii"; 228 case PHY_INTERFACE_MODE_RGMII: 229 return "rgmii"; 230 case PHY_INTERFACE_MODE_RGMII_ID: 231 return "rgmii-id"; 232 case PHY_INTERFACE_MODE_RGMII_RXID: 233 return "rgmii-rxid"; 234 case PHY_INTERFACE_MODE_RGMII_TXID: 235 return "rgmii-txid"; 236 case PHY_INTERFACE_MODE_RTBI: 237 return "rtbi"; 238 case PHY_INTERFACE_MODE_SMII: 239 return "smii"; 240 case PHY_INTERFACE_MODE_XGMII: 241 return "xgmii"; 242 case PHY_INTERFACE_MODE_XLGMII: 243 return "xlgmii"; 244 case PHY_INTERFACE_MODE_MOCA: 245 return "moca"; 246 case PHY_INTERFACE_MODE_QSGMII: 247 return "qsgmii"; 248 case PHY_INTERFACE_MODE_TRGMII: 249 return "trgmii"; 250 case PHY_INTERFACE_MODE_1000BASEX: 251 return "1000base-x"; 252 case PHY_INTERFACE_MODE_2500BASEX: 253 return "2500base-x"; 254 case PHY_INTERFACE_MODE_5GBASER: 255 return "5gbase-r"; 256 case PHY_INTERFACE_MODE_RXAUI: 257 return "rxaui"; 258 case PHY_INTERFACE_MODE_XAUI: 259 return "xaui"; 260 case PHY_INTERFACE_MODE_10GBASER: 261 return "10gbase-r"; 262 case PHY_INTERFACE_MODE_25GBASER: 263 return "25gbase-r"; 264 case PHY_INTERFACE_MODE_USXGMII: 265 return "usxgmii"; 266 case PHY_INTERFACE_MODE_10GKR: 267 return "10gbase-kr"; 268 case PHY_INTERFACE_MODE_100BASEX: 269 return "100base-x"; 270 default: 271 return "unknown"; 272 } 273} 274 275 276#define PHY_INIT_TIMEOUT 100000 277#define PHY_FORCE_TIMEOUT 10 278 279#define PHY_MAX_ADDR 32 280 281/* Used when trying to connect to a specific phy (mii bus id:phy device id) */ 282#define PHY_ID_FMT "%s:%02x" 283 284#define MII_BUS_ID_SIZE 61 285 286struct device; 287struct phylink; 288struct sfp_bus; 289struct sfp_upstream_ops; 290struct sk_buff; 291 292/** 293 * struct mdio_bus_stats - Statistics counters for MDIO busses 294 * @transfers: Total number of transfers, i.e. @writes + @reads 295 * @errors: Number of MDIO transfers that returned an error 296 * @writes: Number of write transfers 297 * @reads: Number of read transfers 298 * @syncp: Synchronisation for incrementing statistics 299 */ 300struct mdio_bus_stats { 301 u64_stats_t transfers; 302 u64_stats_t errors; 303 u64_stats_t writes; 304 u64_stats_t reads; 305 /* Must be last, add new statistics above */ 306 struct u64_stats_sync syncp; 307}; 308 309/** 310 * struct phy_package_shared - Shared information in PHY packages 311 * @addr: Common PHY address used to combine PHYs in one package 312 * @refcnt: Number of PHYs connected to this shared data 313 * @flags: Initialization of PHY package 314 * @priv_size: Size of the shared private data @priv 315 * @priv: Driver private data shared across a PHY package 316 * 317 * Represents a shared structure between different phydev's in the same 318 * package, for example a quad PHY. See phy_package_join() and 319 * phy_package_leave(). 320 */ 321struct phy_package_shared { 322 int addr; 323 refcount_t refcnt; 324 unsigned long flags; 325 size_t priv_size; 326 327 /* private data pointer */ 328 /* note that this pointer is shared between different phydevs and 329 * the user has to take care of appropriate locking. It is allocated 330 * and freed automatically by phy_package_join() and 331 * phy_package_leave(). 332 */ 333 void *priv; 334}; 335 336/* used as bit number in atomic bitops */ 337#define PHY_SHARED_F_INIT_DONE 0 338#define PHY_SHARED_F_PROBE_DONE 1 339 340/** 341 * struct mii_bus - Represents an MDIO bus 342 * 343 * @owner: Who owns this device 344 * @name: User friendly name for this MDIO device, or driver name 345 * @id: Unique identifier for this bus, typical from bus hierarchy 346 * @priv: Driver private data 347 * 348 * The Bus class for PHYs. Devices which provide access to 349 * PHYs should register using this structure 350 */ 351struct mii_bus { 352 struct module *owner; 353 const char *name; 354 char id[MII_BUS_ID_SIZE]; 355 void *priv; 356 /** @read: Perform a read transfer on the bus */ 357 int (*read)(struct mii_bus *bus, int addr, int regnum); 358 /** @write: Perform a write transfer on the bus */ 359 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); 360 /** @reset: Perform a reset of the bus */ 361 int (*reset)(struct mii_bus *bus); 362 363 /** @stats: Statistic counters per device on the bus */ 364 struct mdio_bus_stats stats[PHY_MAX_ADDR]; 365 366 /** 367 * @mdio_lock: A lock to ensure that only one thing can read/write 368 * the MDIO bus at a time 369 */ 370 struct mutex mdio_lock; 371 372 /** @parent: Parent device of this bus */ 373 struct device *parent; 374 /** @state: State of bus structure */ 375 enum { 376 MDIOBUS_ALLOCATED = 1, 377 MDIOBUS_REGISTERED, 378 MDIOBUS_UNREGISTERED, 379 MDIOBUS_RELEASED, 380 } state; 381 382 /** @dev: Kernel device representation */ 383 struct device dev; 384 385 /** @mdio_map: list of all MDIO devices on bus */ 386 struct mdio_device *mdio_map[PHY_MAX_ADDR]; 387 388 /** @phy_mask: PHY addresses to be ignored when probing */ 389 u32 phy_mask; 390 391 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */ 392 u32 phy_ignore_ta_mask; 393 394 /** 395 * @irq: An array of interrupts, each PHY's interrupt at the index 396 * matching its address 397 */ 398 int irq[PHY_MAX_ADDR]; 399 400 /** @reset_delay_us: GPIO reset pulse width in microseconds */ 401 int reset_delay_us; 402 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */ 403 int reset_post_delay_us; 404 /** @reset_gpiod: Reset GPIO descriptor pointer */ 405 struct gpio_desc *reset_gpiod; 406 407 /** @probe_capabilities: bus capabilities, used for probing */ 408 enum { 409 MDIOBUS_NO_CAP = 0, 410 MDIOBUS_C22, 411 MDIOBUS_C45, 412 MDIOBUS_C22_C45, 413 } probe_capabilities; 414 415 /** @shared_lock: protect access to the shared element */ 416 struct mutex shared_lock; 417 418 /** @shared: shared state across different PHYs */ 419 struct phy_package_shared *shared[PHY_MAX_ADDR]; 420}; 421#define to_mii_bus(d) container_of(d, struct mii_bus, dev) 422 423struct mii_bus *mdiobus_alloc_size(size_t size); 424 425/** 426 * mdiobus_alloc - Allocate an MDIO bus structure 427 * 428 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready 429 * for the driver to register the bus. 430 */ 431static inline struct mii_bus *mdiobus_alloc(void) 432{ 433 return mdiobus_alloc_size(0); 434} 435 436int __mdiobus_register(struct mii_bus *bus, struct module *owner); 437int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus, 438 struct module *owner); 439#define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) 440#define devm_mdiobus_register(dev, bus) \ 441 __devm_mdiobus_register(dev, bus, THIS_MODULE) 442 443void mdiobus_unregister(struct mii_bus *bus); 444void mdiobus_free(struct mii_bus *bus); 445struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); 446static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) 447{ 448 return devm_mdiobus_alloc_size(dev, 0); 449} 450 451struct mii_bus *mdio_find_bus(const char *mdio_name); 452struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr); 453 454#define PHY_INTERRUPT_DISABLED false 455#define PHY_INTERRUPT_ENABLED true 456 457/** 458 * enum phy_state - PHY state machine states: 459 * 460 * @PHY_DOWN: PHY device and driver are not ready for anything. probe 461 * should be called if and only if the PHY is in this state, 462 * given that the PHY device exists. 463 * - PHY driver probe function will set the state to @PHY_READY 464 * 465 * @PHY_READY: PHY is ready to send and receive packets, but the 466 * controller is not. By default, PHYs which do not implement 467 * probe will be set to this state by phy_probe(). 468 * - start will set the state to UP 469 * 470 * @PHY_UP: The PHY and attached device are ready to do work. 471 * Interrupts should be started here. 472 * - timer moves to @PHY_NOLINK or @PHY_RUNNING 473 * 474 * @PHY_NOLINK: PHY is up, but not currently plugged in. 475 * - irq or timer will set @PHY_RUNNING if link comes back 476 * - phy_stop moves to @PHY_HALTED 477 * 478 * @PHY_RUNNING: PHY is currently up, running, and possibly sending 479 * and/or receiving packets 480 * - irq or timer will set @PHY_NOLINK if link goes down 481 * - phy_stop moves to @PHY_HALTED 482 * 483 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending 484 * is not expected to work, carrier will be indicated as down. PHY will be 485 * poll once per second, or on interrupt for it current state. 486 * Once complete, move to UP to restart the PHY. 487 * - phy_stop aborts the running test and moves to @PHY_HALTED 488 * 489 * @PHY_HALTED: PHY is up, but no polling or interrupts are done. Or 490 * PHY is in an error state. 491 * - phy_start moves to @PHY_UP 492 */ 493enum phy_state { 494 PHY_DOWN = 0, 495 PHY_READY, 496 PHY_HALTED, 497 PHY_UP, 498 PHY_RUNNING, 499 PHY_NOLINK, 500 PHY_CABLETEST, 501}; 502 503#define MDIO_MMD_NUM 32 504 505/** 506 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers 507 * @devices_in_package: IEEE 802.3 devices in package register value. 508 * @mmds_present: bit vector of MMDs present. 509 * @device_ids: The device identifer for each present device. 510 */ 511struct phy_c45_device_ids { 512 u32 devices_in_package; 513 u32 mmds_present; 514 u32 device_ids[MDIO_MMD_NUM]; 515}; 516 517struct macsec_context; 518struct macsec_ops; 519 520/** 521 * struct phy_device - An instance of a PHY 522 * 523 * @mdio: MDIO bus this PHY is on 524 * @drv: Pointer to the driver for this PHY instance 525 * @phy_id: UID for this device found during discovery 526 * @c45_ids: 802.3-c45 Device Identifiers if is_c45. 527 * @is_c45: Set to true if this PHY uses clause 45 addressing. 528 * @is_internal: Set to true if this PHY is internal to a MAC. 529 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc. 530 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps 531 * @has_fixups: Set to true if this PHY has fixups/quirks. 532 * @suspended: Set to true if this PHY has been suspended successfully. 533 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus. 534 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal. 535 * @loopback_enabled: Set true if this PHY has been loopbacked successfully. 536 * @downshifted_rate: Set true if link speed has been downshifted. 537 * @is_on_sfp_module: Set true if PHY is located on an SFP module. 538 * @mac_managed_pm: Set true if MAC driver takes of suspending/resuming PHY 539 * @state: State of the PHY for management purposes 540 * @dev_flags: Device-specific flags used by the PHY driver. 541 * Bits [15:0] are free to use by the PHY driver to communicate 542 * driver specific behavior. 543 * Bits [23:16] are currently reserved for future use. 544 * Bits [31:24] are reserved for defining generic 545 * PHY driver behavior. 546 * @irq: IRQ number of the PHY's interrupt (-1 if none) 547 * @phy_timer: The timer for handling the state machine 548 * @phylink: Pointer to phylink instance for this PHY 549 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached 550 * @sfp_bus: SFP bus attached to this PHY's fiber port 551 * @attached_dev: The attached enet driver's device instance ptr 552 * @adjust_link: Callback for the enet controller to respond to changes: in the 553 * link state. 554 * @phy_link_change: Callback for phylink for notification of link change 555 * @macsec_ops: MACsec offloading ops. 556 * 557 * @speed: Current link speed 558 * @duplex: Current duplex 559 * @port: Current port 560 * @pause: Current pause 561 * @asym_pause: Current asymmetric pause 562 * @supported: Combined MAC/PHY supported linkmodes 563 * @advertising: Currently advertised linkmodes 564 * @adv_old: Saved advertised while power saving for WoL 565 * @lp_advertising: Current link partner advertised linkmodes 566 * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited 567 * @autoneg: Flag autoneg being used 568 * @link: Current link state 569 * @autoneg_complete: Flag auto negotiation of the link has completed 570 * @mdix: Current crossover 571 * @mdix_ctrl: User setting of crossover 572 * @interrupts: Flag interrupts have been enabled 573 * @interface: enum phy_interface_t value 574 * @skb: Netlink message for cable diagnostics 575 * @nest: Netlink nest used for cable diagnostics 576 * @ehdr: nNtlink header for cable diagnostics 577 * @phy_led_triggers: Array of LED triggers 578 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers 579 * @led_link_trigger: LED trigger for link up/down 580 * @last_triggered: last LED trigger for link speed 581 * @master_slave_set: User requested master/slave configuration 582 * @master_slave_get: Current master/slave advertisement 583 * @master_slave_state: Current master/slave configuration 584 * @mii_ts: Pointer to time stamper callbacks 585 * @lock: Mutex for serialization access to PHY 586 * @state_queue: Work queue for state machine 587 * @shared: Pointer to private data shared by phys in one package 588 * @priv: Pointer to driver private data 589 * 590 * interrupts currently only supports enabled or disabled, 591 * but could be changed in the future to support enabling 592 * and disabling specific interrupts 593 * 594 * Contains some infrastructure for polling and interrupt 595 * handling, as well as handling shifts in PHY hardware state 596 */ 597struct phy_device { 598 struct mdio_device mdio; 599 600 /* Information about the PHY type */ 601 /* And management functions */ 602 struct phy_driver *drv; 603 604 u32 phy_id; 605 606 struct phy_c45_device_ids c45_ids; 607 unsigned is_c45:1; 608 unsigned is_internal:1; 609 unsigned is_pseudo_fixed_link:1; 610 unsigned is_gigabit_capable:1; 611 unsigned has_fixups:1; 612 unsigned suspended:1; 613 unsigned suspended_by_mdio_bus:1; 614 unsigned sysfs_links:1; 615 unsigned loopback_enabled:1; 616 unsigned downshifted_rate:1; 617 unsigned is_on_sfp_module:1; 618 unsigned mac_managed_pm:1; 619 620 unsigned autoneg:1; 621 /* The most recently read link state */ 622 unsigned link:1; 623 unsigned autoneg_complete:1; 624 625 /* Interrupts are enabled */ 626 unsigned interrupts:1; 627 628 enum phy_state state; 629 630 u32 dev_flags; 631 632 phy_interface_t interface; 633 634 /* 635 * forced speed & duplex (no autoneg) 636 * partner speed & duplex & pause (autoneg) 637 */ 638 int speed; 639 int duplex; 640 int port; 641 int pause; 642 int asym_pause; 643 u8 master_slave_get; 644 u8 master_slave_set; 645 u8 master_slave_state; 646 647 /* Union of PHY and Attached devices' supported link modes */ 648 /* See ethtool.h for more info */ 649 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 650 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); 651 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); 652 /* used with phy_speed_down */ 653 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old); 654 655 /* Energy efficient ethernet modes which should be prohibited */ 656 u32 eee_broken_modes; 657 658#ifdef CONFIG_LED_TRIGGER_PHY 659 struct phy_led_trigger *phy_led_triggers; 660 unsigned int phy_num_led_triggers; 661 struct phy_led_trigger *last_triggered; 662 663 struct phy_led_trigger *led_link_trigger; 664#endif 665 666 /* 667 * Interrupt number for this PHY 668 * -1 means no interrupt 669 */ 670 int irq; 671 672 /* private data pointer */ 673 /* For use by PHYs to maintain extra state */ 674 void *priv; 675 676 /* shared data pointer */ 677 /* For use by PHYs inside the same package that need a shared state. */ 678 struct phy_package_shared *shared; 679 680 /* Reporting cable test results */ 681 struct sk_buff *skb; 682 void *ehdr; 683 struct nlattr *nest; 684 685 /* Interrupt and Polling infrastructure */ 686 struct delayed_work state_queue; 687 688 struct mutex lock; 689 690 /* This may be modified under the rtnl lock */ 691 bool sfp_bus_attached; 692 struct sfp_bus *sfp_bus; 693 struct phylink *phylink; 694 struct net_device *attached_dev; 695 struct mii_timestamper *mii_ts; 696 697 u8 mdix; 698 u8 mdix_ctrl; 699 700 void (*phy_link_change)(struct phy_device *phydev, bool up); 701 void (*adjust_link)(struct net_device *dev); 702 703#if IS_ENABLED(CONFIG_MACSEC) 704 /* MACsec management functions */ 705 const struct macsec_ops *macsec_ops; 706#endif 707}; 708 709static inline struct phy_device *to_phy_device(const struct device *dev) 710{ 711 return container_of(to_mdio_device(dev), struct phy_device, mdio); 712} 713 714/** 715 * struct phy_tdr_config - Configuration of a TDR raw test 716 * 717 * @first: Distance for first data collection point 718 * @last: Distance for last data collection point 719 * @step: Step between data collection points 720 * @pair: Bitmap of cable pairs to collect data for 721 * 722 * A structure containing possible configuration parameters 723 * for a TDR cable test. The driver does not need to implement 724 * all the parameters, but should report what is actually used. 725 * All distances are in centimeters. 726 */ 727struct phy_tdr_config { 728 u32 first; 729 u32 last; 730 u32 step; 731 s8 pair; 732}; 733#define PHY_PAIR_ALL -1 734 735/** 736 * struct phy_driver - Driver structure for a particular PHY type 737 * 738 * @mdiodrv: Data common to all MDIO devices 739 * @phy_id: The result of reading the UID registers of this PHY 740 * type, and ANDing them with the phy_id_mask. This driver 741 * only works for PHYs with IDs which match this field 742 * @name: The friendly name of this PHY type 743 * @phy_id_mask: Defines the important bits of the phy_id 744 * @features: A mandatory list of features (speed, duplex, etc) 745 * supported by this PHY 746 * @flags: A bitfield defining certain other features this PHY 747 * supports (like interrupts) 748 * @driver_data: Static driver data 749 * 750 * All functions are optional. If config_aneg or read_status 751 * are not implemented, the phy core uses the genphy versions. 752 * Note that none of these functions should be called from 753 * interrupt time. The goal is for the bus read/write functions 754 * to be able to block when the bus transaction is happening, 755 * and be freed up by an interrupt (The MPC85xx has this ability, 756 * though it is not currently supported in the driver). 757 */ 758struct phy_driver { 759 struct mdio_driver_common mdiodrv; 760 u32 phy_id; 761 char *name; 762 u32 phy_id_mask; 763 const unsigned long * const features; 764 u32 flags; 765 const void *driver_data; 766 767 /** 768 * @soft_reset: Called to issue a PHY software reset 769 */ 770 int (*soft_reset)(struct phy_device *phydev); 771 772 /** 773 * @config_init: Called to initialize the PHY, 774 * including after a reset 775 */ 776 int (*config_init)(struct phy_device *phydev); 777 778 /** 779 * @probe: Called during discovery. Used to set 780 * up device-specific structures, if any 781 */ 782 int (*probe)(struct phy_device *phydev); 783 784 /** 785 * @get_features: Probe the hardware to determine what 786 * abilities it has. Should only set phydev->supported. 787 */ 788 int (*get_features)(struct phy_device *phydev); 789 790 /* PHY Power Management */ 791 /** @suspend: Suspend the hardware, saving state if needed */ 792 int (*suspend)(struct phy_device *phydev); 793 /** @resume: Resume the hardware, restoring state if needed */ 794 int (*resume)(struct phy_device *phydev); 795 796 /** 797 * @config_aneg: Configures the advertisement and resets 798 * autonegotiation if phydev->autoneg is on, 799 * forces the speed to the current settings in phydev 800 * if phydev->autoneg is off 801 */ 802 int (*config_aneg)(struct phy_device *phydev); 803 804 /** @aneg_done: Determines the auto negotiation result */ 805 int (*aneg_done)(struct phy_device *phydev); 806 807 /** @read_status: Determines the negotiated speed and duplex */ 808 int (*read_status)(struct phy_device *phydev); 809 810 /** 811 * @config_intr: Enables or disables interrupts. 812 * It should also clear any pending interrupts prior to enabling the 813 * IRQs and after disabling them. 814 */ 815 int (*config_intr)(struct phy_device *phydev); 816 817 /** @handle_interrupt: Override default interrupt handling */ 818 irqreturn_t (*handle_interrupt)(struct phy_device *phydev); 819 820 /** @remove: Clears up any memory if needed */ 821 void (*remove)(struct phy_device *phydev); 822 823 /** 824 * @match_phy_device: Returns true if this is a suitable 825 * driver for the given phydev. If NULL, matching is based on 826 * phy_id and phy_id_mask. 827 */ 828 int (*match_phy_device)(struct phy_device *phydev); 829 830 /** 831 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY 832 * register changes to enable Wake on LAN, so set_wol is 833 * provided to be called in the ethernet driver's set_wol 834 * function. 835 */ 836 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 837 838 /** 839 * @get_wol: See set_wol, but for checking whether Wake on LAN 840 * is enabled. 841 */ 842 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); 843 844 /** 845 * @link_change_notify: Called to inform a PHY device driver 846 * when the core is about to change the link state. This 847 * callback is supposed to be used as fixup hook for drivers 848 * that need to take action when the link state 849 * changes. Drivers are by no means allowed to mess with the 850 * PHY device structure in their implementations. 851 */ 852 void (*link_change_notify)(struct phy_device *dev); 853 854 /** 855 * @read_mmd: PHY specific driver override for reading a MMD 856 * register. This function is optional for PHY specific 857 * drivers. When not provided, the default MMD read function 858 * will be used by phy_read_mmd(), which will use either a 859 * direct read for Clause 45 PHYs or an indirect read for 860 * Clause 22 PHYs. devnum is the MMD device number within the 861 * PHY device, regnum is the register within the selected MMD 862 * device. 863 */ 864 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); 865 866 /** 867 * @write_mmd: PHY specific driver override for writing a MMD 868 * register. This function is optional for PHY specific 869 * drivers. When not provided, the default MMD write function 870 * will be used by phy_write_mmd(), which will use either a 871 * direct write for Clause 45 PHYs, or an indirect write for 872 * Clause 22 PHYs. devnum is the MMD device number within the 873 * PHY device, regnum is the register within the selected MMD 874 * device. val is the value to be written. 875 */ 876 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, 877 u16 val); 878 879 /** @read_page: Return the current PHY register page number */ 880 int (*read_page)(struct phy_device *dev); 881 /** @write_page: Set the current PHY register page number */ 882 int (*write_page)(struct phy_device *dev, int page); 883 884 /** 885 * @module_info: Get the size and type of the eeprom contained 886 * within a plug-in module 887 */ 888 int (*module_info)(struct phy_device *dev, 889 struct ethtool_modinfo *modinfo); 890 891 /** 892 * @module_eeprom: Get the eeprom information from the plug-in 893 * module 894 */ 895 int (*module_eeprom)(struct phy_device *dev, 896 struct ethtool_eeprom *ee, u8 *data); 897 898 /** @cable_test_start: Start a cable test */ 899 int (*cable_test_start)(struct phy_device *dev); 900 901 /** @cable_test_tdr_start: Start a raw TDR cable test */ 902 int (*cable_test_tdr_start)(struct phy_device *dev, 903 const struct phy_tdr_config *config); 904 905 /** 906 * @cable_test_get_status: Once per second, or on interrupt, 907 * request the status of the test. 908 */ 909 int (*cable_test_get_status)(struct phy_device *dev, bool *finished); 910 911 /* Get statistics from the PHY using ethtool */ 912 /** @get_sset_count: Number of statistic counters */ 913 int (*get_sset_count)(struct phy_device *dev); 914 /** @get_strings: Names of the statistic counters */ 915 void (*get_strings)(struct phy_device *dev, u8 *data); 916 /** @get_stats: Return the statistic counter values */ 917 void (*get_stats)(struct phy_device *dev, 918 struct ethtool_stats *stats, u64 *data); 919 920 /* Get and Set PHY tunables */ 921 /** @get_tunable: Return the value of a tunable */ 922 int (*get_tunable)(struct phy_device *dev, 923 struct ethtool_tunable *tuna, void *data); 924 /** @set_tunable: Set the value of a tunable */ 925 int (*set_tunable)(struct phy_device *dev, 926 struct ethtool_tunable *tuna, 927 const void *data); 928 /** @set_loopback: Set the loopback mood of the PHY */ 929 int (*set_loopback)(struct phy_device *dev, bool enable); 930 /** @get_sqi: Get the signal quality indication */ 931 int (*get_sqi)(struct phy_device *dev); 932 /** @get_sqi_max: Get the maximum signal quality indication */ 933 int (*get_sqi_max)(struct phy_device *dev); 934}; 935#define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ 936 struct phy_driver, mdiodrv) 937 938#define PHY_ANY_ID "MATCH ANY PHY" 939#define PHY_ANY_UID 0xffffffff 940 941#define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0) 942#define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4) 943#define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10) 944 945/* A Structure for boards to register fixups with the PHY Lib */ 946struct phy_fixup { 947 struct list_head list; 948 char bus_id[MII_BUS_ID_SIZE + 3]; 949 u32 phy_uid; 950 u32 phy_uid_mask; 951 int (*run)(struct phy_device *phydev); 952}; 953 954const char *phy_speed_to_str(int speed); 955const char *phy_duplex_to_str(unsigned int duplex); 956 957/* A structure for mapping a particular speed and duplex 958 * combination to a particular SUPPORTED and ADVERTISED value 959 */ 960struct phy_setting { 961 u32 speed; 962 u8 duplex; 963 u8 bit; 964}; 965 966const struct phy_setting * 967phy_lookup_setting(int speed, int duplex, const unsigned long *mask, 968 bool exact); 969size_t phy_speeds(unsigned int *speeds, size_t size, 970 unsigned long *mask); 971void of_set_phy_supported(struct phy_device *phydev); 972void of_set_phy_eee_broken(struct phy_device *phydev); 973int phy_speed_down_core(struct phy_device *phydev); 974 975/** 976 * phy_is_started - Convenience function to check whether PHY is started 977 * @phydev: The phy_device struct 978 */ 979static inline bool phy_is_started(struct phy_device *phydev) 980{ 981 return phydev->state >= PHY_UP; 982} 983 984void phy_resolve_aneg_pause(struct phy_device *phydev); 985void phy_resolve_aneg_linkmode(struct phy_device *phydev); 986void phy_check_downshift(struct phy_device *phydev); 987 988/** 989 * phy_read - Convenience function for reading a given PHY register 990 * @phydev: the phy_device struct 991 * @regnum: register number to read 992 * 993 * NOTE: MUST NOT be called from interrupt context, 994 * because the bus read/write functions may wait for an interrupt 995 * to conclude the operation. 996 */ 997static inline int phy_read(struct phy_device *phydev, u32 regnum) 998{ 999 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1000} 1001 1002#define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \ 1003 timeout_us, sleep_before_read) \ 1004({ \ 1005 int __ret = read_poll_timeout(phy_read, val, (cond) || val < 0, \ 1006 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \ 1007 if (val < 0) \ 1008 __ret = val; \ 1009 if (__ret) \ 1010 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1011 __ret; \ 1012}) 1013 1014 1015/** 1016 * __phy_read - convenience function for reading a given PHY register 1017 * @phydev: the phy_device struct 1018 * @regnum: register number to read 1019 * 1020 * The caller must have taken the MDIO bus lock. 1021 */ 1022static inline int __phy_read(struct phy_device *phydev, u32 regnum) 1023{ 1024 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum); 1025} 1026 1027/** 1028 * phy_write - Convenience function for writing a given PHY register 1029 * @phydev: the phy_device struct 1030 * @regnum: register number to write 1031 * @val: value to write to @regnum 1032 * 1033 * NOTE: MUST NOT be called from interrupt context, 1034 * because the bus read/write functions may wait for an interrupt 1035 * to conclude the operation. 1036 */ 1037static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1038{ 1039 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); 1040} 1041 1042/** 1043 * __phy_write - Convenience function for writing a given PHY register 1044 * @phydev: the phy_device struct 1045 * @regnum: register number to write 1046 * @val: value to write to @regnum 1047 * 1048 * The caller must have taken the MDIO bus lock. 1049 */ 1050static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val) 1051{ 1052 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, 1053 val); 1054} 1055 1056/** 1057 * __phy_modify_changed() - Convenience function for modifying a PHY register 1058 * @phydev: a pointer to a &struct phy_device 1059 * @regnum: register number 1060 * @mask: bit mask of bits to clear 1061 * @set: bit mask of bits to set 1062 * 1063 * Unlocked helper function which allows a PHY register to be modified as 1064 * new register value = (old register value & ~mask) | set 1065 * 1066 * Returns negative errno, 0 if there was no change, and 1 in case of change 1067 */ 1068static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum, 1069 u16 mask, u16 set) 1070{ 1071 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr, 1072 regnum, mask, set); 1073} 1074 1075/* 1076 * phy_read_mmd - Convenience function for reading a register 1077 * from an MMD on a given PHY. 1078 */ 1079int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1080 1081/** 1082 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a 1083 * condition is met or a timeout occurs 1084 * 1085 * @phydev: The phy_device struct 1086 * @devaddr: The MMD to read from 1087 * @regnum: The register on the MMD to read 1088 * @val: Variable to read the register into 1089 * @cond: Break condition (usually involving @val) 1090 * @sleep_us: Maximum time to sleep between reads in us (0 1091 * tight-loops). Should be less than ~20ms since usleep_range 1092 * is used (see Documentation/timers/timers-howto.rst). 1093 * @timeout_us: Timeout in us, 0 means never timeout 1094 * @sleep_before_read: if it is true, sleep @sleep_us before read. 1095 * Returns 0 on success and -ETIMEDOUT upon a timeout. In either 1096 * case, the last read value at @args is stored in @val. Must not 1097 * be called from atomic context if sleep_us or timeout_us are used. 1098 */ 1099#define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \ 1100 sleep_us, timeout_us, sleep_before_read) \ 1101({ \ 1102 int __ret = read_poll_timeout(phy_read_mmd, val, (cond) || val < 0, \ 1103 sleep_us, timeout_us, sleep_before_read, \ 1104 phydev, devaddr, regnum); \ 1105 if (val < 0) \ 1106 __ret = val; \ 1107 if (__ret) \ 1108 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \ 1109 __ret; \ 1110}) 1111 1112/* 1113 * __phy_read_mmd - Convenience function for reading a register 1114 * from an MMD on a given PHY. 1115 */ 1116int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); 1117 1118/* 1119 * phy_write_mmd - Convenience function for writing a register 1120 * on an MMD on a given PHY. 1121 */ 1122int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1123 1124/* 1125 * __phy_write_mmd - Convenience function for writing a register 1126 * on an MMD on a given PHY. 1127 */ 1128int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); 1129 1130int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1131 u16 set); 1132int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, 1133 u16 set); 1134int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1135int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set); 1136 1137int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1138 u16 mask, u16 set); 1139int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum, 1140 u16 mask, u16 set); 1141int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1142 u16 mask, u16 set); 1143int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum, 1144 u16 mask, u16 set); 1145 1146/** 1147 * __phy_set_bits - Convenience function for setting bits in a PHY register 1148 * @phydev: the phy_device struct 1149 * @regnum: register number to write 1150 * @val: bits to set 1151 * 1152 * The caller must have taken the MDIO bus lock. 1153 */ 1154static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1155{ 1156 return __phy_modify(phydev, regnum, 0, val); 1157} 1158 1159/** 1160 * __phy_clear_bits - Convenience function for clearing bits in a PHY register 1161 * @phydev: the phy_device struct 1162 * @regnum: register number to write 1163 * @val: bits to clear 1164 * 1165 * The caller must have taken the MDIO bus lock. 1166 */ 1167static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum, 1168 u16 val) 1169{ 1170 return __phy_modify(phydev, regnum, val, 0); 1171} 1172 1173/** 1174 * phy_set_bits - Convenience function for setting bits in a PHY register 1175 * @phydev: the phy_device struct 1176 * @regnum: register number to write 1177 * @val: bits to set 1178 */ 1179static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val) 1180{ 1181 return phy_modify(phydev, regnum, 0, val); 1182} 1183 1184/** 1185 * phy_clear_bits - Convenience function for clearing bits in a PHY register 1186 * @phydev: the phy_device struct 1187 * @regnum: register number to write 1188 * @val: bits to clear 1189 */ 1190static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val) 1191{ 1192 return phy_modify(phydev, regnum, val, 0); 1193} 1194 1195/** 1196 * __phy_set_bits_mmd - Convenience function for setting bits in a register 1197 * on MMD 1198 * @phydev: the phy_device struct 1199 * @devad: the MMD containing register to modify 1200 * @regnum: register number to modify 1201 * @val: bits to set 1202 * 1203 * The caller must have taken the MDIO bus lock. 1204 */ 1205static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad, 1206 u32 regnum, u16 val) 1207{ 1208 return __phy_modify_mmd(phydev, devad, regnum, 0, val); 1209} 1210 1211/** 1212 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register 1213 * on MMD 1214 * @phydev: the phy_device struct 1215 * @devad: the MMD containing register to modify 1216 * @regnum: register number to modify 1217 * @val: bits to clear 1218 * 1219 * The caller must have taken the MDIO bus lock. 1220 */ 1221static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1222 u32 regnum, u16 val) 1223{ 1224 return __phy_modify_mmd(phydev, devad, regnum, val, 0); 1225} 1226 1227/** 1228 * phy_set_bits_mmd - Convenience function for setting bits in a register 1229 * on MMD 1230 * @phydev: the phy_device struct 1231 * @devad: the MMD containing register to modify 1232 * @regnum: register number to modify 1233 * @val: bits to set 1234 */ 1235static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad, 1236 u32 regnum, u16 val) 1237{ 1238 return phy_modify_mmd(phydev, devad, regnum, 0, val); 1239} 1240 1241/** 1242 * phy_clear_bits_mmd - Convenience function for clearing bits in a register 1243 * on MMD 1244 * @phydev: the phy_device struct 1245 * @devad: the MMD containing register to modify 1246 * @regnum: register number to modify 1247 * @val: bits to clear 1248 */ 1249static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad, 1250 u32 regnum, u16 val) 1251{ 1252 return phy_modify_mmd(phydev, devad, regnum, val, 0); 1253} 1254 1255/** 1256 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq 1257 * @phydev: the phy_device struct 1258 * 1259 * NOTE: must be kept in sync with addition/removal of PHY_POLL and 1260 * PHY_MAC_INTERRUPT 1261 */ 1262static inline bool phy_interrupt_is_valid(struct phy_device *phydev) 1263{ 1264 return phydev->irq != PHY_POLL && phydev->irq != PHY_MAC_INTERRUPT; 1265} 1266 1267/** 1268 * phy_polling_mode - Convenience function for testing whether polling is 1269 * used to detect PHY status changes 1270 * @phydev: the phy_device struct 1271 */ 1272static inline bool phy_polling_mode(struct phy_device *phydev) 1273{ 1274 if (phydev->state == PHY_CABLETEST) 1275 if (phydev->drv->flags & PHY_POLL_CABLE_TEST) 1276 return true; 1277 1278 return phydev->irq == PHY_POLL; 1279} 1280 1281/** 1282 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration. 1283 * @phydev: the phy_device struct 1284 */ 1285static inline bool phy_has_hwtstamp(struct phy_device *phydev) 1286{ 1287 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp; 1288} 1289 1290/** 1291 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping. 1292 * @phydev: the phy_device struct 1293 */ 1294static inline bool phy_has_rxtstamp(struct phy_device *phydev) 1295{ 1296 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp; 1297} 1298 1299/** 1300 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or 1301 * PTP hardware clock capabilities. 1302 * @phydev: the phy_device struct 1303 */ 1304static inline bool phy_has_tsinfo(struct phy_device *phydev) 1305{ 1306 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info; 1307} 1308 1309/** 1310 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping. 1311 * @phydev: the phy_device struct 1312 */ 1313static inline bool phy_has_txtstamp(struct phy_device *phydev) 1314{ 1315 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp; 1316} 1317 1318static inline int phy_hwtstamp(struct phy_device *phydev, struct ifreq *ifr) 1319{ 1320 return phydev->mii_ts->hwtstamp(phydev->mii_ts, ifr); 1321} 1322 1323static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb, 1324 int type) 1325{ 1326 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type); 1327} 1328 1329static inline int phy_ts_info(struct phy_device *phydev, 1330 struct ethtool_ts_info *tsinfo) 1331{ 1332 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo); 1333} 1334 1335static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb, 1336 int type) 1337{ 1338 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type); 1339} 1340 1341/** 1342 * phy_is_internal - Convenience function for testing if a PHY is internal 1343 * @phydev: the phy_device struct 1344 */ 1345static inline bool phy_is_internal(struct phy_device *phydev) 1346{ 1347 return phydev->is_internal; 1348} 1349 1350/** 1351 * phy_on_sfp - Convenience function for testing if a PHY is on an SFP module 1352 * @phydev: the phy_device struct 1353 */ 1354static inline bool phy_on_sfp(struct phy_device *phydev) 1355{ 1356 return phydev->is_on_sfp_module; 1357} 1358 1359/** 1360 * phy_interface_mode_is_rgmii - Convenience function for testing if a 1361 * PHY interface mode is RGMII (all variants) 1362 * @mode: the &phy_interface_t enum 1363 */ 1364static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode) 1365{ 1366 return mode >= PHY_INTERFACE_MODE_RGMII && 1367 mode <= PHY_INTERFACE_MODE_RGMII_TXID; 1368}; 1369 1370/** 1371 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z 1372 * negotiation 1373 * @mode: one of &enum phy_interface_t 1374 * 1375 * Returns true if the PHY interface mode uses the 16-bit negotiation 1376 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding) 1377 */ 1378static inline bool phy_interface_mode_is_8023z(phy_interface_t mode) 1379{ 1380 return mode == PHY_INTERFACE_MODE_1000BASEX || 1381 mode == PHY_INTERFACE_MODE_2500BASEX; 1382} 1383 1384/** 1385 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface 1386 * is RGMII (all variants) 1387 * @phydev: the phy_device struct 1388 */ 1389static inline bool phy_interface_is_rgmii(struct phy_device *phydev) 1390{ 1391 return phy_interface_mode_is_rgmii(phydev->interface); 1392}; 1393 1394/** 1395 * phy_is_pseudo_fixed_link - Convenience function for testing if this 1396 * PHY is the CPU port facing side of an Ethernet switch, or similar. 1397 * @phydev: the phy_device struct 1398 */ 1399static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) 1400{ 1401 return phydev->is_pseudo_fixed_link; 1402} 1403 1404int phy_save_page(struct phy_device *phydev); 1405int phy_select_page(struct phy_device *phydev, int page); 1406int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); 1407int phy_read_paged(struct phy_device *phydev, int page, u32 regnum); 1408int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val); 1409int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum, 1410 u16 mask, u16 set); 1411int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum, 1412 u16 mask, u16 set); 1413 1414struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id, 1415 bool is_c45, 1416 struct phy_c45_device_ids *c45_ids); 1417#if IS_ENABLED(CONFIG_PHYLIB) 1418int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id); 1419struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode); 1420struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode); 1421struct phy_device *device_phy_find_device(struct device *dev); 1422struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode); 1423struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); 1424int phy_device_register(struct phy_device *phy); 1425void phy_device_free(struct phy_device *phydev); 1426#else 1427static inline int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id) 1428{ 1429 return 0; 1430} 1431static inline 1432struct mdio_device *fwnode_mdio_find_device(struct fwnode_handle *fwnode) 1433{ 1434 return 0; 1435} 1436 1437static inline 1438struct phy_device *fwnode_phy_find_device(struct fwnode_handle *phy_fwnode) 1439{ 1440 return NULL; 1441} 1442 1443static inline struct phy_device *device_phy_find_device(struct device *dev) 1444{ 1445 return NULL; 1446} 1447 1448static inline 1449struct fwnode_handle *fwnode_get_phy_node(struct fwnode_handle *fwnode) 1450{ 1451 return NULL; 1452} 1453 1454static inline 1455struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45) 1456{ 1457 return NULL; 1458} 1459 1460static inline int phy_device_register(struct phy_device *phy) 1461{ 1462 return 0; 1463} 1464 1465static inline void phy_device_free(struct phy_device *phydev) { } 1466#endif /* CONFIG_PHYLIB */ 1467void phy_device_remove(struct phy_device *phydev); 1468int phy_get_c45_ids(struct phy_device *phydev); 1469int phy_init_hw(struct phy_device *phydev); 1470int phy_suspend(struct phy_device *phydev); 1471int phy_resume(struct phy_device *phydev); 1472int __phy_resume(struct phy_device *phydev); 1473int phy_loopback(struct phy_device *phydev, bool enable); 1474void phy_sfp_attach(void *upstream, struct sfp_bus *bus); 1475void phy_sfp_detach(void *upstream, struct sfp_bus *bus); 1476int phy_sfp_probe(struct phy_device *phydev, 1477 const struct sfp_upstream_ops *ops); 1478struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, 1479 phy_interface_t interface); 1480struct phy_device *phy_find_first(struct mii_bus *bus); 1481int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, 1482 u32 flags, phy_interface_t interface); 1483int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, 1484 void (*handler)(struct net_device *), 1485 phy_interface_t interface); 1486struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, 1487 void (*handler)(struct net_device *), 1488 phy_interface_t interface); 1489void phy_disconnect(struct phy_device *phydev); 1490void phy_detach(struct phy_device *phydev); 1491void phy_start(struct phy_device *phydev); 1492void phy_stop(struct phy_device *phydev); 1493int phy_config_aneg(struct phy_device *phydev); 1494int phy_start_aneg(struct phy_device *phydev); 1495int phy_aneg_done(struct phy_device *phydev); 1496int phy_speed_down(struct phy_device *phydev, bool sync); 1497int phy_speed_up(struct phy_device *phydev); 1498 1499int phy_restart_aneg(struct phy_device *phydev); 1500int phy_reset_after_clk_enable(struct phy_device *phydev); 1501 1502#if IS_ENABLED(CONFIG_PHYLIB) 1503int phy_start_cable_test(struct phy_device *phydev, 1504 struct netlink_ext_ack *extack); 1505int phy_start_cable_test_tdr(struct phy_device *phydev, 1506 struct netlink_ext_ack *extack, 1507 const struct phy_tdr_config *config); 1508#else 1509static inline 1510int phy_start_cable_test(struct phy_device *phydev, 1511 struct netlink_ext_ack *extack) 1512{ 1513 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1514 return -EOPNOTSUPP; 1515} 1516static inline 1517int phy_start_cable_test_tdr(struct phy_device *phydev, 1518 struct netlink_ext_ack *extack, 1519 const struct phy_tdr_config *config) 1520{ 1521 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support"); 1522 return -EOPNOTSUPP; 1523} 1524#endif 1525 1526int phy_cable_test_result(struct phy_device *phydev, u8 pair, u16 result); 1527int phy_cable_test_fault_length(struct phy_device *phydev, u8 pair, 1528 u16 cm); 1529 1530static inline void phy_device_reset(struct phy_device *phydev, int value) 1531{ 1532 mdio_device_reset(&phydev->mdio, value); 1533} 1534 1535#define phydev_err(_phydev, format, args...) \ 1536 dev_err(&_phydev->mdio.dev, format, ##args) 1537 1538#define phydev_info(_phydev, format, args...) \ 1539 dev_info(&_phydev->mdio.dev, format, ##args) 1540 1541#define phydev_warn(_phydev, format, args...) \ 1542 dev_warn(&_phydev->mdio.dev, format, ##args) 1543 1544#define phydev_dbg(_phydev, format, args...) \ 1545 dev_dbg(&_phydev->mdio.dev, format, ##args) 1546 1547static inline const char *phydev_name(const struct phy_device *phydev) 1548{ 1549 return dev_name(&phydev->mdio.dev); 1550} 1551 1552static inline void phy_lock_mdio_bus(struct phy_device *phydev) 1553{ 1554 mutex_lock(&phydev->mdio.bus->mdio_lock); 1555} 1556 1557static inline void phy_unlock_mdio_bus(struct phy_device *phydev) 1558{ 1559 mutex_unlock(&phydev->mdio.bus->mdio_lock); 1560} 1561 1562void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) 1563 __printf(2, 3); 1564char *phy_attached_info_irq(struct phy_device *phydev) 1565 __malloc; 1566void phy_attached_info(struct phy_device *phydev); 1567 1568/* Clause 22 PHY */ 1569int genphy_read_abilities(struct phy_device *phydev); 1570int genphy_setup_forced(struct phy_device *phydev); 1571int genphy_restart_aneg(struct phy_device *phydev); 1572int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1573int genphy_config_eee_advert(struct phy_device *phydev); 1574int __genphy_config_aneg(struct phy_device *phydev, bool changed); 1575int genphy_aneg_done(struct phy_device *phydev); 1576int genphy_update_link(struct phy_device *phydev); 1577int genphy_read_lpa(struct phy_device *phydev); 1578int genphy_read_status_fixed(struct phy_device *phydev); 1579int genphy_read_status(struct phy_device *phydev); 1580int genphy_suspend(struct phy_device *phydev); 1581int genphy_resume(struct phy_device *phydev); 1582int genphy_loopback(struct phy_device *phydev, bool enable); 1583int genphy_soft_reset(struct phy_device *phydev); 1584irqreturn_t genphy_handle_interrupt_no_ack(struct phy_device *phydev); 1585 1586static inline int genphy_config_aneg(struct phy_device *phydev) 1587{ 1588 return __genphy_config_aneg(phydev, false); 1589} 1590 1591static inline int genphy_no_config_intr(struct phy_device *phydev) 1592{ 1593 return 0; 1594} 1595int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad, 1596 u16 regnum); 1597int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum, 1598 u16 regnum, u16 val); 1599 1600/* Clause 37 */ 1601int genphy_c37_config_aneg(struct phy_device *phydev); 1602int genphy_c37_read_status(struct phy_device *phydev); 1603 1604/* Clause 45 PHY */ 1605int genphy_c45_restart_aneg(struct phy_device *phydev); 1606int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart); 1607int genphy_c45_aneg_done(struct phy_device *phydev); 1608int genphy_c45_read_link(struct phy_device *phydev); 1609int genphy_c45_read_lpa(struct phy_device *phydev); 1610int genphy_c45_read_pma(struct phy_device *phydev); 1611int genphy_c45_pma_setup_forced(struct phy_device *phydev); 1612int genphy_c45_an_config_aneg(struct phy_device *phydev); 1613int genphy_c45_an_disable_aneg(struct phy_device *phydev); 1614int genphy_c45_read_mdix(struct phy_device *phydev); 1615int genphy_c45_pma_read_abilities(struct phy_device *phydev); 1616int genphy_c45_read_status(struct phy_device *phydev); 1617int genphy_c45_config_aneg(struct phy_device *phydev); 1618int genphy_c45_loopback(struct phy_device *phydev, bool enable); 1619int genphy_c45_pma_resume(struct phy_device *phydev); 1620int genphy_c45_pma_suspend(struct phy_device *phydev); 1621int genphy_c45_fast_retrain(struct phy_device *phydev, bool enable); 1622 1623/* Generic C45 PHY driver */ 1624extern struct phy_driver genphy_c45_driver; 1625 1626/* The gen10g_* functions are the old Clause 45 stub */ 1627int gen10g_config_aneg(struct phy_device *phydev); 1628 1629static inline int phy_read_status(struct phy_device *phydev) 1630{ 1631 if (!phydev->drv) 1632 return -EIO; 1633 1634 if (phydev->drv->read_status) 1635 return phydev->drv->read_status(phydev); 1636 else 1637 return genphy_read_status(phydev); 1638} 1639 1640void phy_driver_unregister(struct phy_driver *drv); 1641void phy_drivers_unregister(struct phy_driver *drv, int n); 1642int phy_driver_register(struct phy_driver *new_driver, struct module *owner); 1643int phy_drivers_register(struct phy_driver *new_driver, int n, 1644 struct module *owner); 1645void phy_error(struct phy_device *phydev); 1646void phy_state_machine(struct work_struct *work); 1647void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies); 1648void phy_trigger_machine(struct phy_device *phydev); 1649void phy_mac_interrupt(struct phy_device *phydev); 1650void phy_start_machine(struct phy_device *phydev); 1651void phy_stop_machine(struct phy_device *phydev); 1652void phy_ethtool_ksettings_get(struct phy_device *phydev, 1653 struct ethtool_link_ksettings *cmd); 1654int phy_ethtool_ksettings_set(struct phy_device *phydev, 1655 const struct ethtool_link_ksettings *cmd); 1656int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); 1657int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); 1658int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd); 1659int phy_disable_interrupts(struct phy_device *phydev); 1660void phy_request_interrupt(struct phy_device *phydev); 1661void phy_free_interrupt(struct phy_device *phydev); 1662void phy_print_status(struct phy_device *phydev); 1663int phy_set_max_speed(struct phy_device *phydev, u32 max_speed); 1664void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode); 1665void phy_advertise_supported(struct phy_device *phydev); 1666void phy_support_sym_pause(struct phy_device *phydev); 1667void phy_support_asym_pause(struct phy_device *phydev); 1668void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx, 1669 bool autoneg); 1670void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); 1671bool phy_validate_pause(struct phy_device *phydev, 1672 struct ethtool_pauseparam *pp); 1673void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause); 1674 1675s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev, 1676 const int *delay_values, int size, bool is_rx); 1677 1678void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv, 1679 bool *tx_pause, bool *rx_pause); 1680 1681int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, 1682 int (*run)(struct phy_device *)); 1683int phy_register_fixup_for_id(const char *bus_id, 1684 int (*run)(struct phy_device *)); 1685int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, 1686 int (*run)(struct phy_device *)); 1687 1688int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask); 1689int phy_unregister_fixup_for_id(const char *bus_id); 1690int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask); 1691 1692int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); 1693int phy_get_eee_err(struct phy_device *phydev); 1694int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data); 1695int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data); 1696int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); 1697void phy_ethtool_get_wol(struct phy_device *phydev, 1698 struct ethtool_wolinfo *wol); 1699int phy_ethtool_get_link_ksettings(struct net_device *ndev, 1700 struct ethtool_link_ksettings *cmd); 1701int phy_ethtool_set_link_ksettings(struct net_device *ndev, 1702 const struct ethtool_link_ksettings *cmd); 1703int phy_ethtool_nway_reset(struct net_device *ndev); 1704int phy_package_join(struct phy_device *phydev, int addr, size_t priv_size); 1705void phy_package_leave(struct phy_device *phydev); 1706int devm_phy_package_join(struct device *dev, struct phy_device *phydev, 1707 int addr, size_t priv_size); 1708 1709#if IS_ENABLED(CONFIG_PHYLIB) 1710int __init mdio_bus_init(void); 1711void mdio_bus_exit(void); 1712#endif 1713 1714int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data); 1715int phy_ethtool_get_sset_count(struct phy_device *phydev); 1716int phy_ethtool_get_stats(struct phy_device *phydev, 1717 struct ethtool_stats *stats, u64 *data); 1718 1719static inline int phy_package_read(struct phy_device *phydev, u32 regnum) 1720{ 1721 struct phy_package_shared *shared = phydev->shared; 1722 1723 if (!shared) 1724 return -EIO; 1725 1726 return mdiobus_read(phydev->mdio.bus, shared->addr, regnum); 1727} 1728 1729static inline int __phy_package_read(struct phy_device *phydev, u32 regnum) 1730{ 1731 struct phy_package_shared *shared = phydev->shared; 1732 1733 if (!shared) 1734 return -EIO; 1735 1736 return __mdiobus_read(phydev->mdio.bus, shared->addr, regnum); 1737} 1738 1739static inline int phy_package_write(struct phy_device *phydev, 1740 u32 regnum, u16 val) 1741{ 1742 struct phy_package_shared *shared = phydev->shared; 1743 1744 if (!shared) 1745 return -EIO; 1746 1747 return mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val); 1748} 1749 1750static inline int __phy_package_write(struct phy_device *phydev, 1751 u32 regnum, u16 val) 1752{ 1753 struct phy_package_shared *shared = phydev->shared; 1754 1755 if (!shared) 1756 return -EIO; 1757 1758 return __mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val); 1759} 1760 1761static inline bool __phy_package_set_once(struct phy_device *phydev, 1762 unsigned int b) 1763{ 1764 struct phy_package_shared *shared = phydev->shared; 1765 1766 if (!shared) 1767 return false; 1768 1769 return !test_and_set_bit(b, &shared->flags); 1770} 1771 1772static inline bool phy_package_init_once(struct phy_device *phydev) 1773{ 1774 return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE); 1775} 1776 1777static inline bool phy_package_probe_once(struct phy_device *phydev) 1778{ 1779 return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE); 1780} 1781 1782extern struct bus_type mdio_bus_type; 1783 1784struct mdio_board_info { 1785 const char *bus_id; 1786 char modalias[MDIO_NAME_SIZE]; 1787 int mdio_addr; 1788 const void *platform_data; 1789}; 1790 1791#if IS_ENABLED(CONFIG_MDIO_DEVICE) 1792int mdiobus_register_board_info(const struct mdio_board_info *info, 1793 unsigned int n); 1794#else 1795static inline int mdiobus_register_board_info(const struct mdio_board_info *i, 1796 unsigned int n) 1797{ 1798 return 0; 1799} 1800#endif 1801 1802 1803/** 1804 * phy_module_driver() - Helper macro for registering PHY drivers 1805 * @__phy_drivers: array of PHY drivers to register 1806 * @__count: Numbers of members in array 1807 * 1808 * Helper macro for PHY drivers which do not do anything special in module 1809 * init/exit. Each module may only use this macro once, and calling it 1810 * replaces module_init() and module_exit(). 1811 */ 1812#define phy_module_driver(__phy_drivers, __count) \ 1813static int __init phy_module_init(void) \ 1814{ \ 1815 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \ 1816} \ 1817module_init(phy_module_init); \ 1818static void __exit phy_module_exit(void) \ 1819{ \ 1820 phy_drivers_unregister(__phy_drivers, __count); \ 1821} \ 1822module_exit(phy_module_exit) 1823 1824#define module_phy_driver(__phy_drivers) \ 1825 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) 1826 1827bool phy_driver_is_genphy(struct phy_device *phydev); 1828bool phy_driver_is_genphy_10g(struct phy_device *phydev); 1829 1830#endif /* __PHY_H */