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1/* SPDX-License-Identifier: GPL-2.0-or-later */
2/*
3 * smp.h: PowerPC-specific SMP code.
4 *
5 * Original was a copy of sparc smp.h. Now heavily modified
6 * for PPC.
7 *
8 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
9 * Copyright (C) 1996-2001 Cort Dougan <cort@fsmlabs.com>
10 */
11
12#ifndef _ASM_POWERPC_SMP_H
13#define _ASM_POWERPC_SMP_H
14#ifdef __KERNEL__
15
16#include <linux/threads.h>
17#include <linux/cpumask.h>
18#include <linux/kernel.h>
19#include <linux/irqreturn.h>
20
21#ifndef __ASSEMBLY__
22
23#ifdef CONFIG_PPC64
24#include <asm/paca.h>
25#endif
26#include <asm/percpu.h>
27
28extern int boot_cpuid;
29extern int spinning_secondaries;
30extern u32 *cpu_to_phys_id;
31extern bool coregroup_enabled;
32
33extern int cpu_to_chip_id(int cpu);
34extern int *chip_id_lookup_table;
35
36DECLARE_PER_CPU(cpumask_var_t, thread_group_l1_cache_map);
37DECLARE_PER_CPU(cpumask_var_t, thread_group_l2_cache_map);
38DECLARE_PER_CPU(cpumask_var_t, thread_group_l3_cache_map);
39
40#ifdef CONFIG_SMP
41
42struct smp_ops_t {
43 void (*message_pass)(int cpu, int msg);
44#ifdef CONFIG_PPC_SMP_MUXED_IPI
45 void (*cause_ipi)(int cpu);
46#endif
47 int (*cause_nmi_ipi)(int cpu);
48 void (*probe)(void);
49 int (*kick_cpu)(int nr);
50 int (*prepare_cpu)(int nr);
51 void (*setup_cpu)(int nr);
52 void (*bringup_done)(void);
53 void (*take_timebase)(void);
54 void (*give_timebase)(void);
55 int (*cpu_disable)(void);
56 void (*cpu_die)(unsigned int nr);
57 int (*cpu_bootable)(unsigned int nr);
58#ifdef CONFIG_HOTPLUG_CPU
59 void (*cpu_offline_self)(void);
60#endif
61};
62
63extern int smp_send_nmi_ipi(int cpu, void (*fn)(struct pt_regs *), u64 delay_us);
64extern int smp_send_safe_nmi_ipi(int cpu, void (*fn)(struct pt_regs *), u64 delay_us);
65extern void smp_send_debugger_break(void);
66extern void start_secondary_resume(void);
67extern void smp_generic_give_timebase(void);
68extern void smp_generic_take_timebase(void);
69
70DECLARE_PER_CPU(unsigned int, cpu_pvr);
71
72#ifdef CONFIG_HOTPLUG_CPU
73int generic_cpu_disable(void);
74void generic_cpu_die(unsigned int cpu);
75void generic_set_cpu_dead(unsigned int cpu);
76void generic_set_cpu_up(unsigned int cpu);
77int generic_check_cpu_restart(unsigned int cpu);
78int is_cpu_dead(unsigned int cpu);
79#else
80#define generic_set_cpu_up(i) do { } while (0)
81#endif
82
83#ifdef CONFIG_PPC64
84#define raw_smp_processor_id() (local_paca->paca_index)
85#define hard_smp_processor_id() (get_paca()->hw_cpu_id)
86#else
87/* 32-bit */
88extern int smp_hw_index[];
89
90/*
91 * This is particularly ugly: it appears we can't actually get the definition
92 * of task_struct here, but we need access to the CPU this task is running on.
93 * Instead of using task_struct we're using _TASK_CPU which is extracted from
94 * asm-offsets.h by kbuild to get the current processor ID.
95 *
96 * This also needs to be safeguarded when building asm-offsets.s because at
97 * that time _TASK_CPU is not defined yet. It could have been guarded by
98 * _TASK_CPU itself, but we want the build to fail if _TASK_CPU is missing
99 * when building something else than asm-offsets.s
100 */
101#ifdef GENERATING_ASM_OFFSETS
102#define raw_smp_processor_id() (0)
103#else
104#define raw_smp_processor_id() (*(unsigned int *)((void *)current + _TASK_CPU))
105#endif
106#define hard_smp_processor_id() (smp_hw_index[smp_processor_id()])
107
108static inline int get_hard_smp_processor_id(int cpu)
109{
110 return smp_hw_index[cpu];
111}
112
113static inline void set_hard_smp_processor_id(int cpu, int phys)
114{
115 smp_hw_index[cpu] = phys;
116}
117#endif
118
119DECLARE_PER_CPU(cpumask_var_t, cpu_sibling_map);
120DECLARE_PER_CPU(cpumask_var_t, cpu_l2_cache_map);
121DECLARE_PER_CPU(cpumask_var_t, cpu_core_map);
122DECLARE_PER_CPU(cpumask_var_t, cpu_smallcore_map);
123
124static inline struct cpumask *cpu_sibling_mask(int cpu)
125{
126 return per_cpu(cpu_sibling_map, cpu);
127}
128
129static inline struct cpumask *cpu_core_mask(int cpu)
130{
131 return per_cpu(cpu_core_map, cpu);
132}
133
134static inline struct cpumask *cpu_l2_cache_mask(int cpu)
135{
136 return per_cpu(cpu_l2_cache_map, cpu);
137}
138
139static inline struct cpumask *cpu_smallcore_mask(int cpu)
140{
141 return per_cpu(cpu_smallcore_map, cpu);
142}
143
144extern int cpu_to_core_id(int cpu);
145
146extern bool has_big_cores;
147extern bool thread_group_shares_l2;
148extern bool thread_group_shares_l3;
149
150#define cpu_smt_mask cpu_smt_mask
151#ifdef CONFIG_SCHED_SMT
152static inline const struct cpumask *cpu_smt_mask(int cpu)
153{
154 if (has_big_cores)
155 return per_cpu(cpu_smallcore_map, cpu);
156
157 return per_cpu(cpu_sibling_map, cpu);
158}
159#endif /* CONFIG_SCHED_SMT */
160
161/* Since OpenPIC has only 4 IPIs, we use slightly different message numbers.
162 *
163 * Make sure this matches openpic_request_IPIs in open_pic.c, or what shows up
164 * in /proc/interrupts will be wrong!!! --Troy */
165#define PPC_MSG_CALL_FUNCTION 0
166#define PPC_MSG_RESCHEDULE 1
167#define PPC_MSG_TICK_BROADCAST 2
168#define PPC_MSG_NMI_IPI 3
169
170/* This is only used by the powernv kernel */
171#define PPC_MSG_RM_HOST_ACTION 4
172
173#define NMI_IPI_ALL_OTHERS -2
174
175#ifdef CONFIG_NMI_IPI
176extern int smp_handle_nmi_ipi(struct pt_regs *regs);
177#else
178static inline int smp_handle_nmi_ipi(struct pt_regs *regs) { return 0; }
179#endif
180
181/* for irq controllers that have dedicated ipis per message (4) */
182extern int smp_request_message_ipi(int virq, int message);
183extern const char *smp_ipi_name[];
184
185/* for irq controllers with only a single ipi */
186extern void smp_muxed_ipi_message_pass(int cpu, int msg);
187extern void smp_muxed_ipi_set_message(int cpu, int msg);
188extern irqreturn_t smp_ipi_demux(void);
189extern irqreturn_t smp_ipi_demux_relaxed(void);
190
191void smp_init_pSeries(void);
192void smp_init_cell(void);
193void smp_setup_cpu_maps(void);
194
195extern int __cpu_disable(void);
196extern void __cpu_die(unsigned int cpu);
197
198#else
199/* for UP */
200#define hard_smp_processor_id() get_hard_smp_processor_id(0)
201#define smp_setup_cpu_maps()
202#define thread_group_shares_l2 0
203#define thread_group_shares_l3 0
204static inline void inhibit_secondary_onlining(void) {}
205static inline void uninhibit_secondary_onlining(void) {}
206static inline const struct cpumask *cpu_sibling_mask(int cpu)
207{
208 return cpumask_of(cpu);
209}
210
211static inline const struct cpumask *cpu_smallcore_mask(int cpu)
212{
213 return cpumask_of(cpu);
214}
215
216static inline const struct cpumask *cpu_l2_cache_mask(int cpu)
217{
218 return cpumask_of(cpu);
219}
220#endif /* CONFIG_SMP */
221
222#ifdef CONFIG_PPC64
223static inline int get_hard_smp_processor_id(int cpu)
224{
225 return paca_ptrs[cpu]->hw_cpu_id;
226}
227
228static inline void set_hard_smp_processor_id(int cpu, int phys)
229{
230 paca_ptrs[cpu]->hw_cpu_id = phys;
231}
232#else
233/* 32-bit */
234#ifndef CONFIG_SMP
235extern int boot_cpuid_phys;
236static inline int get_hard_smp_processor_id(int cpu)
237{
238 return boot_cpuid_phys;
239}
240
241static inline void set_hard_smp_processor_id(int cpu, int phys)
242{
243 boot_cpuid_phys = phys;
244}
245#endif /* !CONFIG_SMP */
246#endif /* !CONFIG_PPC64 */
247
248#if defined(CONFIG_PPC64) && (defined(CONFIG_SMP) || defined(CONFIG_KEXEC_CORE))
249extern void smp_release_cpus(void);
250#else
251static inline void smp_release_cpus(void) { }
252#endif
253
254extern int smt_enabled_at_boot;
255
256extern void smp_mpic_probe(void);
257extern void smp_mpic_setup_cpu(int cpu);
258extern int smp_generic_kick_cpu(int nr);
259extern int smp_generic_cpu_bootable(unsigned int nr);
260
261
262extern void smp_generic_give_timebase(void);
263extern void smp_generic_take_timebase(void);
264
265extern struct smp_ops_t *smp_ops;
266
267extern void arch_send_call_function_single_ipi(int cpu);
268extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
269
270/* Definitions relative to the secondary CPU spin loop
271 * and entry point. Not all of them exist on both 32 and
272 * 64-bit but defining them all here doesn't harm
273 */
274extern void generic_secondary_smp_init(void);
275extern unsigned long __secondary_hold_spinloop;
276extern unsigned long __secondary_hold_acknowledge;
277extern char __secondary_hold;
278extern unsigned int booting_thread_hwid;
279
280extern void __early_start(void);
281#endif /* __ASSEMBLY__ */
282
283#endif /* __KERNEL__ */
284#endif /* _ASM_POWERPC_SMP_H) */