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1# SPDX-License-Identifier: GPL-2.0-only
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/rockchip,rk3399-cru.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Rockchip RK3399 Clock and Reset Unit
8
9maintainers:
10 - Xing Zheng <zhengxing@rock-chips.com>
11 - Heiko Stuebner <heiko@sntech.de>
12
13description: |
14 The RK3399 clock controller generates and supplies clock to various
15 controllers within the SoC and also implements a reset controller for SoC
16 peripherals.
17 Each clock is assigned an identifier and client nodes can use this identifier
18 to specify the clock which they consume. All available clocks are defined as
19 preprocessor macros in the dt-bindings/clock/rk3399-cru.h headers and can be
20 used in device tree sources. Similar macros exist for the reset sources in
21 these files.
22 There are several clocks that are generated outside the SoC. It is expected
23 that they are defined using standard clock bindings with following
24 clock-output-names:
25 - "xin24m" - crystal input - required,
26 - "xin32k" - rtc clock - optional,
27 - "clkin_gmac" - external GMAC clock - optional,
28 - "clkin_i2s" - external I2S clock - optional,
29 - "pclkin_cif" - external ISP clock - optional,
30 - "clk_usbphy0_480m" - output clock of the pll in the usbphy0
31 - "clk_usbphy1_480m" - output clock of the pll in the usbphy1
32
33properties:
34 compatible:
35 enum:
36 - rockchip,rk3399-pmucru
37 - rockchip,rk3399-cru
38
39 reg:
40 maxItems: 1
41
42 "#clock-cells":
43 const: 1
44
45 "#reset-cells":
46 const: 1
47
48 clocks:
49 minItems: 1
50
51 assigned-clocks:
52 minItems: 1
53 maxItems: 64
54
55 assigned-clock-parents:
56 minItems: 1
57 maxItems: 64
58
59 assigned-clock-rates:
60 minItems: 1
61 maxItems: 64
62
63 rockchip,grf:
64 $ref: /schemas/types.yaml#/definitions/phandle
65 description: >
66 phandle to the syscon managing the "general register files". It is used
67 for GRF muxes, if missing any muxes present in the GRF will not be
68 available.
69
70required:
71 - compatible
72 - reg
73 - "#clock-cells"
74 - "#reset-cells"
75
76additionalProperties: false
77
78examples:
79 - |
80 pmucru: pmu-clock-controller@ff750000 {
81 compatible = "rockchip,rk3399-pmucru";
82 reg = <0xff750000 0x1000>;
83 #clock-cells = <1>;
84 #reset-cells = <1>;
85 };
86 - |
87 cru: clock-controller@ff760000 {
88 compatible = "rockchip,rk3399-cru";
89 reg = <0xff760000 0x1000>;
90 #clock-cells = <1>;
91 #reset-cells = <1>;
92 };