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1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mux/reg-mux.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Generic register bitfield-based multiplexer controller bindings
8
9maintainers:
10 - Peter Rosin <peda@axentia.se>
11
12description: |+
13 Define register bitfields to be used to control multiplexers. The parent
14 device tree node must be a device node to provide register r/w access.
15
16properties:
17 compatible:
18 enum:
19 - reg-mux # parent device of mux controller is not syscon device
20 - mmio-mux # parent device of mux controller is syscon device
21
22 reg: true
23
24 '#mux-control-cells':
25 const: 1
26
27 mux-reg-masks:
28 description: an array of register offset and pre-shifted bitfield mask
29 pairs, each describing a single mux control.
30
31 idle-states: true
32
33required:
34 - compatible
35 - mux-reg-masks
36 - '#mux-control-cells'
37
38additionalProperties: false
39
40examples:
41 - |
42 /* The parent device of mux controller is not a syscon device. */
43
44 #include <dt-bindings/mux/mux.h>
45
46 mux-controller {
47 compatible = "reg-mux";
48 #mux-control-cells = <1>;
49 mux-reg-masks =
50 <0x54 0xf8>, /* 0: reg 0x54, bits 7:3 */
51 <0x54 0x07>; /* 1: reg 0x54, bits 2:0 */
52 };
53
54 mdio-mux-1 {
55 compatible = "mdio-mux-multiplexer";
56 mux-controls = <&mux1 0>;
57 mdio-parent-bus = <&emdio1>;
58 #address-cells = <1>;
59 #size-cells = <0>;
60
61 mdio@0 {
62 reg = <0x0>;
63 #address-cells = <1>;
64 #size-cells = <0>;
65 };
66
67 mdio@8 {
68 reg = <0x8>;
69 #address-cells = <1>;
70 #size-cells = <0>;
71 };
72 };
73
74 mdio-mux-2 {
75 compatible = "mdio-mux-multiplexer";
76 mux-controls = <&mux1 1>;
77 mdio-parent-bus = <&emdio2>;
78 #address-cells = <1>;
79 #size-cells = <0>;
80
81 mdio@0 {
82 reg = <0x0>;
83 #address-cells = <1>;
84 #size-cells = <0>;
85 };
86
87 mdio@1 {
88 reg = <0x1>;
89 #address-cells = <1>;
90 #size-cells = <0>;
91 };
92 };
93
94 - |
95 /* The parent device of mux controller is syscon device. */
96
97 #include <dt-bindings/mux/mux.h>
98 syscon@1000 {
99 compatible = "fsl,imx7d-iomuxc-gpr", "fsl,imx6q-iomuxc-gpr", "syscon", "simple-mfd";
100 reg = <0x1000 0x100>;
101
102 mux2: mux-controller {
103 compatible = "mmio-mux";
104 #mux-control-cells = <1>;
105
106 mux-reg-masks =
107 <0x3 0x30>, /* 0: reg 0x3, bits 5:4 */
108 <0x3 0x40>; /* 1: reg 0x3, bit 6 */
109 idle-states = <MUX_IDLE_AS_IS>, <0>;
110 };
111 };
112
113 video-mux {
114 compatible = "video-mux";
115 mux-controls = <&mux2 0>;
116 #address-cells = <1>;
117 #size-cells = <0>;
118
119 ports {
120 #address-cells = <1>;
121 #size-cells = <0>;
122
123 /* inputs 0..3 */
124 port@0 {
125 reg = <0>;
126 };
127 port@1 {
128 reg = <1>;
129 };
130 port@2 {
131 reg = <2>;
132 };
133 port@3 {
134 reg = <3>;
135 };
136
137 /* output */
138 port@4 {
139 reg = <4>;
140 };
141 };
142 };
143...