tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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linux
1/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
2/*
3 * Copyright (c) 2018 Mellanox Technologies. All rights reserved.
4 */
5
6#ifndef _MLX5_ESWITCH_
7#define _MLX5_ESWITCH_
8
9#include <linux/mlx5/driver.h>
10#include <net/devlink.h>
11
12#define MLX5_ESWITCH_MANAGER(mdev) MLX5_CAP_GEN(mdev, eswitch_manager)
13
14enum {
15 MLX5_ESWITCH_NONE,
16 MLX5_ESWITCH_LEGACY,
17 MLX5_ESWITCH_OFFLOADS
18};
19
20enum {
21 REP_ETH,
22 REP_IB,
23 NUM_REP_TYPES,
24};
25
26enum {
27 REP_UNREGISTERED,
28 REP_REGISTERED,
29 REP_LOADED,
30};
31
32struct mlx5_eswitch_rep;
33struct mlx5_eswitch_rep_ops {
34 int (*load)(struct mlx5_core_dev *dev, struct mlx5_eswitch_rep *rep);
35 void (*unload)(struct mlx5_eswitch_rep *rep);
36 void *(*get_proto_dev)(struct mlx5_eswitch_rep *rep);
37};
38
39struct mlx5_eswitch_rep_data {
40 void *priv;
41 atomic_t state;
42};
43
44struct mlx5_eswitch_rep {
45 struct mlx5_eswitch_rep_data rep_data[NUM_REP_TYPES];
46 u16 vport;
47 u16 vlan;
48 /* Only IB rep is using vport_index */
49 u16 vport_index;
50 u32 vlan_refcount;
51 struct mlx5_eswitch *esw;
52};
53
54void mlx5_eswitch_register_vport_reps(struct mlx5_eswitch *esw,
55 const struct mlx5_eswitch_rep_ops *ops,
56 u8 rep_type);
57void mlx5_eswitch_unregister_vport_reps(struct mlx5_eswitch *esw, u8 rep_type);
58void *mlx5_eswitch_get_proto_dev(struct mlx5_eswitch *esw,
59 u16 vport_num,
60 u8 rep_type);
61struct mlx5_eswitch_rep *mlx5_eswitch_vport_rep(struct mlx5_eswitch *esw,
62 u16 vport_num);
63void *mlx5_eswitch_uplink_get_proto_dev(struct mlx5_eswitch *esw, u8 rep_type);
64struct mlx5_flow_handle *
65mlx5_eswitch_add_send_to_vport_rule(struct mlx5_eswitch *on_esw,
66 struct mlx5_eswitch_rep *rep, u32 sqn);
67
68#ifdef CONFIG_MLX5_ESWITCH
69enum devlink_eswitch_encap_mode
70mlx5_eswitch_get_encap_mode(const struct mlx5_core_dev *dev);
71
72bool mlx5_eswitch_reg_c1_loopback_enabled(const struct mlx5_eswitch *esw);
73bool mlx5_eswitch_vport_match_metadata_enabled(const struct mlx5_eswitch *esw);
74
75/* Reg C0 usage:
76 * Reg C0 = < ESW_PFNUM_BITS(4) | ESW_VPORT BITS(12) | ESW_REG_C0_OBJ(16) >
77 *
78 * Highest 4 bits of the reg c0 is the PF_NUM (range 0-15), 12 bits of
79 * unique non-zero vport id (range 1-4095). The rest (lowest 16 bits) is left
80 * for user data objects managed by a common mapping context.
81 * PFNUM + VPORT comprise the SOURCE_PORT matching.
82 */
83#define ESW_VPORT_BITS 12
84#define ESW_PFNUM_BITS 4
85#define ESW_SOURCE_PORT_METADATA_BITS (ESW_PFNUM_BITS + ESW_VPORT_BITS)
86#define ESW_SOURCE_PORT_METADATA_OFFSET (32 - ESW_SOURCE_PORT_METADATA_BITS)
87#define ESW_REG_C0_USER_DATA_METADATA_BITS (32 - ESW_SOURCE_PORT_METADATA_BITS)
88#define ESW_REG_C0_USER_DATA_METADATA_MASK GENMASK(ESW_REG_C0_USER_DATA_METADATA_BITS - 1, 0)
89
90static inline u32 mlx5_eswitch_get_vport_metadata_mask(void)
91{
92 return GENMASK(31, 32 - ESW_SOURCE_PORT_METADATA_BITS);
93}
94
95u32 mlx5_eswitch_get_vport_metadata_for_match(struct mlx5_eswitch *esw,
96 u16 vport_num);
97u32 mlx5_eswitch_get_vport_metadata_for_set(struct mlx5_eswitch *esw,
98 u16 vport_num);
99
100/* Reg C1 usage:
101 * Reg C1 = < Reserved(1) | ESW_TUN_ID(12) | ESW_TUN_OPTS(11) | ESW_ZONE_ID(8) >
102 *
103 * Highest bit is reserved for other offloads as marker bit, next 12 bits of reg c1
104 * is the encapsulation tunnel id, next 11 bits is encapsulation tunnel options,
105 * and the lowest 8 bits are used for zone id.
106 *
107 * Zone id is used to restore CT flow when packet misses on chain.
108 *
109 * Tunnel id and options are used together to restore the tunnel info metadata
110 * on miss and to support inner header rewrite by means of implicit chain 0
111 * flows.
112 */
113#define ESW_RESERVED_BITS 1
114#define ESW_ZONE_ID_BITS 8
115#define ESW_TUN_OPTS_BITS 11
116#define ESW_TUN_ID_BITS 12
117#define ESW_TUN_OPTS_OFFSET ESW_ZONE_ID_BITS
118#define ESW_TUN_OFFSET ESW_TUN_OPTS_OFFSET
119#define ESW_ZONE_ID_MASK GENMASK(ESW_ZONE_ID_BITS - 1, 0)
120#define ESW_TUN_OPTS_MASK GENMASK(31 - ESW_TUN_ID_BITS - ESW_RESERVED_BITS, ESW_TUN_OPTS_OFFSET)
121#define ESW_TUN_MASK GENMASK(31 - ESW_RESERVED_BITS, ESW_TUN_OFFSET)
122#define ESW_TUN_ID_SLOW_TABLE_GOTO_VPORT 0 /* 0 is not a valid tunnel id */
123/* 0x7FF is a reserved mapping */
124#define ESW_TUN_OPTS_SLOW_TABLE_GOTO_VPORT GENMASK(ESW_TUN_OPTS_BITS - 1, 0)
125#define ESW_TUN_SLOW_TABLE_GOTO_VPORT ((ESW_TUN_ID_SLOW_TABLE_GOTO_VPORT << ESW_TUN_OPTS_BITS) | \
126 ESW_TUN_OPTS_SLOW_TABLE_GOTO_VPORT)
127#define ESW_TUN_SLOW_TABLE_GOTO_VPORT_MARK ESW_TUN_OPTS_MASK
128
129u8 mlx5_eswitch_mode(struct mlx5_core_dev *dev);
130u16 mlx5_eswitch_get_total_vports(const struct mlx5_core_dev *dev);
131
132#else /* CONFIG_MLX5_ESWITCH */
133
134static inline u8 mlx5_eswitch_mode(struct mlx5_core_dev *dev)
135{
136 return MLX5_ESWITCH_NONE;
137}
138
139static inline enum devlink_eswitch_encap_mode
140mlx5_eswitch_get_encap_mode(const struct mlx5_core_dev *dev)
141{
142 return DEVLINK_ESWITCH_ENCAP_MODE_NONE;
143}
144
145static inline bool
146mlx5_eswitch_reg_c1_loopback_enabled(const struct mlx5_eswitch *esw)
147{
148 return false;
149};
150
151static inline bool
152mlx5_eswitch_vport_match_metadata_enabled(const struct mlx5_eswitch *esw)
153{
154 return false;
155};
156
157static inline u32
158mlx5_eswitch_get_vport_metadata_for_match(struct mlx5_eswitch *esw, u16 vport_num)
159{
160 return 0;
161};
162
163static inline u32
164mlx5_eswitch_get_vport_metadata_mask(void)
165{
166 return 0;
167}
168
169static inline u16 mlx5_eswitch_get_total_vports(const struct mlx5_core_dev *dev)
170{
171 return 0;
172}
173
174#endif /* CONFIG_MLX5_ESWITCH */
175
176static inline bool is_mdev_switchdev_mode(struct mlx5_core_dev *dev)
177{
178 return mlx5_eswitch_mode(dev) == MLX5_ESWITCH_OFFLOADS;
179}
180
181#endif