tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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linux
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/interconnect/qcom,osm-l3.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Operating State Manager (OSM) L3 Interconnect Provider
8
9maintainers:
10 - Sibi Sankar <sibis@codeaurora.org>
11
12description:
13 L3 cache bandwidth requirements on Qualcomm SoCs is serviced by the OSM.
14 The OSM L3 interconnect provider aggregates the L3 bandwidth requests
15 from CPU/GPU and relays it to the OSM.
16
17properties:
18 compatible:
19 enum:
20 - qcom,sc7180-osm-l3
21 - qcom,sdm845-osm-l3
22 - qcom,sm8150-osm-l3
23 - qcom,sm8250-epss-l3
24
25 reg:
26 maxItems: 1
27
28 clocks:
29 items:
30 - description: xo clock
31 - description: alternate clock
32
33 clock-names:
34 items:
35 - const: xo
36 - const: alternate
37
38 '#interconnect-cells':
39 const: 1
40
41required:
42 - compatible
43 - reg
44 - clocks
45 - clock-names
46 - '#interconnect-cells'
47
48additionalProperties: false
49
50examples:
51 - |
52
53 #define GPLL0 165
54 #define RPMH_CXO_CLK 0
55
56 osm_l3: interconnect@17d41000 {
57 compatible = "qcom,sdm845-osm-l3";
58 reg = <0x17d41000 0x1400>;
59
60 clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
61 clock-names = "xo", "alternate";
62
63 #interconnect-cells = <1>;
64 };