tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
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linux
1/* SPDX-License-Identifier: GPL-2.0 */
2/* Microchip switch driver common header
3 *
4 * Copyright (C) 2017-2019 Microchip Technology Inc.
5 */
6
7#ifndef __KSZ_COMMON_H
8#define __KSZ_COMMON_H
9
10#include <linux/etherdevice.h>
11#include <linux/kernel.h>
12#include <linux/mutex.h>
13#include <linux/phy.h>
14#include <linux/regmap.h>
15#include <net/dsa.h>
16
17struct vlan_table {
18 u32 table[3];
19};
20
21struct ksz_port_mib {
22 struct mutex cnt_mutex; /* structure access */
23 u8 cnt_ptr;
24 u64 *counters;
25};
26
27struct ksz_port {
28 u16 member;
29 u16 vid_member;
30 int stp_state;
31 struct phy_device phydev;
32
33 u32 on:1; /* port is not disabled by hardware */
34 u32 phy:1; /* port has a PHY */
35 u32 fiber:1; /* port is fiber */
36 u32 sgmii:1; /* port is SGMII */
37 u32 force:1;
38 u32 read:1; /* read MIB counters in background */
39 u32 freeze:1; /* MIB counter freeze is enabled */
40
41 struct ksz_port_mib mib;
42 phy_interface_t interface;
43};
44
45struct ksz_device {
46 struct dsa_switch *ds;
47 struct ksz_platform_data *pdata;
48 const char *name;
49
50 struct mutex dev_mutex; /* device access */
51 struct mutex regmap_mutex; /* regmap access */
52 struct mutex alu_mutex; /* ALU access */
53 struct mutex vlan_mutex; /* vlan access */
54 const struct ksz_dev_ops *dev_ops;
55
56 struct device *dev;
57 struct regmap *regmap[3];
58
59 void *priv;
60
61 struct gpio_desc *reset_gpio; /* Optional reset GPIO */
62
63 /* chip specific data */
64 u32 chip_id;
65 int num_vlans;
66 int num_alus;
67 int num_statics;
68 int cpu_port; /* port connected to CPU */
69 int cpu_ports; /* port bitmap can be cpu port */
70 int phy_port_cnt;
71 int port_cnt;
72 u8 reg_mib_cnt;
73 int mib_cnt;
74 const struct mib_names *mib_names;
75 phy_interface_t compat_interface;
76 u32 regs_size;
77 bool phy_errata_9477;
78 bool synclko_125;
79
80 struct vlan_table *vlan_cache;
81
82 struct ksz_port *ports;
83 struct delayed_work mib_read;
84 unsigned long mib_read_interval;
85 u16 br_member;
86 u16 member;
87 u16 mirror_rx;
88 u16 mirror_tx;
89 u32 features; /* chip specific features */
90 u32 overrides; /* chip functions set by user */
91 u16 host_mask;
92 u16 port_mask;
93};
94
95struct alu_struct {
96 /* entry 1 */
97 u8 is_static:1;
98 u8 is_src_filter:1;
99 u8 is_dst_filter:1;
100 u8 prio_age:3;
101 u32 _reserv_0_1:23;
102 u8 mstp:3;
103 /* entry 2 */
104 u8 is_override:1;
105 u8 is_use_fid:1;
106 u32 _reserv_1_1:23;
107 u8 port_forward:7;
108 /* entry 3 & 4*/
109 u32 _reserv_2_1:9;
110 u8 fid:7;
111 u8 mac[ETH_ALEN];
112};
113
114struct ksz_dev_ops {
115 u32 (*get_port_addr)(int port, int offset);
116 void (*cfg_port_member)(struct ksz_device *dev, int port, u8 member);
117 void (*flush_dyn_mac_table)(struct ksz_device *dev, int port);
118 void (*port_cleanup)(struct ksz_device *dev, int port);
119 void (*port_setup)(struct ksz_device *dev, int port, bool cpu_port);
120 void (*r_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 *val);
121 void (*w_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 val);
122 int (*r_dyn_mac_table)(struct ksz_device *dev, u16 addr, u8 *mac_addr,
123 u8 *fid, u8 *src_port, u8 *timestamp,
124 u16 *entries);
125 int (*r_sta_mac_table)(struct ksz_device *dev, u16 addr,
126 struct alu_struct *alu);
127 void (*w_sta_mac_table)(struct ksz_device *dev, u16 addr,
128 struct alu_struct *alu);
129 void (*r_mib_cnt)(struct ksz_device *dev, int port, u16 addr,
130 u64 *cnt);
131 void (*r_mib_pkt)(struct ksz_device *dev, int port, u16 addr,
132 u64 *dropped, u64 *cnt);
133 void (*freeze_mib)(struct ksz_device *dev, int port, bool freeze);
134 void (*port_init_cnt)(struct ksz_device *dev, int port);
135 int (*shutdown)(struct ksz_device *dev);
136 int (*detect)(struct ksz_device *dev);
137 int (*init)(struct ksz_device *dev);
138 void (*exit)(struct ksz_device *dev);
139};
140
141struct ksz_device *ksz_switch_alloc(struct device *base, void *priv);
142int ksz_switch_register(struct ksz_device *dev,
143 const struct ksz_dev_ops *ops);
144void ksz_switch_remove(struct ksz_device *dev);
145
146int ksz8_switch_register(struct ksz_device *dev);
147int ksz9477_switch_register(struct ksz_device *dev);
148
149void ksz_update_port_member(struct ksz_device *dev, int port);
150void ksz_init_mib_timer(struct ksz_device *dev);
151
152/* Common DSA access functions */
153
154int ksz_phy_read16(struct dsa_switch *ds, int addr, int reg);
155int ksz_phy_write16(struct dsa_switch *ds, int addr, int reg, u16 val);
156void ksz_mac_link_down(struct dsa_switch *ds, int port, unsigned int mode,
157 phy_interface_t interface);
158int ksz_sset_count(struct dsa_switch *ds, int port, int sset);
159void ksz_get_ethtool_stats(struct dsa_switch *ds, int port, uint64_t *buf);
160int ksz_port_bridge_join(struct dsa_switch *ds, int port,
161 struct net_device *br);
162void ksz_port_bridge_leave(struct dsa_switch *ds, int port,
163 struct net_device *br);
164void ksz_port_fast_age(struct dsa_switch *ds, int port);
165int ksz_port_fdb_dump(struct dsa_switch *ds, int port, dsa_fdb_dump_cb_t *cb,
166 void *data);
167int ksz_port_mdb_add(struct dsa_switch *ds, int port,
168 const struct switchdev_obj_port_mdb *mdb);
169int ksz_port_mdb_del(struct dsa_switch *ds, int port,
170 const struct switchdev_obj_port_mdb *mdb);
171int ksz_enable_port(struct dsa_switch *ds, int port, struct phy_device *phy);
172
173/* Common register access functions */
174
175static inline int ksz_read8(struct ksz_device *dev, u32 reg, u8 *val)
176{
177 unsigned int value;
178 int ret = regmap_read(dev->regmap[0], reg, &value);
179
180 *val = value;
181 return ret;
182}
183
184static inline int ksz_read16(struct ksz_device *dev, u32 reg, u16 *val)
185{
186 unsigned int value;
187 int ret = regmap_read(dev->regmap[1], reg, &value);
188
189 *val = value;
190 return ret;
191}
192
193static inline int ksz_read32(struct ksz_device *dev, u32 reg, u32 *val)
194{
195 unsigned int value;
196 int ret = regmap_read(dev->regmap[2], reg, &value);
197
198 *val = value;
199 return ret;
200}
201
202static inline int ksz_read64(struct ksz_device *dev, u32 reg, u64 *val)
203{
204 u32 value[2];
205 int ret;
206
207 ret = regmap_bulk_read(dev->regmap[2], reg, value, 2);
208 if (!ret) {
209 /* Ick! ToDo: Add 64bit R/W to regmap on 32bit systems */
210 value[0] = swab32(value[0]);
211 value[1] = swab32(value[1]);
212 *val = swab64((u64)*value);
213 }
214
215 return ret;
216}
217
218static inline int ksz_write8(struct ksz_device *dev, u32 reg, u8 value)
219{
220 return regmap_write(dev->regmap[0], reg, value);
221}
222
223static inline int ksz_write16(struct ksz_device *dev, u32 reg, u16 value)
224{
225 return regmap_write(dev->regmap[1], reg, value);
226}
227
228static inline int ksz_write32(struct ksz_device *dev, u32 reg, u32 value)
229{
230 return regmap_write(dev->regmap[2], reg, value);
231}
232
233static inline int ksz_write64(struct ksz_device *dev, u32 reg, u64 value)
234{
235 u32 val[2];
236
237 /* Ick! ToDo: Add 64bit R/W to regmap on 32bit systems */
238 value = swab64(value);
239 val[0] = swab32(value & 0xffffffffULL);
240 val[1] = swab32(value >> 32ULL);
241
242 return regmap_bulk_write(dev->regmap[2], reg, val, 2);
243}
244
245static inline void ksz_pread8(struct ksz_device *dev, int port, int offset,
246 u8 *data)
247{
248 ksz_read8(dev, dev->dev_ops->get_port_addr(port, offset), data);
249}
250
251static inline void ksz_pread16(struct ksz_device *dev, int port, int offset,
252 u16 *data)
253{
254 ksz_read16(dev, dev->dev_ops->get_port_addr(port, offset), data);
255}
256
257static inline void ksz_pread32(struct ksz_device *dev, int port, int offset,
258 u32 *data)
259{
260 ksz_read32(dev, dev->dev_ops->get_port_addr(port, offset), data);
261}
262
263static inline void ksz_pwrite8(struct ksz_device *dev, int port, int offset,
264 u8 data)
265{
266 ksz_write8(dev, dev->dev_ops->get_port_addr(port, offset), data);
267}
268
269static inline void ksz_pwrite16(struct ksz_device *dev, int port, int offset,
270 u16 data)
271{
272 ksz_write16(dev, dev->dev_ops->get_port_addr(port, offset), data);
273}
274
275static inline void ksz_pwrite32(struct ksz_device *dev, int port, int offset,
276 u32 data)
277{
278 ksz_write32(dev, dev->dev_ops->get_port_addr(port, offset), data);
279}
280
281static inline void ksz_regmap_lock(void *__mtx)
282{
283 struct mutex *mtx = __mtx;
284 mutex_lock(mtx);
285}
286
287static inline void ksz_regmap_unlock(void *__mtx)
288{
289 struct mutex *mtx = __mtx;
290 mutex_unlock(mtx);
291}
292
293/* Regmap tables generation */
294#define KSZ_SPI_OP_RD 3
295#define KSZ_SPI_OP_WR 2
296
297#define swabnot_used(x) 0
298
299#define KSZ_SPI_OP_FLAG_MASK(opcode, swp, regbits, regpad) \
300 swab##swp((opcode) << ((regbits) + (regpad)))
301
302#define KSZ_REGMAP_ENTRY(width, swp, regbits, regpad, regalign) \
303 { \
304 .name = #width, \
305 .val_bits = (width), \
306 .reg_stride = 1, \
307 .reg_bits = (regbits) + (regalign), \
308 .pad_bits = (regpad), \
309 .max_register = BIT(regbits) - 1, \
310 .cache_type = REGCACHE_NONE, \
311 .read_flag_mask = \
312 KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_RD, swp, \
313 regbits, regpad), \
314 .write_flag_mask = \
315 KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_WR, swp, \
316 regbits, regpad), \
317 .lock = ksz_regmap_lock, \
318 .unlock = ksz_regmap_unlock, \
319 .reg_format_endian = REGMAP_ENDIAN_BIG, \
320 .val_format_endian = REGMAP_ENDIAN_BIG \
321 }
322
323#define KSZ_REGMAP_TABLE(ksz, swp, regbits, regpad, regalign) \
324 static const struct regmap_config ksz##_regmap_config[] = { \
325 KSZ_REGMAP_ENTRY(8, swp, (regbits), (regpad), (regalign)), \
326 KSZ_REGMAP_ENTRY(16, swp, (regbits), (regpad), (regalign)), \
327 KSZ_REGMAP_ENTRY(32, swp, (regbits), (regpad), (regalign)), \
328 }
329
330#endif