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Linux kernel mirror (for testing)
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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/can/fsl,flexcan.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title:
8 Flexcan CAN controller on Freescale's ARM and PowerPC system-on-a-chip (SOC).
9
10maintainers:
11 - Marc Kleine-Budde <mkl@pengutronix.de>
12
13allOf:
14 - $ref: can-controller.yaml#
15
16properties:
17 compatible:
18 oneOf:
19 - enum:
20 - fsl,imx8qm-flexcan
21 - fsl,imx8mp-flexcan
22 - fsl,imx6q-flexcan
23 - fsl,imx28-flexcan
24 - fsl,imx25-flexcan
25 - fsl,p1010-flexcan
26 - fsl,vf610-flexcan
27 - fsl,ls1021ar2-flexcan
28 - fsl,lx2160ar1-flexcan
29 - items:
30 - enum:
31 - fsl,imx53-flexcan
32 - fsl,imx35-flexcan
33 - const: fsl,imx25-flexcan
34 - items:
35 - enum:
36 - fsl,imx7d-flexcan
37 - fsl,imx6ul-flexcan
38 - fsl,imx6sx-flexcan
39 - const: fsl,imx6q-flexcan
40 - items:
41 - enum:
42 - fsl,ls1028ar1-flexcan
43 - const: fsl,lx2160ar1-flexcan
44
45 reg:
46 maxItems: 1
47
48 interrupts:
49 maxItems: 1
50
51 clocks:
52 maxItems: 2
53
54 clock-names:
55 items:
56 - const: ipg
57 - const: per
58
59 clock-frequency:
60 description: |
61 The oscillator frequency driving the flexcan device, filled in by the
62 boot loader. This property should only be used the used operating system
63 doesn't support the clocks and clock-names property.
64
65 xceiver-supply:
66 description: Regulator that powers the CAN transceiver.
67
68 big-endian:
69 $ref: /schemas/types.yaml#/definitions/flag
70 description: |
71 This means the registers of FlexCAN controller are big endian. This is
72 optional property.i.e. if this property is not present in device tree
73 node then controller is assumed to be little endian. If this property is
74 present then controller is assumed to be big endian.
75
76 fsl,stop-mode:
77 description: |
78 Register bits of stop mode control.
79
80 The format should be as follows:
81 <gpr req_gpr req_bit>
82 gpr is the phandle to general purpose register node.
83 req_gpr is the gpr register offset of CAN stop request.
84 req_bit is the bit offset of CAN stop request.
85 $ref: /schemas/types.yaml#/definitions/phandle-array
86 items:
87 items:
88 - description: The 'gpr' is the phandle to general purpose register node.
89 - description: The 'req_gpr' is the gpr register offset of CAN stop request.
90 maximum: 0xff
91 - description: The 'req_bit' is the bit offset of CAN stop request.
92 maximum: 0x1f
93
94 fsl,clk-source:
95 description: |
96 Select the clock source to the CAN Protocol Engine (PE). It's SoC
97 implementation dependent. Refer to RM for detailed definition. If this
98 property is not set in device tree node then driver selects clock source 1
99 by default.
100 0: clock source 0 (oscillator clock)
101 1: clock source 1 (peripheral clock)
102 $ref: /schemas/types.yaml#/definitions/uint8
103 default: 1
104 minimum: 0
105 maximum: 1
106
107 wakeup-source:
108 $ref: /schemas/types.yaml#/definitions/flag
109 description:
110 Enable CAN remote wakeup.
111
112 fsl,scu-index:
113 description: |
114 The scu index of CAN instance.
115 For SoCs with SCU support, need setup stop mode via SCU firmware, so this
116 property can help indicate a resource. It supports up to 3 CAN instances
117 now.
118 $ref: /schemas/types.yaml#/definitions/uint8
119 minimum: 0
120 maximum: 2
121
122required:
123 - compatible
124 - reg
125 - interrupts
126
127additionalProperties: false
128
129examples:
130 - |
131 can@1c000 {
132 compatible = "fsl,p1010-flexcan";
133 reg = <0x1c000 0x1000>;
134 interrupts = <48 0x2>;
135 interrupt-parent = <&mpic>;
136 clock-frequency = <200000000>;
137 fsl,clk-source = /bits/ 8 <0>;
138 };
139 - |
140 #include <dt-bindings/interrupt-controller/irq.h>
141
142 can@2090000 {
143 compatible = "fsl,imx6q-flexcan";
144 reg = <0x02090000 0x4000>;
145 interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
146 clocks = <&clks 1>, <&clks 2>;
147 clock-names = "ipg", "per";
148 fsl,stop-mode = <&gpr 0x34 28>;
149 fsl,scu-index = /bits/ 8 <1>;
150 };