tjh.dev
Linux kernel mirror (for testing)
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1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: "http://devicetree.org/schemas/phy/phy-cadence-torrent.yaml#"
5$schema: "http://devicetree.org/meta-schemas/core.yaml#"
6
7title: Cadence Torrent SD0801 PHY binding
8
9description:
10 This binding describes the Cadence SD0801 PHY (also known as Torrent PHY)
11 hardware included with the Cadence MHDP DisplayPort controller. Torrent
12 PHY also supports multilink multiprotocol combinations including protocols
13 such as PCIe, USB, SGMII, QSGMII etc.
14
15maintainers:
16 - Swapnil Jakhade <sjakhade@cadence.com>
17 - Yuti Amonkar <yamonkar@cadence.com>
18
19properties:
20 compatible:
21 enum:
22 - cdns,torrent-phy
23 - ti,j721e-serdes-10g
24
25 '#address-cells':
26 const: 1
27
28 '#size-cells':
29 const: 0
30
31 '#clock-cells':
32 const: 1
33
34 clocks:
35 minItems: 1
36 maxItems: 2
37 description:
38 PHY reference clock for 1 item. Must contain an entry in clock-names.
39 Optional Parent to enable output reference clock.
40
41 clock-names:
42 minItems: 1
43 items:
44 - const: refclk
45 - const: phy_en_refclk
46
47 assigned-clocks:
48 maxItems: 3
49
50 assigned-clock-parents:
51 maxItems: 3
52
53 reg:
54 minItems: 1
55 maxItems: 2
56 items:
57 - description: Offset of the Torrent PHY configuration registers.
58 - description: Offset of the DPTX PHY configuration registers.
59
60 reg-names:
61 minItems: 1
62 maxItems: 2
63 items:
64 - const: torrent_phy
65 - const: dptx_phy
66
67 resets:
68 minItems: 1
69 maxItems: 2
70 items:
71 - description: Torrent PHY reset.
72 - description: Torrent APB reset. This is optional.
73
74 reset-names:
75 minItems: 1
76 maxItems: 2
77 items:
78 - const: torrent_reset
79 - const: torrent_apb
80
81patternProperties:
82 '^phy@[0-3]$':
83 type: object
84 description:
85 Each group of PHY lanes with a single master lane should be represented as a sub-node.
86 properties:
87 reg:
88 description:
89 The master lane number. This is the lowest numbered lane in the lane group.
90 minimum: 0
91 maximum: 3
92
93 resets:
94 minItems: 1
95 maxItems: 4
96 description:
97 Contains list of resets, one per lane, to get all the link lanes out of reset.
98
99 "#phy-cells":
100 const: 0
101
102 cdns,phy-type:
103 description:
104 Specifies the type of PHY for which the group of PHY lanes is used.
105 Refer include/dt-bindings/phy/phy.h. Constants from the header should be used.
106 $ref: /schemas/types.yaml#/definitions/uint32
107 minimum: 1
108 maximum: 9
109
110 cdns,num-lanes:
111 description:
112 Number of lanes.
113 $ref: /schemas/types.yaml#/definitions/uint32
114 enum: [1, 2, 3, 4]
115 default: 4
116
117 cdns,ssc-mode:
118 description:
119 Specifies the Spread Spectrum Clocking mode used. It can be NO_SSC,
120 EXTERNAL_SSC or INTERNAL_SSC.
121 Refer include/dt-bindings/phy/phy-cadence.h for the constants to be used.
122 $ref: /schemas/types.yaml#/definitions/uint32
123 enum: [0, 1, 2]
124 default: 0
125
126 cdns,max-bit-rate:
127 description:
128 Maximum DisplayPort link bit rate to use, in Mbps
129 $ref: /schemas/types.yaml#/definitions/uint32
130 enum: [2160, 2430, 2700, 3240, 4320, 5400, 8100]
131 default: 8100
132
133 required:
134 - reg
135 - resets
136 - "#phy-cells"
137 - cdns,phy-type
138 - cdns,num-lanes
139
140 additionalProperties: false
141
142required:
143 - compatible
144 - "#address-cells"
145 - "#size-cells"
146 - clocks
147 - clock-names
148 - reg
149 - reg-names
150 - resets
151 - reset-names
152
153additionalProperties: false
154
155examples:
156 - |
157 #include <dt-bindings/phy/phy.h>
158
159 bus {
160 #address-cells = <2>;
161 #size-cells = <2>;
162
163 torrent-phy@f0fb500000 {
164 compatible = "cdns,torrent-phy";
165 reg = <0xf0 0xfb500000 0x0 0x00100000>,
166 <0xf0 0xfb030a00 0x0 0x00000040>;
167 reg-names = "torrent_phy", "dptx_phy";
168 resets = <&phyrst 0>;
169 reset-names = "torrent_reset";
170 clocks = <&ref_clk>;
171 clock-names = "refclk";
172 #address-cells = <1>;
173 #size-cells = <0>;
174 phy@0 {
175 reg = <0>;
176 resets = <&phyrst 1>, <&phyrst 2>,
177 <&phyrst 3>, <&phyrst 4>;
178 #phy-cells = <0>;
179 cdns,phy-type = <PHY_TYPE_DP>;
180 cdns,num-lanes = <4>;
181 cdns,max-bit-rate = <8100>;
182 };
183 };
184 };
185 - |
186 #include <dt-bindings/phy/phy.h>
187 #include <dt-bindings/phy/phy-cadence.h>
188
189 bus {
190 #address-cells = <2>;
191 #size-cells = <2>;
192
193 torrent-phy@f0fb500000 {
194 compatible = "cdns,torrent-phy";
195 reg = <0xf0 0xfb500000 0x0 0x00100000>;
196 reg-names = "torrent_phy";
197 resets = <&phyrst 0>, <&phyrst 1>;
198 reset-names = "torrent_reset", "torrent_apb";
199 clocks = <&ref_clk>;
200 clock-names = "refclk";
201 #address-cells = <1>;
202 #size-cells = <0>;
203 phy@0 {
204 reg = <0>;
205 resets = <&phyrst 2>, <&phyrst 3>;
206 #phy-cells = <0>;
207 cdns,phy-type = <PHY_TYPE_PCIE>;
208 cdns,num-lanes = <2>;
209 cdns,ssc-mode = <TORRENT_SERDES_NO_SSC>;
210 };
211
212 phy@2 {
213 reg = <2>;
214 resets = <&phyrst 4>;
215 #phy-cells = <0>;
216 cdns,phy-type = <PHY_TYPE_SGMII>;
217 cdns,num-lanes = <1>;
218 cdns,ssc-mode = <TORRENT_SERDES_NO_SSC>;
219 };
220 };
221 };
222...