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1/* SPDX-License-Identifier: GPL-2.0-only */
2
3#ifndef __SOC_MEDIATEK_MT8167_PM_DOMAINS_H
4#define __SOC_MEDIATEK_MT8167_PM_DOMAINS_H
5
6#include "mtk-pm-domains.h"
7#include <dt-bindings/power/mt8167-power.h>
8
9#define MT8167_PWR_STATUS_MFG_2D BIT(24)
10#define MT8167_PWR_STATUS_MFG_ASYNC BIT(25)
11
12/*
13 * MT8167 power domain support
14 */
15
16static const struct scpsys_domain_data scpsys_domain_data_mt8167[] = {
17 [MT8167_POWER_DOMAIN_MM] = {
18 .sta_mask = PWR_STATUS_DISP,
19 .ctl_offs = SPM_DIS_PWR_CON,
20 .sram_pdn_bits = GENMASK(11, 8),
21 .sram_pdn_ack_bits = GENMASK(12, 12),
22 .bp_infracfg = {
23 BUS_PROT_UPDATE_TOPAXI(MT8167_TOP_AXI_PROT_EN_MM_EMI |
24 MT8167_TOP_AXI_PROT_EN_MCU_MM),
25 },
26 .caps = MTK_SCPD_ACTIVE_WAKEUP,
27 },
28 [MT8167_POWER_DOMAIN_VDEC] = {
29 .sta_mask = PWR_STATUS_VDEC,
30 .ctl_offs = SPM_VDE_PWR_CON,
31 .sram_pdn_bits = GENMASK(8, 8),
32 .sram_pdn_ack_bits = GENMASK(12, 12),
33 .caps = MTK_SCPD_ACTIVE_WAKEUP,
34 },
35 [MT8167_POWER_DOMAIN_ISP] = {
36 .sta_mask = PWR_STATUS_ISP,
37 .ctl_offs = SPM_ISP_PWR_CON,
38 .sram_pdn_bits = GENMASK(11, 8),
39 .sram_pdn_ack_bits = GENMASK(13, 12),
40 .caps = MTK_SCPD_ACTIVE_WAKEUP,
41 },
42 [MT8167_POWER_DOMAIN_MFG_ASYNC] = {
43 .sta_mask = MT8167_PWR_STATUS_MFG_ASYNC,
44 .ctl_offs = SPM_MFG_ASYNC_PWR_CON,
45 .sram_pdn_bits = 0,
46 .sram_pdn_ack_bits = 0,
47 .bp_infracfg = {
48 BUS_PROT_UPDATE_TOPAXI(MT8167_TOP_AXI_PROT_EN_MCU_MFG |
49 MT8167_TOP_AXI_PROT_EN_MFG_EMI),
50 },
51 },
52 [MT8167_POWER_DOMAIN_MFG_2D] = {
53 .sta_mask = MT8167_PWR_STATUS_MFG_2D,
54 .ctl_offs = SPM_MFG_2D_PWR_CON,
55 .sram_pdn_bits = GENMASK(11, 8),
56 .sram_pdn_ack_bits = GENMASK(15, 12),
57 },
58 [MT8167_POWER_DOMAIN_MFG] = {
59 .sta_mask = PWR_STATUS_MFG,
60 .ctl_offs = SPM_MFG_PWR_CON,
61 .sram_pdn_bits = GENMASK(11, 8),
62 .sram_pdn_ack_bits = GENMASK(15, 12),
63 },
64 [MT8167_POWER_DOMAIN_CONN] = {
65 .sta_mask = PWR_STATUS_CONN,
66 .ctl_offs = SPM_CONN_PWR_CON,
67 .sram_pdn_bits = GENMASK(8, 8),
68 .sram_pdn_ack_bits = 0,
69 .caps = MTK_SCPD_ACTIVE_WAKEUP,
70 .bp_infracfg = {
71 BUS_PROT_UPDATE_TOPAXI(MT8167_TOP_AXI_PROT_EN_CONN_EMI |
72 MT8167_TOP_AXI_PROT_EN_CONN_MCU |
73 MT8167_TOP_AXI_PROT_EN_MCU_CONN),
74 },
75 },
76};
77
78static const struct scpsys_soc_data mt8167_scpsys_data = {
79 .domains_data = scpsys_domain_data_mt8167,
80 .num_domains = ARRAY_SIZE(scpsys_domain_data_mt8167),
81 .pwr_sta_offs = SPM_PWR_STATUS,
82 .pwr_sta2nd_offs = SPM_PWR_STATUS_2ND,
83};
84
85#endif /* __SOC_MEDIATEK_MT8167_PM_DOMAINS_H */
86