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1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Based on arch/arm/include/asm/processor.h
4 *
5 * Copyright (C) 1995-1999 Russell King
6 * Copyright (C) 2012 ARM Ltd.
7 */
8#ifndef __ASM_PROCESSOR_H
9#define __ASM_PROCESSOR_H
10
11/*
12 * On arm64 systems, unaligned accesses by the CPU are cheap, and so there is
13 * no point in shifting all network buffers by 2 bytes just to make some IP
14 * header fields appear aligned in memory, potentially sacrificing some DMA
15 * performance on some platforms.
16 */
17#define NET_IP_ALIGN 0
18
19#ifndef __ASSEMBLY__
20
21#include <linux/build_bug.h>
22#include <linux/cache.h>
23#include <linux/init.h>
24#include <linux/stddef.h>
25#include <linux/string.h>
26#include <linux/thread_info.h>
27
28#include <vdso/processor.h>
29
30#include <asm/alternative.h>
31#include <asm/cpufeature.h>
32#include <asm/hw_breakpoint.h>
33#include <asm/kasan.h>
34#include <asm/lse.h>
35#include <asm/pgtable-hwdef.h>
36#include <asm/pointer_auth.h>
37#include <asm/ptrace.h>
38#include <asm/spectre.h>
39#include <asm/types.h>
40
41/*
42 * TASK_SIZE - the maximum size of a user space task.
43 * TASK_UNMAPPED_BASE - the lower boundary of the mmap VM area.
44 */
45
46#define DEFAULT_MAP_WINDOW_64 (UL(1) << VA_BITS_MIN)
47#define TASK_SIZE_64 (UL(1) << vabits_actual)
48#define TASK_SIZE_MAX (UL(1) << VA_BITS)
49
50#ifdef CONFIG_COMPAT
51#if defined(CONFIG_ARM64_64K_PAGES) && defined(CONFIG_KUSER_HELPERS)
52/*
53 * With CONFIG_ARM64_64K_PAGES enabled, the last page is occupied
54 * by the compat vectors page.
55 */
56#define TASK_SIZE_32 UL(0x100000000)
57#else
58#define TASK_SIZE_32 (UL(0x100000000) - PAGE_SIZE)
59#endif /* CONFIG_ARM64_64K_PAGES */
60#define TASK_SIZE (test_thread_flag(TIF_32BIT) ? \
61 TASK_SIZE_32 : TASK_SIZE_64)
62#define TASK_SIZE_OF(tsk) (test_tsk_thread_flag(tsk, TIF_32BIT) ? \
63 TASK_SIZE_32 : TASK_SIZE_64)
64#define DEFAULT_MAP_WINDOW (test_thread_flag(TIF_32BIT) ? \
65 TASK_SIZE_32 : DEFAULT_MAP_WINDOW_64)
66#else
67#define TASK_SIZE TASK_SIZE_64
68#define DEFAULT_MAP_WINDOW DEFAULT_MAP_WINDOW_64
69#endif /* CONFIG_COMPAT */
70
71#ifdef CONFIG_ARM64_FORCE_52BIT
72#define STACK_TOP_MAX TASK_SIZE_64
73#define TASK_UNMAPPED_BASE (PAGE_ALIGN(TASK_SIZE / 4))
74#else
75#define STACK_TOP_MAX DEFAULT_MAP_WINDOW_64
76#define TASK_UNMAPPED_BASE (PAGE_ALIGN(DEFAULT_MAP_WINDOW / 4))
77#endif /* CONFIG_ARM64_FORCE_52BIT */
78
79#ifdef CONFIG_COMPAT
80#define AARCH32_VECTORS_BASE 0xffff0000
81#define STACK_TOP (test_thread_flag(TIF_32BIT) ? \
82 AARCH32_VECTORS_BASE : STACK_TOP_MAX)
83#else
84#define STACK_TOP STACK_TOP_MAX
85#endif /* CONFIG_COMPAT */
86
87#ifndef CONFIG_ARM64_FORCE_52BIT
88#define arch_get_mmap_end(addr) ((addr > DEFAULT_MAP_WINDOW) ? TASK_SIZE :\
89 DEFAULT_MAP_WINDOW)
90
91#define arch_get_mmap_base(addr, base) ((addr > DEFAULT_MAP_WINDOW) ? \
92 base + TASK_SIZE - DEFAULT_MAP_WINDOW :\
93 base)
94#endif /* CONFIG_ARM64_FORCE_52BIT */
95
96extern phys_addr_t arm64_dma_phys_limit;
97#define ARCH_LOW_ADDRESS_LIMIT (arm64_dma_phys_limit - 1)
98
99struct debug_info {
100#ifdef CONFIG_HAVE_HW_BREAKPOINT
101 /* Have we suspended stepping by a debugger? */
102 int suspended_step;
103 /* Allow breakpoints and watchpoints to be disabled for this thread. */
104 int bps_disabled;
105 int wps_disabled;
106 /* Hardware breakpoints pinned to this task. */
107 struct perf_event *hbp_break[ARM_MAX_BRP];
108 struct perf_event *hbp_watch[ARM_MAX_WRP];
109#endif
110};
111
112struct cpu_context {
113 unsigned long x19;
114 unsigned long x20;
115 unsigned long x21;
116 unsigned long x22;
117 unsigned long x23;
118 unsigned long x24;
119 unsigned long x25;
120 unsigned long x26;
121 unsigned long x27;
122 unsigned long x28;
123 unsigned long fp;
124 unsigned long sp;
125 unsigned long pc;
126};
127
128struct thread_struct {
129 struct cpu_context cpu_context; /* cpu context */
130
131 /*
132 * Whitelisted fields for hardened usercopy:
133 * Maintainers must ensure manually that this contains no
134 * implicit padding.
135 */
136 struct {
137 unsigned long tp_value; /* TLS register */
138 unsigned long tp2_value;
139 struct user_fpsimd_state fpsimd_state;
140 } uw;
141
142 unsigned int fpsimd_cpu;
143 void *sve_state; /* SVE registers, if any */
144 unsigned int sve_vl; /* SVE vector length */
145 unsigned int sve_vl_onexec; /* SVE vl after next exec */
146 unsigned long fault_address; /* fault info */
147 unsigned long fault_code; /* ESR_EL1 value */
148 struct debug_info debug; /* debugging */
149#ifdef CONFIG_ARM64_PTR_AUTH
150 struct ptrauth_keys_user keys_user;
151 struct ptrauth_keys_kernel keys_kernel;
152#endif
153#ifdef CONFIG_ARM64_MTE
154 u64 sctlr_tcf0;
155 u64 gcr_user_excl;
156#endif
157};
158
159static inline void arch_thread_struct_whitelist(unsigned long *offset,
160 unsigned long *size)
161{
162 /* Verify that there is no padding among the whitelisted fields: */
163 BUILD_BUG_ON(sizeof_field(struct thread_struct, uw) !=
164 sizeof_field(struct thread_struct, uw.tp_value) +
165 sizeof_field(struct thread_struct, uw.tp2_value) +
166 sizeof_field(struct thread_struct, uw.fpsimd_state));
167
168 *offset = offsetof(struct thread_struct, uw);
169 *size = sizeof_field(struct thread_struct, uw);
170}
171
172#ifdef CONFIG_COMPAT
173#define task_user_tls(t) \
174({ \
175 unsigned long *__tls; \
176 if (is_compat_thread(task_thread_info(t))) \
177 __tls = &(t)->thread.uw.tp2_value; \
178 else \
179 __tls = &(t)->thread.uw.tp_value; \
180 __tls; \
181 })
182#else
183#define task_user_tls(t) (&(t)->thread.uw.tp_value)
184#endif
185
186/* Sync TPIDR_EL0 back to thread_struct for current */
187void tls_preserve_current_state(void);
188
189#define INIT_THREAD { \
190 .fpsimd_cpu = NR_CPUS, \
191}
192
193static inline void start_thread_common(struct pt_regs *regs, unsigned long pc)
194{
195 memset(regs, 0, sizeof(*regs));
196 forget_syscall(regs);
197 regs->pc = pc;
198
199 if (system_uses_irq_prio_masking())
200 regs->pmr_save = GIC_PRIO_IRQON;
201}
202
203static inline void start_thread(struct pt_regs *regs, unsigned long pc,
204 unsigned long sp)
205{
206 start_thread_common(regs, pc);
207 regs->pstate = PSR_MODE_EL0t;
208 spectre_v4_enable_task_mitigation(current);
209 regs->sp = sp;
210}
211
212#ifdef CONFIG_COMPAT
213static inline void compat_start_thread(struct pt_regs *regs, unsigned long pc,
214 unsigned long sp)
215{
216 start_thread_common(regs, pc);
217 regs->pstate = PSR_AA32_MODE_USR;
218 if (pc & 1)
219 regs->pstate |= PSR_AA32_T_BIT;
220
221#ifdef __AARCH64EB__
222 regs->pstate |= PSR_AA32_E_BIT;
223#endif
224
225 spectre_v4_enable_task_mitigation(current);
226 regs->compat_sp = sp;
227}
228#endif
229
230static inline bool is_ttbr0_addr(unsigned long addr)
231{
232 /* entry assembly clears tags for TTBR0 addrs */
233 return addr < TASK_SIZE;
234}
235
236static inline bool is_ttbr1_addr(unsigned long addr)
237{
238 /* TTBR1 addresses may have a tag if KASAN_SW_TAGS is in use */
239 return arch_kasan_reset_tag(addr) >= PAGE_OFFSET;
240}
241
242/* Forward declaration, a strange C thing */
243struct task_struct;
244
245/* Free all resources held by a thread. */
246extern void release_thread(struct task_struct *);
247
248unsigned long get_wchan(struct task_struct *p);
249
250/* Thread switching */
251extern struct task_struct *cpu_switch_to(struct task_struct *prev,
252 struct task_struct *next);
253
254asmlinkage void arm64_preempt_schedule_irq(void);
255
256#define task_pt_regs(p) \
257 ((struct pt_regs *)(THREAD_SIZE + task_stack_page(p)) - 1)
258
259#define KSTK_EIP(tsk) ((unsigned long)task_pt_regs(tsk)->pc)
260#define KSTK_ESP(tsk) user_stack_pointer(task_pt_regs(tsk))
261
262/*
263 * Prefetching support
264 */
265#define ARCH_HAS_PREFETCH
266static inline void prefetch(const void *ptr)
267{
268 asm volatile("prfm pldl1keep, %a0\n" : : "p" (ptr));
269}
270
271#define ARCH_HAS_PREFETCHW
272static inline void prefetchw(const void *ptr)
273{
274 asm volatile("prfm pstl1keep, %a0\n" : : "p" (ptr));
275}
276
277#define ARCH_HAS_SPINLOCK_PREFETCH
278static inline void spin_lock_prefetch(const void *ptr)
279{
280 asm volatile(ARM64_LSE_ATOMIC_INSN(
281 "prfm pstl1strm, %a0",
282 "nop") : : "p" (ptr));
283}
284
285extern unsigned long __ro_after_init signal_minsigstksz; /* sigframe size */
286extern void __init minsigstksz_setup(void);
287
288/*
289 * Not at the top of the file due to a direct #include cycle between
290 * <asm/fpsimd.h> and <asm/processor.h>. Deferring this #include
291 * ensures that contents of processor.h are visible to fpsimd.h even if
292 * processor.h is included first.
293 *
294 * These prctl helpers are the only things in this file that require
295 * fpsimd.h. The core code expects them to be in this header.
296 */
297#include <asm/fpsimd.h>
298
299/* Userspace interface for PR_SVE_{SET,GET}_VL prctl()s: */
300#define SVE_SET_VL(arg) sve_set_current_vl(arg)
301#define SVE_GET_VL() sve_get_current_vl()
302
303/* PR_PAC_RESET_KEYS prctl */
304#define PAC_RESET_KEYS(tsk, arg) ptrauth_prctl_reset_keys(tsk, arg)
305
306#ifdef CONFIG_ARM64_TAGGED_ADDR_ABI
307/* PR_{SET,GET}_TAGGED_ADDR_CTRL prctl */
308long set_tagged_addr_ctrl(struct task_struct *task, unsigned long arg);
309long get_tagged_addr_ctrl(struct task_struct *task);
310#define SET_TAGGED_ADDR_CTRL(arg) set_tagged_addr_ctrl(current, arg)
311#define GET_TAGGED_ADDR_CTRL() get_tagged_addr_ctrl(current)
312#endif
313
314/*
315 * For CONFIG_GCC_PLUGIN_STACKLEAK
316 *
317 * These need to be macros because otherwise we get stuck in a nightmare
318 * of header definitions for the use of task_stack_page.
319 */
320
321#define current_top_of_stack() \
322({ \
323 struct stack_info _info; \
324 BUG_ON(!on_accessible_stack(current, current_stack_pointer, &_info)); \
325 _info.high; \
326})
327#define on_thread_stack() (on_task_stack(current, current_stack_pointer, NULL))
328
329#endif /* __ASSEMBLY__ */
330#endif /* __ASM_PROCESSOR_H */