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1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * Based on arch/arm/include/asm/memory.h 4 * 5 * Copyright (C) 2000-2002 Russell King 6 * Copyright (C) 2012 ARM Ltd. 7 * 8 * Note: this file should not be included by non-asm/.h files 9 */ 10#ifndef __ASM_MEMORY_H 11#define __ASM_MEMORY_H 12 13#include <linux/const.h> 14#include <linux/sizes.h> 15#include <asm/page-def.h> 16 17/* 18 * Size of the PCI I/O space. This must remain a power of two so that 19 * IO_SPACE_LIMIT acts as a mask for the low bits of I/O addresses. 20 */ 21#define PCI_IO_SIZE SZ_16M 22 23/* 24 * VMEMMAP_SIZE - allows the whole linear region to be covered by 25 * a struct page array 26 * 27 * If we are configured with a 52-bit kernel VA then our VMEMMAP_SIZE 28 * needs to cover the memory region from the beginning of the 52-bit 29 * PAGE_OFFSET all the way to PAGE_END for 48-bit. This allows us to 30 * keep a constant PAGE_OFFSET and "fallback" to using the higher end 31 * of the VMEMMAP where 52-bit support is not available in hardware. 32 */ 33#define VMEMMAP_SHIFT (PAGE_SHIFT - STRUCT_PAGE_MAX_SHIFT) 34#define VMEMMAP_SIZE ((_PAGE_END(VA_BITS_MIN) - PAGE_OFFSET) >> VMEMMAP_SHIFT) 35 36/* 37 * PAGE_OFFSET - the virtual address of the start of the linear map, at the 38 * start of the TTBR1 address space. 39 * PAGE_END - the end of the linear map, where all other kernel mappings begin. 40 * KIMAGE_VADDR - the virtual address of the start of the kernel image. 41 * VA_BITS - the maximum number of bits for virtual addresses. 42 */ 43#define VA_BITS (CONFIG_ARM64_VA_BITS) 44#define _PAGE_OFFSET(va) (-(UL(1) << (va))) 45#define PAGE_OFFSET (_PAGE_OFFSET(VA_BITS)) 46#define KIMAGE_VADDR (MODULES_END) 47#define BPF_JIT_REGION_START (_PAGE_END(VA_BITS_MIN)) 48#define BPF_JIT_REGION_SIZE (SZ_128M) 49#define BPF_JIT_REGION_END (BPF_JIT_REGION_START + BPF_JIT_REGION_SIZE) 50#define MODULES_END (MODULES_VADDR + MODULES_VSIZE) 51#define MODULES_VADDR (BPF_JIT_REGION_END) 52#define MODULES_VSIZE (SZ_128M) 53#define VMEMMAP_START (-(UL(1) << (VA_BITS - VMEMMAP_SHIFT))) 54#define VMEMMAP_END (VMEMMAP_START + VMEMMAP_SIZE) 55#define PCI_IO_END (VMEMMAP_START - SZ_8M) 56#define PCI_IO_START (PCI_IO_END - PCI_IO_SIZE) 57#define FIXADDR_TOP (VMEMMAP_START - SZ_32M) 58 59#if VA_BITS > 48 60#define VA_BITS_MIN (48) 61#else 62#define VA_BITS_MIN (VA_BITS) 63#endif 64 65#define _PAGE_END(va) (-(UL(1) << ((va) - 1))) 66 67#define KERNEL_START _text 68#define KERNEL_END _end 69 70/* 71 * Generic and tag-based KASAN require 1/8th and 1/16th of the kernel virtual 72 * address space for the shadow region respectively. They can bloat the stack 73 * significantly, so double the (minimum) stack size when they are in use. 74 */ 75#if defined(CONFIG_KASAN_GENERIC) || defined(CONFIG_KASAN_SW_TAGS) 76#define KASAN_SHADOW_OFFSET _AC(CONFIG_KASAN_SHADOW_OFFSET, UL) 77#define KASAN_SHADOW_END ((UL(1) << (64 - KASAN_SHADOW_SCALE_SHIFT)) \ 78 + KASAN_SHADOW_OFFSET) 79#define PAGE_END (KASAN_SHADOW_END - (1UL << (vabits_actual - KASAN_SHADOW_SCALE_SHIFT))) 80#define KASAN_THREAD_SHIFT 1 81#else 82#define KASAN_THREAD_SHIFT 0 83#define PAGE_END (_PAGE_END(VA_BITS_MIN)) 84#endif /* CONFIG_KASAN */ 85 86#define MIN_THREAD_SHIFT (14 + KASAN_THREAD_SHIFT) 87 88/* 89 * VMAP'd stacks are allocated at page granularity, so we must ensure that such 90 * stacks are a multiple of page size. 91 */ 92#if defined(CONFIG_VMAP_STACK) && (MIN_THREAD_SHIFT < PAGE_SHIFT) 93#define THREAD_SHIFT PAGE_SHIFT 94#else 95#define THREAD_SHIFT MIN_THREAD_SHIFT 96#endif 97 98#if THREAD_SHIFT >= PAGE_SHIFT 99#define THREAD_SIZE_ORDER (THREAD_SHIFT - PAGE_SHIFT) 100#endif 101 102#define THREAD_SIZE (UL(1) << THREAD_SHIFT) 103 104/* 105 * By aligning VMAP'd stacks to 2 * THREAD_SIZE, we can detect overflow by 106 * checking sp & (1 << THREAD_SHIFT), which we can do cheaply in the entry 107 * assembly. 108 */ 109#ifdef CONFIG_VMAP_STACK 110#define THREAD_ALIGN (2 * THREAD_SIZE) 111#else 112#define THREAD_ALIGN THREAD_SIZE 113#endif 114 115#define IRQ_STACK_SIZE THREAD_SIZE 116 117#define OVERFLOW_STACK_SIZE SZ_4K 118 119/* 120 * Alignment of kernel segments (e.g. .text, .data). 121 * 122 * 4 KB granule: 16 level 3 entries, with contiguous bit 123 * 16 KB granule: 4 level 3 entries, without contiguous bit 124 * 64 KB granule: 1 level 3 entry 125 */ 126#define SEGMENT_ALIGN SZ_64K 127 128/* 129 * Memory types available. 130 * 131 * IMPORTANT: MT_NORMAL must be index 0 since vm_get_page_prot() may 'or' in 132 * the MT_NORMAL_TAGGED memory type for PROT_MTE mappings. Note 133 * that protection_map[] only contains MT_NORMAL attributes. 134 */ 135#define MT_NORMAL 0 136#define MT_NORMAL_TAGGED 1 137#define MT_NORMAL_NC 2 138#define MT_NORMAL_WT 3 139#define MT_DEVICE_nGnRnE 4 140#define MT_DEVICE_nGnRE 5 141#define MT_DEVICE_GRE 6 142 143/* 144 * Memory types for Stage-2 translation 145 */ 146#define MT_S2_NORMAL 0xf 147#define MT_S2_DEVICE_nGnRE 0x1 148 149/* 150 * Memory types for Stage-2 translation when ID_AA64MMFR2_EL1.FWB is 0001 151 * Stage-2 enforces Normal-WB and Device-nGnRE 152 */ 153#define MT_S2_FWB_NORMAL 6 154#define MT_S2_FWB_DEVICE_nGnRE 1 155 156#ifdef CONFIG_ARM64_4K_PAGES 157#define IOREMAP_MAX_ORDER (PUD_SHIFT) 158#else 159#define IOREMAP_MAX_ORDER (PMD_SHIFT) 160#endif 161 162/* 163 * Open-coded (swapper_pg_dir - reserved_pg_dir) as this cannot be calculated 164 * until link time. 165 */ 166#define RESERVED_SWAPPER_OFFSET (PAGE_SIZE) 167 168/* 169 * Open-coded (swapper_pg_dir - tramp_pg_dir) as this cannot be calculated 170 * until link time. 171 */ 172#define TRAMP_SWAPPER_OFFSET (2 * PAGE_SIZE) 173 174#ifndef __ASSEMBLY__ 175 176#include <linux/bitops.h> 177#include <linux/compiler.h> 178#include <linux/mmdebug.h> 179#include <linux/types.h> 180#include <asm/bug.h> 181 182extern u64 vabits_actual; 183 184extern s64 memstart_addr; 185/* PHYS_OFFSET - the physical address of the start of memory. */ 186#define PHYS_OFFSET ({ VM_BUG_ON(memstart_addr & 1); memstart_addr; }) 187 188/* the virtual base of the kernel image */ 189extern u64 kimage_vaddr; 190 191/* the offset between the kernel virtual and physical mappings */ 192extern u64 kimage_voffset; 193 194static inline unsigned long kaslr_offset(void) 195{ 196 return kimage_vaddr - KIMAGE_VADDR; 197} 198 199/* 200 * Allow all memory at the discovery stage. We will clip it later. 201 */ 202#define MIN_MEMBLOCK_ADDR 0 203#define MAX_MEMBLOCK_ADDR U64_MAX 204 205/* 206 * PFNs are used to describe any physical page; this means 207 * PFN 0 == physical address 0. 208 * 209 * This is the PFN of the first RAM page in the kernel 210 * direct-mapped view. We assume this is the first page 211 * of RAM in the mem_map as well. 212 */ 213#define PHYS_PFN_OFFSET (PHYS_OFFSET >> PAGE_SHIFT) 214 215/* 216 * When dealing with data aborts, watchpoints, or instruction traps we may end 217 * up with a tagged userland pointer. Clear the tag to get a sane pointer to 218 * pass on to access_ok(), for instance. 219 */ 220#define __untagged_addr(addr) \ 221 ((__force __typeof__(addr))sign_extend64((__force u64)(addr), 55)) 222 223#define untagged_addr(addr) ({ \ 224 u64 __addr = (__force u64)(addr); \ 225 __addr &= __untagged_addr(__addr); \ 226 (__force __typeof__(addr))__addr; \ 227}) 228 229#if defined(CONFIG_KASAN_SW_TAGS) || defined(CONFIG_KASAN_HW_TAGS) 230#define __tag_shifted(tag) ((u64)(tag) << 56) 231#define __tag_reset(addr) __untagged_addr(addr) 232#define __tag_get(addr) (__u8)((u64)(addr) >> 56) 233#else 234#define __tag_shifted(tag) 0UL 235#define __tag_reset(addr) (addr) 236#define __tag_get(addr) 0 237#endif /* CONFIG_KASAN_SW_TAGS || CONFIG_KASAN_HW_TAGS */ 238 239static inline const void *__tag_set(const void *addr, u8 tag) 240{ 241 u64 __addr = (u64)addr & ~__tag_shifted(0xff); 242 return (const void *)(__addr | __tag_shifted(tag)); 243} 244 245#ifdef CONFIG_KASAN_HW_TAGS 246#define arch_enable_tagging() mte_enable_kernel() 247#define arch_set_tagging_report_once(state) mte_set_report_once(state) 248#define arch_init_tags(max_tag) mte_init_tags(max_tag) 249#define arch_get_random_tag() mte_get_random_tag() 250#define arch_get_mem_tag(addr) mte_get_mem_tag(addr) 251#define arch_set_mem_tag_range(addr, size, tag) \ 252 mte_set_mem_tag_range((addr), (size), (tag)) 253#endif /* CONFIG_KASAN_HW_TAGS */ 254 255/* 256 * Physical vs virtual RAM address space conversion. These are 257 * private definitions which should NOT be used outside memory.h 258 * files. Use virt_to_phys/phys_to_virt/__pa/__va instead. 259 */ 260 261 262/* 263 * Check whether an arbitrary address is within the linear map, which 264 * lives in the [PAGE_OFFSET, PAGE_END) interval at the bottom of the 265 * kernel's TTBR1 address range. 266 */ 267#define __is_lm_address(addr) (((u64)(addr) - PAGE_OFFSET) < (PAGE_END - PAGE_OFFSET)) 268 269#define __lm_to_phys(addr) (((addr) - PAGE_OFFSET) + PHYS_OFFSET) 270#define __kimg_to_phys(addr) ((addr) - kimage_voffset) 271 272#define __virt_to_phys_nodebug(x) ({ \ 273 phys_addr_t __x = (phys_addr_t)(__tag_reset(x)); \ 274 __is_lm_address(__x) ? __lm_to_phys(__x) : __kimg_to_phys(__x); \ 275}) 276 277#define __pa_symbol_nodebug(x) __kimg_to_phys((phys_addr_t)(x)) 278 279#ifdef CONFIG_DEBUG_VIRTUAL 280extern phys_addr_t __virt_to_phys(unsigned long x); 281extern phys_addr_t __phys_addr_symbol(unsigned long x); 282#else 283#define __virt_to_phys(x) __virt_to_phys_nodebug(x) 284#define __phys_addr_symbol(x) __pa_symbol_nodebug(x) 285#endif /* CONFIG_DEBUG_VIRTUAL */ 286 287#define __phys_to_virt(x) ((unsigned long)((x) - PHYS_OFFSET) | PAGE_OFFSET) 288#define __phys_to_kimg(x) ((unsigned long)((x) + kimage_voffset)) 289 290/* 291 * Convert a page to/from a physical address 292 */ 293#define page_to_phys(page) (__pfn_to_phys(page_to_pfn(page))) 294#define phys_to_page(phys) (pfn_to_page(__phys_to_pfn(phys))) 295 296/* 297 * Note: Drivers should NOT use these. They are the wrong 298 * translation for translating DMA addresses. Use the driver 299 * DMA support - see dma-mapping.h. 300 */ 301#define virt_to_phys virt_to_phys 302static inline phys_addr_t virt_to_phys(const volatile void *x) 303{ 304 return __virt_to_phys((unsigned long)(x)); 305} 306 307#define phys_to_virt phys_to_virt 308static inline void *phys_to_virt(phys_addr_t x) 309{ 310 return (void *)(__phys_to_virt(x)); 311} 312 313/* 314 * Drivers should NOT use these either. 315 */ 316#define __pa(x) __virt_to_phys((unsigned long)(x)) 317#define __pa_symbol(x) __phys_addr_symbol(RELOC_HIDE((unsigned long)(x), 0)) 318#define __pa_nodebug(x) __virt_to_phys_nodebug((unsigned long)(x)) 319#define __va(x) ((void *)__phys_to_virt((phys_addr_t)(x))) 320#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) 321#define virt_to_pfn(x) __phys_to_pfn(__virt_to_phys((unsigned long)(x))) 322#define sym_to_pfn(x) __phys_to_pfn(__pa_symbol(x)) 323 324/* 325 * virt_to_page(x) convert a _valid_ virtual address to struct page * 326 * virt_addr_valid(x) indicates whether a virtual address is valid 327 */ 328#define ARCH_PFN_OFFSET ((unsigned long)PHYS_PFN_OFFSET) 329 330#if !defined(CONFIG_SPARSEMEM_VMEMMAP) || defined(CONFIG_DEBUG_VIRTUAL) 331#define page_to_virt(x) ({ \ 332 __typeof__(x) __page = x; \ 333 void *__addr = __va(page_to_phys(__page)); \ 334 (void *)__tag_set((const void *)__addr, page_kasan_tag(__page));\ 335}) 336#define virt_to_page(x) pfn_to_page(virt_to_pfn(x)) 337#else 338#define page_to_virt(x) ({ \ 339 __typeof__(x) __page = x; \ 340 u64 __idx = ((u64)__page - VMEMMAP_START) / sizeof(struct page);\ 341 u64 __addr = PAGE_OFFSET + (__idx * PAGE_SIZE); \ 342 (void *)__tag_set((const void *)__addr, page_kasan_tag(__page));\ 343}) 344 345#define virt_to_page(x) ({ \ 346 u64 __idx = (__tag_reset((u64)x) - PAGE_OFFSET) / PAGE_SIZE; \ 347 u64 __addr = VMEMMAP_START + (__idx * sizeof(struct page)); \ 348 (struct page *)__addr; \ 349}) 350#endif /* !CONFIG_SPARSEMEM_VMEMMAP || CONFIG_DEBUG_VIRTUAL */ 351 352#define virt_addr_valid(addr) ({ \ 353 __typeof__(addr) __addr = __tag_reset(addr); \ 354 __is_lm_address(__addr) && pfn_valid(virt_to_pfn(__addr)); \ 355}) 356 357void dump_mem_limit(void); 358#endif /* !ASSEMBLY */ 359 360/* 361 * Given that the GIC architecture permits ITS implementations that can only be 362 * configured with a LPI table address once, GICv3 systems with many CPUs may 363 * end up reserving a lot of different regions after a kexec for their LPI 364 * tables (one per CPU), as we are forced to reuse the same memory after kexec 365 * (and thus reserve it persistently with EFI beforehand) 366 */ 367#if defined(CONFIG_EFI) && defined(CONFIG_ARM_GIC_V3_ITS) 368# define INIT_MEMBLOCK_RESERVED_REGIONS (INIT_MEMBLOCK_REGIONS + NR_CPUS + 1) 369#endif 370 371#include <asm-generic/memory_model.h> 372 373#endif /* __ASM_MEMORY_H */