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1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Host communication command constants for ChromeOS EC
4 *
5 * Copyright (C) 2012 Google, Inc
6 *
7 * NOTE: This file is auto-generated from ChromeOS EC Open Source code from
8 * https://chromium.googlesource.com/chromiumos/platform/ec/+/master/include/ec_commands.h
9 */
10
11/* Host communication command constants for Chrome EC */
12
13#ifndef __CROS_EC_COMMANDS_H
14#define __CROS_EC_COMMANDS_H
15
16
17
18
19#define BUILD_ASSERT(_cond)
20
21/*
22 * Current version of this protocol
23 *
24 * TODO(crosbug.com/p/11223): This is effectively useless; protocol is
25 * determined in other ways. Remove this once the kernel code no longer
26 * depends on it.
27 */
28#define EC_PROTO_VERSION 0x00000002
29
30/* Command version mask */
31#define EC_VER_MASK(version) BIT(version)
32
33/* I/O addresses for ACPI commands */
34#define EC_LPC_ADDR_ACPI_DATA 0x62
35#define EC_LPC_ADDR_ACPI_CMD 0x66
36
37/* I/O addresses for host command */
38#define EC_LPC_ADDR_HOST_DATA 0x200
39#define EC_LPC_ADDR_HOST_CMD 0x204
40
41/* I/O addresses for host command args and params */
42/* Protocol version 2 */
43#define EC_LPC_ADDR_HOST_ARGS 0x800 /* And 0x801, 0x802, 0x803 */
44#define EC_LPC_ADDR_HOST_PARAM 0x804 /* For version 2 params; size is
45 * EC_PROTO2_MAX_PARAM_SIZE
46 */
47/* Protocol version 3 */
48#define EC_LPC_ADDR_HOST_PACKET 0x800 /* Offset of version 3 packet */
49#define EC_LPC_HOST_PACKET_SIZE 0x100 /* Max size of version 3 packet */
50
51/*
52 * The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff
53 * and they tell the kernel that so we have to think of it as two parts.
54 */
55#define EC_HOST_CMD_REGION0 0x800
56#define EC_HOST_CMD_REGION1 0x880
57#define EC_HOST_CMD_REGION_SIZE 0x80
58
59/* EC command register bit functions */
60#define EC_LPC_CMDR_DATA BIT(0) /* Data ready for host to read */
61#define EC_LPC_CMDR_PENDING BIT(1) /* Write pending to EC */
62#define EC_LPC_CMDR_BUSY BIT(2) /* EC is busy processing a command */
63#define EC_LPC_CMDR_CMD BIT(3) /* Last host write was a command */
64#define EC_LPC_CMDR_ACPI_BRST BIT(4) /* Burst mode (not used) */
65#define EC_LPC_CMDR_SCI BIT(5) /* SCI event is pending */
66#define EC_LPC_CMDR_SMI BIT(6) /* SMI event is pending */
67
68#define EC_LPC_ADDR_MEMMAP 0x900
69#define EC_MEMMAP_SIZE 255 /* ACPI IO buffer max is 255 bytes */
70#define EC_MEMMAP_TEXT_MAX 8 /* Size of a string in the memory map */
71
72/* The offset address of each type of data in mapped memory. */
73#define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors 0x00 - 0x0f */
74#define EC_MEMMAP_FAN 0x10 /* Fan speeds 0x10 - 0x17 */
75#define EC_MEMMAP_TEMP_SENSOR_B 0x18 /* More temp sensors 0x18 - 0x1f */
76#define EC_MEMMAP_ID 0x20 /* 0x20 == 'E', 0x21 == 'C' */
77#define EC_MEMMAP_ID_VERSION 0x22 /* Version of data in 0x20 - 0x2f */
78#define EC_MEMMAP_THERMAL_VERSION 0x23 /* Version of data in 0x00 - 0x1f */
79#define EC_MEMMAP_BATTERY_VERSION 0x24 /* Version of data in 0x40 - 0x7f */
80#define EC_MEMMAP_SWITCHES_VERSION 0x25 /* Version of data in 0x30 - 0x33 */
81#define EC_MEMMAP_EVENTS_VERSION 0x26 /* Version of data in 0x34 - 0x3f */
82#define EC_MEMMAP_HOST_CMD_FLAGS 0x27 /* Host cmd interface flags (8 bits) */
83/* Unused 0x28 - 0x2f */
84#define EC_MEMMAP_SWITCHES 0x30 /* 8 bits */
85/* Unused 0x31 - 0x33 */
86#define EC_MEMMAP_HOST_EVENTS 0x34 /* 64 bits */
87/* Battery values are all 32 bits, unless otherwise noted. */
88#define EC_MEMMAP_BATT_VOLT 0x40 /* Battery Present Voltage */
89#define EC_MEMMAP_BATT_RATE 0x44 /* Battery Present Rate */
90#define EC_MEMMAP_BATT_CAP 0x48 /* Battery Remaining Capacity */
91#define EC_MEMMAP_BATT_FLAG 0x4c /* Battery State, see below (8-bit) */
92#define EC_MEMMAP_BATT_COUNT 0x4d /* Battery Count (8-bit) */
93#define EC_MEMMAP_BATT_INDEX 0x4e /* Current Battery Data Index (8-bit) */
94/* Unused 0x4f */
95#define EC_MEMMAP_BATT_DCAP 0x50 /* Battery Design Capacity */
96#define EC_MEMMAP_BATT_DVLT 0x54 /* Battery Design Voltage */
97#define EC_MEMMAP_BATT_LFCC 0x58 /* Battery Last Full Charge Capacity */
98#define EC_MEMMAP_BATT_CCNT 0x5c /* Battery Cycle Count */
99/* Strings are all 8 bytes (EC_MEMMAP_TEXT_MAX) */
100#define EC_MEMMAP_BATT_MFGR 0x60 /* Battery Manufacturer String */
101#define EC_MEMMAP_BATT_MODEL 0x68 /* Battery Model Number String */
102#define EC_MEMMAP_BATT_SERIAL 0x70 /* Battery Serial Number String */
103#define EC_MEMMAP_BATT_TYPE 0x78 /* Battery Type String */
104#define EC_MEMMAP_ALS 0x80 /* ALS readings in lux (2 X 16 bits) */
105/* Unused 0x84 - 0x8f */
106#define EC_MEMMAP_ACC_STATUS 0x90 /* Accelerometer status (8 bits )*/
107/* Unused 0x91 */
108#define EC_MEMMAP_ACC_DATA 0x92 /* Accelerometers data 0x92 - 0x9f */
109/* 0x92: Lid Angle if available, LID_ANGLE_UNRELIABLE otherwise */
110/* 0x94 - 0x99: 1st Accelerometer */
111/* 0x9a - 0x9f: 2nd Accelerometer */
112#define EC_MEMMAP_GYRO_DATA 0xa0 /* Gyroscope data 0xa0 - 0xa5 */
113/* Unused 0xa6 - 0xdf */
114
115/*
116 * ACPI is unable to access memory mapped data at or above this offset due to
117 * limitations of the ACPI protocol. Do not place data in the range 0xe0 - 0xfe
118 * which might be needed by ACPI.
119 */
120#define EC_MEMMAP_NO_ACPI 0xe0
121
122/* Define the format of the accelerometer mapped memory status byte. */
123#define EC_MEMMAP_ACC_STATUS_SAMPLE_ID_MASK 0x0f
124#define EC_MEMMAP_ACC_STATUS_BUSY_BIT BIT(4)
125#define EC_MEMMAP_ACC_STATUS_PRESENCE_BIT BIT(7)
126
127/* Number of temp sensors at EC_MEMMAP_TEMP_SENSOR */
128#define EC_TEMP_SENSOR_ENTRIES 16
129/*
130 * Number of temp sensors at EC_MEMMAP_TEMP_SENSOR_B.
131 *
132 * Valid only if EC_MEMMAP_THERMAL_VERSION returns >= 2.
133 */
134#define EC_TEMP_SENSOR_B_ENTRIES 8
135
136/* Special values for mapped temperature sensors */
137#define EC_TEMP_SENSOR_NOT_PRESENT 0xff
138#define EC_TEMP_SENSOR_ERROR 0xfe
139#define EC_TEMP_SENSOR_NOT_POWERED 0xfd
140#define EC_TEMP_SENSOR_NOT_CALIBRATED 0xfc
141/*
142 * The offset of temperature value stored in mapped memory. This allows
143 * reporting a temperature range of 200K to 454K = -73C to 181C.
144 */
145#define EC_TEMP_SENSOR_OFFSET 200
146
147/*
148 * Number of ALS readings at EC_MEMMAP_ALS
149 */
150#define EC_ALS_ENTRIES 2
151
152/*
153 * The default value a temperature sensor will return when it is present but
154 * has not been read this boot. This is a reasonable number to avoid
155 * triggering alarms on the host.
156 */
157#define EC_TEMP_SENSOR_DEFAULT (296 - EC_TEMP_SENSOR_OFFSET)
158
159#define EC_FAN_SPEED_ENTRIES 4 /* Number of fans at EC_MEMMAP_FAN */
160#define EC_FAN_SPEED_NOT_PRESENT 0xffff /* Entry not present */
161#define EC_FAN_SPEED_STALLED 0xfffe /* Fan stalled */
162
163/* Battery bit flags at EC_MEMMAP_BATT_FLAG. */
164#define EC_BATT_FLAG_AC_PRESENT 0x01
165#define EC_BATT_FLAG_BATT_PRESENT 0x02
166#define EC_BATT_FLAG_DISCHARGING 0x04
167#define EC_BATT_FLAG_CHARGING 0x08
168#define EC_BATT_FLAG_LEVEL_CRITICAL 0x10
169/* Set if some of the static/dynamic data is invalid (or outdated). */
170#define EC_BATT_FLAG_INVALID_DATA 0x20
171
172/* Switch flags at EC_MEMMAP_SWITCHES */
173#define EC_SWITCH_LID_OPEN 0x01
174#define EC_SWITCH_POWER_BUTTON_PRESSED 0x02
175#define EC_SWITCH_WRITE_PROTECT_DISABLED 0x04
176/* Was recovery requested via keyboard; now unused. */
177#define EC_SWITCH_IGNORE1 0x08
178/* Recovery requested via dedicated signal (from servo board) */
179#define EC_SWITCH_DEDICATED_RECOVERY 0x10
180/* Was fake developer mode switch; now unused. Remove in next refactor. */
181#define EC_SWITCH_IGNORE0 0x20
182
183/* Host command interface flags */
184/* Host command interface supports LPC args (LPC interface only) */
185#define EC_HOST_CMD_FLAG_LPC_ARGS_SUPPORTED 0x01
186/* Host command interface supports version 3 protocol */
187#define EC_HOST_CMD_FLAG_VERSION_3 0x02
188
189/* Wireless switch flags */
190#define EC_WIRELESS_SWITCH_ALL ~0x00 /* All flags */
191#define EC_WIRELESS_SWITCH_WLAN 0x01 /* WLAN radio */
192#define EC_WIRELESS_SWITCH_BLUETOOTH 0x02 /* Bluetooth radio */
193#define EC_WIRELESS_SWITCH_WWAN 0x04 /* WWAN power */
194#define EC_WIRELESS_SWITCH_WLAN_POWER 0x08 /* WLAN power */
195
196/*****************************************************************************/
197/*
198 * ACPI commands
199 *
200 * These are valid ONLY on the ACPI command/data port.
201 */
202
203/*
204 * ACPI Read Embedded Controller
205 *
206 * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*).
207 *
208 * Use the following sequence:
209 *
210 * - Write EC_CMD_ACPI_READ to EC_LPC_ADDR_ACPI_CMD
211 * - Wait for EC_LPC_CMDR_PENDING bit to clear
212 * - Write address to EC_LPC_ADDR_ACPI_DATA
213 * - Wait for EC_LPC_CMDR_DATA bit to set
214 * - Read value from EC_LPC_ADDR_ACPI_DATA
215 */
216#define EC_CMD_ACPI_READ 0x0080
217
218/*
219 * ACPI Write Embedded Controller
220 *
221 * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*).
222 *
223 * Use the following sequence:
224 *
225 * - Write EC_CMD_ACPI_WRITE to EC_LPC_ADDR_ACPI_CMD
226 * - Wait for EC_LPC_CMDR_PENDING bit to clear
227 * - Write address to EC_LPC_ADDR_ACPI_DATA
228 * - Wait for EC_LPC_CMDR_PENDING bit to clear
229 * - Write value to EC_LPC_ADDR_ACPI_DATA
230 */
231#define EC_CMD_ACPI_WRITE 0x0081
232
233/*
234 * ACPI Burst Enable Embedded Controller
235 *
236 * This enables burst mode on the EC to allow the host to issue several
237 * commands back-to-back. While in this mode, writes to mapped multi-byte
238 * data are locked out to ensure data consistency.
239 */
240#define EC_CMD_ACPI_BURST_ENABLE 0x0082
241
242/*
243 * ACPI Burst Disable Embedded Controller
244 *
245 * This disables burst mode on the EC and stops preventing EC writes to mapped
246 * multi-byte data.
247 */
248#define EC_CMD_ACPI_BURST_DISABLE 0x0083
249
250/*
251 * ACPI Query Embedded Controller
252 *
253 * This clears the lowest-order bit in the currently pending host events, and
254 * sets the result code to the 1-based index of the bit (event 0x00000001 = 1,
255 * event 0x80000000 = 32), or 0 if no event was pending.
256 */
257#define EC_CMD_ACPI_QUERY_EVENT 0x0084
258
259/* Valid addresses in ACPI memory space, for read/write commands */
260
261/* Memory space version; set to EC_ACPI_MEM_VERSION_CURRENT */
262#define EC_ACPI_MEM_VERSION 0x00
263/*
264 * Test location; writing value here updates test compliment byte to (0xff -
265 * value).
266 */
267#define EC_ACPI_MEM_TEST 0x01
268/* Test compliment; writes here are ignored. */
269#define EC_ACPI_MEM_TEST_COMPLIMENT 0x02
270
271/* Keyboard backlight brightness percent (0 - 100) */
272#define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03
273/* DPTF Target Fan Duty (0-100, 0xff for auto/none) */
274#define EC_ACPI_MEM_FAN_DUTY 0x04
275
276/*
277 * DPTF temp thresholds. Any of the EC's temp sensors can have up to two
278 * independent thresholds attached to them. The current value of the ID
279 * register determines which sensor is affected by the THRESHOLD and COMMIT
280 * registers. The THRESHOLD register uses the same EC_TEMP_SENSOR_OFFSET scheme
281 * as the memory-mapped sensors. The COMMIT register applies those settings.
282 *
283 * The spec does not mandate any way to read back the threshold settings
284 * themselves, but when a threshold is crossed the AP needs a way to determine
285 * which sensor(s) are responsible. Each reading of the ID register clears and
286 * returns one sensor ID that has crossed one of its threshold (in either
287 * direction) since the last read. A value of 0xFF means "no new thresholds
288 * have tripped". Setting or enabling the thresholds for a sensor will clear
289 * the unread event count for that sensor.
290 */
291#define EC_ACPI_MEM_TEMP_ID 0x05
292#define EC_ACPI_MEM_TEMP_THRESHOLD 0x06
293#define EC_ACPI_MEM_TEMP_COMMIT 0x07
294/*
295 * Here are the bits for the COMMIT register:
296 * bit 0 selects the threshold index for the chosen sensor (0/1)
297 * bit 1 enables/disables the selected threshold (0 = off, 1 = on)
298 * Each write to the commit register affects one threshold.
299 */
300#define EC_ACPI_MEM_TEMP_COMMIT_SELECT_MASK BIT(0)
301#define EC_ACPI_MEM_TEMP_COMMIT_ENABLE_MASK BIT(1)
302/*
303 * Example:
304 *
305 * Set the thresholds for sensor 2 to 50 C and 60 C:
306 * write 2 to [0x05] -- select temp sensor 2
307 * write 0x7b to [0x06] -- C_TO_K(50) - EC_TEMP_SENSOR_OFFSET
308 * write 0x2 to [0x07] -- enable threshold 0 with this value
309 * write 0x85 to [0x06] -- C_TO_K(60) - EC_TEMP_SENSOR_OFFSET
310 * write 0x3 to [0x07] -- enable threshold 1 with this value
311 *
312 * Disable the 60 C threshold, leaving the 50 C threshold unchanged:
313 * write 2 to [0x05] -- select temp sensor 2
314 * write 0x1 to [0x07] -- disable threshold 1
315 */
316
317/* DPTF battery charging current limit */
318#define EC_ACPI_MEM_CHARGING_LIMIT 0x08
319
320/* Charging limit is specified in 64 mA steps */
321#define EC_ACPI_MEM_CHARGING_LIMIT_STEP_MA 64
322/* Value to disable DPTF battery charging limit */
323#define EC_ACPI_MEM_CHARGING_LIMIT_DISABLED 0xff
324
325/*
326 * Report device orientation
327 * Bits Definition
328 * 3:1 Device DPTF Profile Number (DDPN)
329 * 0 = Reserved for backward compatibility (indicates no valid
330 * profile number. Host should fall back to using TBMD).
331 * 1..7 = DPTF Profile number to indicate to host which table needs
332 * to be loaded.
333 * 0 Tablet Mode Device Indicator (TBMD)
334 */
335#define EC_ACPI_MEM_DEVICE_ORIENTATION 0x09
336#define EC_ACPI_MEM_TBMD_SHIFT 0
337#define EC_ACPI_MEM_TBMD_MASK 0x1
338#define EC_ACPI_MEM_DDPN_SHIFT 1
339#define EC_ACPI_MEM_DDPN_MASK 0x7
340
341/*
342 * Report device features. Uses the same format as the host command, except:
343 *
344 * bit 0 (EC_FEATURE_LIMITED) changes meaning from "EC code has a limited set
345 * of features", which is of limited interest when the system is already
346 * interpreting ACPI bytecode, to "EC_FEATURES[0-7] is not supported". Since
347 * these are supported, it defaults to 0.
348 * This allows detecting the presence of this field since older versions of
349 * the EC codebase would simply return 0xff to that unknown address. Check
350 * FEATURES0 != 0xff (or FEATURES0[0] == 0) to make sure that the other bits
351 * are valid.
352 */
353#define EC_ACPI_MEM_DEVICE_FEATURES0 0x0a
354#define EC_ACPI_MEM_DEVICE_FEATURES1 0x0b
355#define EC_ACPI_MEM_DEVICE_FEATURES2 0x0c
356#define EC_ACPI_MEM_DEVICE_FEATURES3 0x0d
357#define EC_ACPI_MEM_DEVICE_FEATURES4 0x0e
358#define EC_ACPI_MEM_DEVICE_FEATURES5 0x0f
359#define EC_ACPI_MEM_DEVICE_FEATURES6 0x10
360#define EC_ACPI_MEM_DEVICE_FEATURES7 0x11
361
362#define EC_ACPI_MEM_BATTERY_INDEX 0x12
363
364/*
365 * USB Port Power. Each bit indicates whether the corresponding USB ports' power
366 * is enabled (1) or disabled (0).
367 * bit 0 USB port ID 0
368 * ...
369 * bit 7 USB port ID 7
370 */
371#define EC_ACPI_MEM_USB_PORT_POWER 0x13
372
373/*
374 * ACPI addresses 0x20 - 0xff map to EC_MEMMAP offset 0x00 - 0xdf. This data
375 * is read-only from the AP. Added in EC_ACPI_MEM_VERSION 2.
376 */
377#define EC_ACPI_MEM_MAPPED_BEGIN 0x20
378#define EC_ACPI_MEM_MAPPED_SIZE 0xe0
379
380/* Current version of ACPI memory address space */
381#define EC_ACPI_MEM_VERSION_CURRENT 2
382
383
384/*
385 * This header file is used in coreboot both in C and ACPI code. The ACPI code
386 * is pre-processed to handle constants but the ASL compiler is unable to
387 * handle actual C code so keep it separate.
388 */
389
390
391/*
392 * Attributes for EC request and response packets. Just defining __packed
393 * results in inefficient assembly code on ARM, if the structure is actually
394 * 32-bit aligned, as it should be for all buffers.
395 *
396 * Be very careful when adding these to existing structures. They will round
397 * up the structure size to the specified boundary.
398 *
399 * Also be very careful to make that if a structure is included in some other
400 * parent structure that the alignment will still be true given the packing of
401 * the parent structure. This is particularly important if the sub-structure
402 * will be passed as a pointer to another function, since that function will
403 * not know about the misaligment caused by the parent structure's packing.
404 *
405 * Also be very careful using __packed - particularly when nesting non-packed
406 * structures inside packed ones. In fact, DO NOT use __packed directly;
407 * always use one of these attributes.
408 *
409 * Once everything is annotated properly, the following search strings should
410 * not return ANY matches in this file other than right here:
411 *
412 * "__packed" - generates inefficient code; all sub-structs must also be packed
413 *
414 * "struct [^_]" - all structs should be annotated, except for structs that are
415 * members of other structs/unions (and their original declarations should be
416 * annotated).
417 */
418
419/*
420 * Packed structures make no assumption about alignment, so they do inefficient
421 * byte-wise reads.
422 */
423#define __ec_align1 __packed
424#define __ec_align2 __packed
425#define __ec_align4 __packed
426#define __ec_align_size1 __packed
427#define __ec_align_offset1 __packed
428#define __ec_align_offset2 __packed
429#define __ec_todo_packed __packed
430#define __ec_todo_unpacked
431
432
433/* LPC command status byte masks */
434/* EC has written a byte in the data register and host hasn't read it yet */
435#define EC_LPC_STATUS_TO_HOST 0x01
436/* Host has written a command/data byte and the EC hasn't read it yet */
437#define EC_LPC_STATUS_FROM_HOST 0x02
438/* EC is processing a command */
439#define EC_LPC_STATUS_PROCESSING 0x04
440/* Last write to EC was a command, not data */
441#define EC_LPC_STATUS_LAST_CMD 0x08
442/* EC is in burst mode */
443#define EC_LPC_STATUS_BURST_MODE 0x10
444/* SCI event is pending (requesting SCI query) */
445#define EC_LPC_STATUS_SCI_PENDING 0x20
446/* SMI event is pending (requesting SMI query) */
447#define EC_LPC_STATUS_SMI_PENDING 0x40
448/* (reserved) */
449#define EC_LPC_STATUS_RESERVED 0x80
450
451/*
452 * EC is busy. This covers both the EC processing a command, and the host has
453 * written a new command but the EC hasn't picked it up yet.
454 */
455#define EC_LPC_STATUS_BUSY_MASK \
456 (EC_LPC_STATUS_FROM_HOST | EC_LPC_STATUS_PROCESSING)
457
458/*
459 * Host command response codes (16-bit). Note that response codes should be
460 * stored in a uint16_t rather than directly in a value of this type.
461 */
462enum ec_status {
463 EC_RES_SUCCESS = 0,
464 EC_RES_INVALID_COMMAND = 1,
465 EC_RES_ERROR = 2,
466 EC_RES_INVALID_PARAM = 3,
467 EC_RES_ACCESS_DENIED = 4,
468 EC_RES_INVALID_RESPONSE = 5,
469 EC_RES_INVALID_VERSION = 6,
470 EC_RES_INVALID_CHECKSUM = 7,
471 EC_RES_IN_PROGRESS = 8, /* Accepted, command in progress */
472 EC_RES_UNAVAILABLE = 9, /* No response available */
473 EC_RES_TIMEOUT = 10, /* We got a timeout */
474 EC_RES_OVERFLOW = 11, /* Table / data overflow */
475 EC_RES_INVALID_HEADER = 12, /* Header contains invalid data */
476 EC_RES_REQUEST_TRUNCATED = 13, /* Didn't get the entire request */
477 EC_RES_RESPONSE_TOO_BIG = 14, /* Response was too big to handle */
478 EC_RES_BUS_ERROR = 15, /* Communications bus error */
479 EC_RES_BUSY = 16, /* Up but too busy. Should retry */
480 EC_RES_INVALID_HEADER_VERSION = 17, /* Header version invalid */
481 EC_RES_INVALID_HEADER_CRC = 18, /* Header CRC invalid */
482 EC_RES_INVALID_DATA_CRC = 19, /* Data CRC invalid */
483 EC_RES_DUP_UNAVAILABLE = 20, /* Can't resend response */
484};
485
486/*
487 * Host event codes. Note these are 1-based, not 0-based, because ACPI query
488 * EC command uses code 0 to mean "no event pending". We explicitly specify
489 * each value in the enum listing so they won't change if we delete/insert an
490 * item or rearrange the list (it needs to be stable across platforms, not
491 * just within a single compiled instance).
492 */
493enum host_event_code {
494 EC_HOST_EVENT_LID_CLOSED = 1,
495 EC_HOST_EVENT_LID_OPEN = 2,
496 EC_HOST_EVENT_POWER_BUTTON = 3,
497 EC_HOST_EVENT_AC_CONNECTED = 4,
498 EC_HOST_EVENT_AC_DISCONNECTED = 5,
499 EC_HOST_EVENT_BATTERY_LOW = 6,
500 EC_HOST_EVENT_BATTERY_CRITICAL = 7,
501 EC_HOST_EVENT_BATTERY = 8,
502 EC_HOST_EVENT_THERMAL_THRESHOLD = 9,
503 /* Event generated by a device attached to the EC */
504 EC_HOST_EVENT_DEVICE = 10,
505 EC_HOST_EVENT_THERMAL = 11,
506 EC_HOST_EVENT_USB_CHARGER = 12,
507 EC_HOST_EVENT_KEY_PRESSED = 13,
508 /*
509 * EC has finished initializing the host interface. The host can check
510 * for this event following sending a EC_CMD_REBOOT_EC command to
511 * determine when the EC is ready to accept subsequent commands.
512 */
513 EC_HOST_EVENT_INTERFACE_READY = 14,
514 /* Keyboard recovery combo has been pressed */
515 EC_HOST_EVENT_KEYBOARD_RECOVERY = 15,
516
517 /* Shutdown due to thermal overload */
518 EC_HOST_EVENT_THERMAL_SHUTDOWN = 16,
519 /* Shutdown due to battery level too low */
520 EC_HOST_EVENT_BATTERY_SHUTDOWN = 17,
521
522 /* Suggest that the AP throttle itself */
523 EC_HOST_EVENT_THROTTLE_START = 18,
524 /* Suggest that the AP resume normal speed */
525 EC_HOST_EVENT_THROTTLE_STOP = 19,
526
527 /* Hang detect logic detected a hang and host event timeout expired */
528 EC_HOST_EVENT_HANG_DETECT = 20,
529 /* Hang detect logic detected a hang and warm rebooted the AP */
530 EC_HOST_EVENT_HANG_REBOOT = 21,
531
532 /* PD MCU triggering host event */
533 EC_HOST_EVENT_PD_MCU = 22,
534
535 /* Battery Status flags have changed */
536 EC_HOST_EVENT_BATTERY_STATUS = 23,
537
538 /* EC encountered a panic, triggering a reset */
539 EC_HOST_EVENT_PANIC = 24,
540
541 /* Keyboard fastboot combo has been pressed */
542 EC_HOST_EVENT_KEYBOARD_FASTBOOT = 25,
543
544 /* EC RTC event occurred */
545 EC_HOST_EVENT_RTC = 26,
546
547 /* Emulate MKBP event */
548 EC_HOST_EVENT_MKBP = 27,
549
550 /* EC desires to change state of host-controlled USB mux */
551 EC_HOST_EVENT_USB_MUX = 28,
552
553 /* TABLET/LAPTOP mode or detachable base attach/detach event */
554 EC_HOST_EVENT_MODE_CHANGE = 29,
555
556 /* Keyboard recovery combo with hardware reinitialization */
557 EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT = 30,
558
559 /* WoV */
560 EC_HOST_EVENT_WOV = 31,
561
562 /*
563 * The high bit of the event mask is not used as a host event code. If
564 * it reads back as set, then the entire event mask should be
565 * considered invalid by the host. This can happen when reading the
566 * raw event status via EC_MEMMAP_HOST_EVENTS but the LPC interface is
567 * not initialized on the EC, or improperly configured on the host.
568 */
569 EC_HOST_EVENT_INVALID = 32
570};
571/* Host event mask */
572#define EC_HOST_EVENT_MASK(event_code) BIT_ULL((event_code) - 1)
573
574/**
575 * struct ec_lpc_host_args - Arguments at EC_LPC_ADDR_HOST_ARGS
576 * @flags: The host argument flags.
577 * @command_version: Command version.
578 * @data_size: The length of data.
579 * @checksum: Checksum; sum of command + flags + command_version + data_size +
580 * all params/response data bytes.
581 */
582struct ec_lpc_host_args {
583 uint8_t flags;
584 uint8_t command_version;
585 uint8_t data_size;
586 uint8_t checksum;
587} __ec_align4;
588
589/* Flags for ec_lpc_host_args.flags */
590/*
591 * Args are from host. Data area at EC_LPC_ADDR_HOST_PARAM contains command
592 * params.
593 *
594 * If EC gets a command and this flag is not set, this is an old-style command.
595 * Command version is 0 and params from host are at EC_LPC_ADDR_OLD_PARAM with
596 * unknown length. EC must respond with an old-style response (that is,
597 * without setting EC_HOST_ARGS_FLAG_TO_HOST).
598 */
599#define EC_HOST_ARGS_FLAG_FROM_HOST 0x01
600/*
601 * Args are from EC. Data area at EC_LPC_ADDR_HOST_PARAM contains response.
602 *
603 * If EC responds to a command and this flag is not set, this is an old-style
604 * response. Command version is 0 and response data from EC is at
605 * EC_LPC_ADDR_OLD_PARAM with unknown length.
606 */
607#define EC_HOST_ARGS_FLAG_TO_HOST 0x02
608
609/*****************************************************************************/
610/*
611 * Byte codes returned by EC over SPI interface.
612 *
613 * These can be used by the AP to debug the EC interface, and to determine
614 * when the EC is not in a state where it will ever get around to responding
615 * to the AP.
616 *
617 * Example of sequence of bytes read from EC for a current good transfer:
618 * 1. - - AP asserts chip select (CS#)
619 * 2. EC_SPI_OLD_READY - AP sends first byte(s) of request
620 * 3. - - EC starts handling CS# interrupt
621 * 4. EC_SPI_RECEIVING - AP sends remaining byte(s) of request
622 * 5. EC_SPI_PROCESSING - EC starts processing request; AP is clocking in
623 * bytes looking for EC_SPI_FRAME_START
624 * 6. - - EC finishes processing and sets up response
625 * 7. EC_SPI_FRAME_START - AP reads frame byte
626 * 8. (response packet) - AP reads response packet
627 * 9. EC_SPI_PAST_END - Any additional bytes read by AP
628 * 10 - - AP deasserts chip select
629 * 11 - - EC processes CS# interrupt and sets up DMA for
630 * next request
631 *
632 * If the AP is waiting for EC_SPI_FRAME_START and sees any value other than
633 * the following byte values:
634 * EC_SPI_OLD_READY
635 * EC_SPI_RX_READY
636 * EC_SPI_RECEIVING
637 * EC_SPI_PROCESSING
638 *
639 * Then the EC found an error in the request, or was not ready for the request
640 * and lost data. The AP should give up waiting for EC_SPI_FRAME_START,
641 * because the EC is unable to tell when the AP is done sending its request.
642 */
643
644/*
645 * Framing byte which precedes a response packet from the EC. After sending a
646 * request, the AP will clock in bytes until it sees the framing byte, then
647 * clock in the response packet.
648 */
649#define EC_SPI_FRAME_START 0xec
650
651/*
652 * Padding bytes which are clocked out after the end of a response packet.
653 */
654#define EC_SPI_PAST_END 0xed
655
656/*
657 * EC is ready to receive, and has ignored the byte sent by the AP. EC expects
658 * that the AP will send a valid packet header (starting with
659 * EC_COMMAND_PROTOCOL_3) in the next 32 bytes.
660 */
661#define EC_SPI_RX_READY 0xf8
662
663/*
664 * EC has started receiving the request from the AP, but hasn't started
665 * processing it yet.
666 */
667#define EC_SPI_RECEIVING 0xf9
668
669/* EC has received the entire request from the AP and is processing it. */
670#define EC_SPI_PROCESSING 0xfa
671
672/*
673 * EC received bad data from the AP, such as a packet header with an invalid
674 * length. EC will ignore all data until chip select deasserts.
675 */
676#define EC_SPI_RX_BAD_DATA 0xfb
677
678/*
679 * EC received data from the AP before it was ready. That is, the AP asserted
680 * chip select and started clocking data before the EC was ready to receive it.
681 * EC will ignore all data until chip select deasserts.
682 */
683#define EC_SPI_NOT_READY 0xfc
684
685/*
686 * EC was ready to receive a request from the AP. EC has treated the byte sent
687 * by the AP as part of a request packet, or (for old-style ECs) is processing
688 * a fully received packet but is not ready to respond yet.
689 */
690#define EC_SPI_OLD_READY 0xfd
691
692/*****************************************************************************/
693
694/*
695 * Protocol version 2 for I2C and SPI send a request this way:
696 *
697 * 0 EC_CMD_VERSION0 + (command version)
698 * 1 Command number
699 * 2 Length of params = N
700 * 3..N+2 Params, if any
701 * N+3 8-bit checksum of bytes 0..N+2
702 *
703 * The corresponding response is:
704 *
705 * 0 Result code (EC_RES_*)
706 * 1 Length of params = M
707 * 2..M+1 Params, if any
708 * M+2 8-bit checksum of bytes 0..M+1
709 */
710#define EC_PROTO2_REQUEST_HEADER_BYTES 3
711#define EC_PROTO2_REQUEST_TRAILER_BYTES 1
712#define EC_PROTO2_REQUEST_OVERHEAD (EC_PROTO2_REQUEST_HEADER_BYTES + \
713 EC_PROTO2_REQUEST_TRAILER_BYTES)
714
715#define EC_PROTO2_RESPONSE_HEADER_BYTES 2
716#define EC_PROTO2_RESPONSE_TRAILER_BYTES 1
717#define EC_PROTO2_RESPONSE_OVERHEAD (EC_PROTO2_RESPONSE_HEADER_BYTES + \
718 EC_PROTO2_RESPONSE_TRAILER_BYTES)
719
720/* Parameter length was limited by the LPC interface */
721#define EC_PROTO2_MAX_PARAM_SIZE 0xfc
722
723/* Maximum request and response packet sizes for protocol version 2 */
724#define EC_PROTO2_MAX_REQUEST_SIZE (EC_PROTO2_REQUEST_OVERHEAD + \
725 EC_PROTO2_MAX_PARAM_SIZE)
726#define EC_PROTO2_MAX_RESPONSE_SIZE (EC_PROTO2_RESPONSE_OVERHEAD + \
727 EC_PROTO2_MAX_PARAM_SIZE)
728
729/*****************************************************************************/
730
731/*
732 * Value written to legacy command port / prefix byte to indicate protocol
733 * 3+ structs are being used. Usage is bus-dependent.
734 */
735#define EC_COMMAND_PROTOCOL_3 0xda
736
737#define EC_HOST_REQUEST_VERSION 3
738
739/**
740 * struct ec_host_request - Version 3 request from host.
741 * @struct_version: Should be 3. The EC will return EC_RES_INVALID_HEADER if it
742 * receives a header with a version it doesn't know how to
743 * parse.
744 * @checksum: Checksum of request and data; sum of all bytes including checksum
745 * should total to 0.
746 * @command: Command to send (EC_CMD_...)
747 * @command_version: Command version.
748 * @reserved: Unused byte in current protocol version; set to 0.
749 * @data_len: Length of data which follows this header.
750 */
751struct ec_host_request {
752 uint8_t struct_version;
753 uint8_t checksum;
754 uint16_t command;
755 uint8_t command_version;
756 uint8_t reserved;
757 uint16_t data_len;
758} __ec_align4;
759
760#define EC_HOST_RESPONSE_VERSION 3
761
762/**
763 * struct ec_host_response - Version 3 response from EC.
764 * @struct_version: Struct version (=3).
765 * @checksum: Checksum of response and data; sum of all bytes including
766 * checksum should total to 0.
767 * @result: EC's response to the command (separate from communication failure)
768 * @data_len: Length of data which follows this header.
769 * @reserved: Unused bytes in current protocol version; set to 0.
770 */
771struct ec_host_response {
772 uint8_t struct_version;
773 uint8_t checksum;
774 uint16_t result;
775 uint16_t data_len;
776 uint16_t reserved;
777} __ec_align4;
778
779/*****************************************************************************/
780
781/*
782 * Host command protocol V4.
783 *
784 * Packets always start with a request or response header. They are followed
785 * by data_len bytes of data. If the data_crc_present flag is set, the data
786 * bytes are followed by a CRC-8 of that data, using using x^8 + x^2 + x + 1
787 * polynomial.
788 *
789 * Host algorithm when sending a request q:
790 *
791 * 101) tries_left=(some value, e.g. 3);
792 * 102) q.seq_num++
793 * 103) q.seq_dup=0
794 * 104) Calculate q.header_crc.
795 * 105) Send request q to EC.
796 * 106) Wait for response r. Go to 201 if received or 301 if timeout.
797 *
798 * 201) If r.struct_version != 4, go to 301.
799 * 202) If r.header_crc mismatches calculated CRC for r header, go to 301.
800 * 203) If r.data_crc_present and r.data_crc mismatches, go to 301.
801 * 204) If r.seq_num != q.seq_num, go to 301.
802 * 205) If r.seq_dup == q.seq_dup, return success.
803 * 207) If r.seq_dup == 1, go to 301.
804 * 208) Return error.
805 *
806 * 301) If --tries_left <= 0, return error.
807 * 302) If q.seq_dup == 1, go to 105.
808 * 303) q.seq_dup = 1
809 * 304) Go to 104.
810 *
811 * EC algorithm when receiving a request q.
812 * EC has response buffer r, error buffer e.
813 *
814 * 101) If q.struct_version != 4, set e.result = EC_RES_INVALID_HEADER_VERSION
815 * and go to 301
816 * 102) If q.header_crc mismatches calculated CRC, set e.result =
817 * EC_RES_INVALID_HEADER_CRC and go to 301
818 * 103) If q.data_crc_present, calculate data CRC. If that mismatches the CRC
819 * byte at the end of the packet, set e.result = EC_RES_INVALID_DATA_CRC
820 * and go to 301.
821 * 104) If q.seq_dup == 0, go to 201.
822 * 105) If q.seq_num != r.seq_num, go to 201.
823 * 106) If q.seq_dup == r.seq_dup, go to 205, else go to 203.
824 *
825 * 201) Process request q into response r.
826 * 202) r.seq_num = q.seq_num
827 * 203) r.seq_dup = q.seq_dup
828 * 204) Calculate r.header_crc
829 * 205) If r.data_len > 0 and data is no longer available, set e.result =
830 * EC_RES_DUP_UNAVAILABLE and go to 301.
831 * 206) Send response r.
832 *
833 * 301) e.seq_num = q.seq_num
834 * 302) e.seq_dup = q.seq_dup
835 * 303) Calculate e.header_crc.
836 * 304) Send error response e.
837 */
838
839/* Version 4 request from host */
840struct ec_host_request4 {
841 /*
842 * bits 0-3: struct_version: Structure version (=4)
843 * bit 4: is_response: Is response (=0)
844 * bits 5-6: seq_num: Sequence number
845 * bit 7: seq_dup: Sequence duplicate flag
846 */
847 uint8_t fields0;
848
849 /*
850 * bits 0-4: command_version: Command version
851 * bits 5-6: Reserved (set 0, ignore on read)
852 * bit 7: data_crc_present: Is data CRC present after data
853 */
854 uint8_t fields1;
855
856 /* Command code (EC_CMD_*) */
857 uint16_t command;
858
859 /* Length of data which follows this header (not including data CRC) */
860 uint16_t data_len;
861
862 /* Reserved (set 0, ignore on read) */
863 uint8_t reserved;
864
865 /* CRC-8 of above fields, using x^8 + x^2 + x + 1 polynomial */
866 uint8_t header_crc;
867} __ec_align4;
868
869/* Version 4 response from EC */
870struct ec_host_response4 {
871 /*
872 * bits 0-3: struct_version: Structure version (=4)
873 * bit 4: is_response: Is response (=1)
874 * bits 5-6: seq_num: Sequence number
875 * bit 7: seq_dup: Sequence duplicate flag
876 */
877 uint8_t fields0;
878
879 /*
880 * bits 0-6: Reserved (set 0, ignore on read)
881 * bit 7: data_crc_present: Is data CRC present after data
882 */
883 uint8_t fields1;
884
885 /* Result code (EC_RES_*) */
886 uint16_t result;
887
888 /* Length of data which follows this header (not including data CRC) */
889 uint16_t data_len;
890
891 /* Reserved (set 0, ignore on read) */
892 uint8_t reserved;
893
894 /* CRC-8 of above fields, using x^8 + x^2 + x + 1 polynomial */
895 uint8_t header_crc;
896} __ec_align4;
897
898/* Fields in fields0 byte */
899#define EC_PACKET4_0_STRUCT_VERSION_MASK 0x0f
900#define EC_PACKET4_0_IS_RESPONSE_MASK 0x10
901#define EC_PACKET4_0_SEQ_NUM_SHIFT 5
902#define EC_PACKET4_0_SEQ_NUM_MASK 0x60
903#define EC_PACKET4_0_SEQ_DUP_MASK 0x80
904
905/* Fields in fields1 byte */
906#define EC_PACKET4_1_COMMAND_VERSION_MASK 0x1f /* (request only) */
907#define EC_PACKET4_1_DATA_CRC_PRESENT_MASK 0x80
908
909/*****************************************************************************/
910/*
911 * Notes on commands:
912 *
913 * Each command is an 16-bit command value. Commands which take params or
914 * return response data specify structures for that data. If no structure is
915 * specified, the command does not input or output data, respectively.
916 * Parameter/response length is implicit in the structs. Some underlying
917 * communication protocols (I2C, SPI) may add length or checksum headers, but
918 * those are implementation-dependent and not defined here.
919 *
920 * All commands MUST be #defined to be 4-digit UPPER CASE hex values
921 * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work.
922 */
923
924/*****************************************************************************/
925/* General / test commands */
926
927/*
928 * Get protocol version, used to deal with non-backward compatible protocol
929 * changes.
930 */
931#define EC_CMD_PROTO_VERSION 0x0000
932
933/**
934 * struct ec_response_proto_version - Response to the proto version command.
935 * @version: The protocol version.
936 */
937struct ec_response_proto_version {
938 uint32_t version;
939} __ec_align4;
940
941/*
942 * Hello. This is a simple command to test the EC is responsive to
943 * commands.
944 */
945#define EC_CMD_HELLO 0x0001
946
947/**
948 * struct ec_params_hello - Parameters to the hello command.
949 * @in_data: Pass anything here.
950 */
951struct ec_params_hello {
952 uint32_t in_data;
953} __ec_align4;
954
955/**
956 * struct ec_response_hello - Response to the hello command.
957 * @out_data: Output will be in_data + 0x01020304.
958 */
959struct ec_response_hello {
960 uint32_t out_data;
961} __ec_align4;
962
963/* Get version number */
964#define EC_CMD_GET_VERSION 0x0002
965
966enum ec_current_image {
967 EC_IMAGE_UNKNOWN = 0,
968 EC_IMAGE_RO,
969 EC_IMAGE_RW
970};
971
972/**
973 * struct ec_response_get_version - Response to the get version command.
974 * @version_string_ro: Null-terminated RO firmware version string.
975 * @version_string_rw: Null-terminated RW firmware version string.
976 * @reserved: Unused bytes; was previously RW-B firmware version string.
977 * @current_image: One of ec_current_image.
978 */
979struct ec_response_get_version {
980 char version_string_ro[32];
981 char version_string_rw[32];
982 char reserved[32];
983 uint32_t current_image;
984} __ec_align4;
985
986/* Read test */
987#define EC_CMD_READ_TEST 0x0003
988
989/**
990 * struct ec_params_read_test - Parameters for the read test command.
991 * @offset: Starting value for read buffer.
992 * @size: Size to read in bytes.
993 */
994struct ec_params_read_test {
995 uint32_t offset;
996 uint32_t size;
997} __ec_align4;
998
999/**
1000 * struct ec_response_read_test - Response to the read test command.
1001 * @data: Data returned by the read test command.
1002 */
1003struct ec_response_read_test {
1004 uint32_t data[32];
1005} __ec_align4;
1006
1007/*
1008 * Get build information
1009 *
1010 * Response is null-terminated string.
1011 */
1012#define EC_CMD_GET_BUILD_INFO 0x0004
1013
1014/* Get chip info */
1015#define EC_CMD_GET_CHIP_INFO 0x0005
1016
1017/**
1018 * struct ec_response_get_chip_info - Response to the get chip info command.
1019 * @vendor: Null-terminated string for chip vendor.
1020 * @name: Null-terminated string for chip name.
1021 * @revision: Null-terminated string for chip mask version.
1022 */
1023struct ec_response_get_chip_info {
1024 char vendor[32];
1025 char name[32];
1026 char revision[32];
1027} __ec_align4;
1028
1029/* Get board HW version */
1030#define EC_CMD_GET_BOARD_VERSION 0x0006
1031
1032/**
1033 * struct ec_response_board_version - Response to the board version command.
1034 * @board_version: A monotonously incrementing number.
1035 */
1036struct ec_response_board_version {
1037 uint16_t board_version;
1038} __ec_align2;
1039
1040/*
1041 * Read memory-mapped data.
1042 *
1043 * This is an alternate interface to memory-mapped data for bus protocols
1044 * which don't support direct-mapped memory - I2C, SPI, etc.
1045 *
1046 * Response is params.size bytes of data.
1047 */
1048#define EC_CMD_READ_MEMMAP 0x0007
1049
1050/**
1051 * struct ec_params_read_memmap - Parameters for the read memory map command.
1052 * @offset: Offset in memmap (EC_MEMMAP_*).
1053 * @size: Size to read in bytes.
1054 */
1055struct ec_params_read_memmap {
1056 uint8_t offset;
1057 uint8_t size;
1058} __ec_align1;
1059
1060/* Read versions supported for a command */
1061#define EC_CMD_GET_CMD_VERSIONS 0x0008
1062
1063/**
1064 * struct ec_params_get_cmd_versions - Parameters for the get command versions.
1065 * @cmd: Command to check.
1066 */
1067struct ec_params_get_cmd_versions {
1068 uint8_t cmd;
1069} __ec_align1;
1070
1071/**
1072 * struct ec_params_get_cmd_versions_v1 - Parameters for the get command
1073 * versions (v1)
1074 * @cmd: Command to check.
1075 */
1076struct ec_params_get_cmd_versions_v1 {
1077 uint16_t cmd;
1078} __ec_align2;
1079
1080/**
1081 * struct ec_response_get_cmd_version - Response to the get command versions.
1082 * @version_mask: Mask of supported versions; use EC_VER_MASK() to compare with
1083 * a desired version.
1084 */
1085struct ec_response_get_cmd_versions {
1086 uint32_t version_mask;
1087} __ec_align4;
1088
1089/*
1090 * Check EC communications status (busy). This is needed on i2c/spi but not
1091 * on lpc since it has its own out-of-band busy indicator.
1092 *
1093 * lpc must read the status from the command register. Attempting this on
1094 * lpc will overwrite the args/parameter space and corrupt its data.
1095 */
1096#define EC_CMD_GET_COMMS_STATUS 0x0009
1097
1098/* Avoid using ec_status which is for return values */
1099enum ec_comms_status {
1100 EC_COMMS_STATUS_PROCESSING = BIT(0), /* Processing cmd */
1101};
1102
1103/**
1104 * struct ec_response_get_comms_status - Response to the get comms status
1105 * command.
1106 * @flags: Mask of enum ec_comms_status.
1107 */
1108struct ec_response_get_comms_status {
1109 uint32_t flags; /* Mask of enum ec_comms_status */
1110} __ec_align4;
1111
1112/* Fake a variety of responses, purely for testing purposes. */
1113#define EC_CMD_TEST_PROTOCOL 0x000A
1114
1115/* Tell the EC what to send back to us. */
1116struct ec_params_test_protocol {
1117 uint32_t ec_result;
1118 uint32_t ret_len;
1119 uint8_t buf[32];
1120} __ec_align4;
1121
1122/* Here it comes... */
1123struct ec_response_test_protocol {
1124 uint8_t buf[32];
1125} __ec_align4;
1126
1127/* Get protocol information */
1128#define EC_CMD_GET_PROTOCOL_INFO 0x000B
1129
1130/* Flags for ec_response_get_protocol_info.flags */
1131/* EC_RES_IN_PROGRESS may be returned if a command is slow */
1132#define EC_PROTOCOL_INFO_IN_PROGRESS_SUPPORTED BIT(0)
1133
1134/**
1135 * struct ec_response_get_protocol_info - Response to the get protocol info.
1136 * @protocol_versions: Bitmask of protocol versions supported (1 << n means
1137 * version n).
1138 * @max_request_packet_size: Maximum request packet size in bytes.
1139 * @max_response_packet_size: Maximum response packet size in bytes.
1140 * @flags: see EC_PROTOCOL_INFO_*
1141 */
1142struct ec_response_get_protocol_info {
1143 /* Fields which exist if at least protocol version 3 supported */
1144 uint32_t protocol_versions;
1145 uint16_t max_request_packet_size;
1146 uint16_t max_response_packet_size;
1147 uint32_t flags;
1148} __ec_align4;
1149
1150
1151/*****************************************************************************/
1152/* Get/Set miscellaneous values */
1153
1154/* The upper byte of .flags tells what to do (nothing means "get") */
1155#define EC_GSV_SET 0x80000000
1156
1157/*
1158 * The lower three bytes of .flags identifies the parameter, if that has
1159 * meaning for an individual command.
1160 */
1161#define EC_GSV_PARAM_MASK 0x00ffffff
1162
1163struct ec_params_get_set_value {
1164 uint32_t flags;
1165 uint32_t value;
1166} __ec_align4;
1167
1168struct ec_response_get_set_value {
1169 uint32_t flags;
1170 uint32_t value;
1171} __ec_align4;
1172
1173/* More than one command can use these structs to get/set parameters. */
1174#define EC_CMD_GSV_PAUSE_IN_S5 0x000C
1175
1176/*****************************************************************************/
1177/* List the features supported by the firmware */
1178#define EC_CMD_GET_FEATURES 0x000D
1179
1180/* Supported features */
1181enum ec_feature_code {
1182 /*
1183 * This image contains a limited set of features. Another image
1184 * in RW partition may support more features.
1185 */
1186 EC_FEATURE_LIMITED = 0,
1187 /*
1188 * Commands for probing/reading/writing/erasing the flash in the
1189 * EC are present.
1190 */
1191 EC_FEATURE_FLASH = 1,
1192 /*
1193 * Can control the fan speed directly.
1194 */
1195 EC_FEATURE_PWM_FAN = 2,
1196 /*
1197 * Can control the intensity of the keyboard backlight.
1198 */
1199 EC_FEATURE_PWM_KEYB = 3,
1200 /*
1201 * Support Google lightbar, introduced on Pixel.
1202 */
1203 EC_FEATURE_LIGHTBAR = 4,
1204 /* Control of LEDs */
1205 EC_FEATURE_LED = 5,
1206 /* Exposes an interface to control gyro and sensors.
1207 * The host goes through the EC to access these sensors.
1208 * In addition, the EC may provide composite sensors, like lid angle.
1209 */
1210 EC_FEATURE_MOTION_SENSE = 6,
1211 /* The keyboard is controlled by the EC */
1212 EC_FEATURE_KEYB = 7,
1213 /* The AP can use part of the EC flash as persistent storage. */
1214 EC_FEATURE_PSTORE = 8,
1215 /* The EC monitors BIOS port 80h, and can return POST codes. */
1216 EC_FEATURE_PORT80 = 9,
1217 /*
1218 * Thermal management: include TMP specific commands.
1219 * Higher level than direct fan control.
1220 */
1221 EC_FEATURE_THERMAL = 10,
1222 /* Can switch the screen backlight on/off */
1223 EC_FEATURE_BKLIGHT_SWITCH = 11,
1224 /* Can switch the wifi module on/off */
1225 EC_FEATURE_WIFI_SWITCH = 12,
1226 /* Monitor host events, through for example SMI or SCI */
1227 EC_FEATURE_HOST_EVENTS = 13,
1228 /* The EC exposes GPIO commands to control/monitor connected devices. */
1229 EC_FEATURE_GPIO = 14,
1230 /* The EC can send i2c messages to downstream devices. */
1231 EC_FEATURE_I2C = 15,
1232 /* Command to control charger are included */
1233 EC_FEATURE_CHARGER = 16,
1234 /* Simple battery support. */
1235 EC_FEATURE_BATTERY = 17,
1236 /*
1237 * Support Smart battery protocol
1238 * (Common Smart Battery System Interface Specification)
1239 */
1240 EC_FEATURE_SMART_BATTERY = 18,
1241 /* EC can detect when the host hangs. */
1242 EC_FEATURE_HANG_DETECT = 19,
1243 /* Report power information, for pit only */
1244 EC_FEATURE_PMU = 20,
1245 /* Another Cros EC device is present downstream of this one */
1246 EC_FEATURE_SUB_MCU = 21,
1247 /* Support USB Power delivery (PD) commands */
1248 EC_FEATURE_USB_PD = 22,
1249 /* Control USB multiplexer, for audio through USB port for instance. */
1250 EC_FEATURE_USB_MUX = 23,
1251 /* Motion Sensor code has an internal software FIFO */
1252 EC_FEATURE_MOTION_SENSE_FIFO = 24,
1253 /* Support temporary secure vstore */
1254 EC_FEATURE_VSTORE = 25,
1255 /* EC decides on USB-C SS mux state, muxes configured by host */
1256 EC_FEATURE_USBC_SS_MUX_VIRTUAL = 26,
1257 /* EC has RTC feature that can be controlled by host commands */
1258 EC_FEATURE_RTC = 27,
1259 /* The MCU exposes a Fingerprint sensor */
1260 EC_FEATURE_FINGERPRINT = 28,
1261 /* The MCU exposes a Touchpad */
1262 EC_FEATURE_TOUCHPAD = 29,
1263 /* The MCU has RWSIG task enabled */
1264 EC_FEATURE_RWSIG = 30,
1265 /* EC has device events support */
1266 EC_FEATURE_DEVICE_EVENT = 31,
1267 /* EC supports the unified wake masks for LPC/eSPI systems */
1268 EC_FEATURE_UNIFIED_WAKE_MASKS = 32,
1269 /* EC supports 64-bit host events */
1270 EC_FEATURE_HOST_EVENT64 = 33,
1271 /* EC runs code in RAM (not in place, a.k.a. XIP) */
1272 EC_FEATURE_EXEC_IN_RAM = 34,
1273 /* EC supports CEC commands */
1274 EC_FEATURE_CEC = 35,
1275 /* EC supports tight sensor timestamping. */
1276 EC_FEATURE_MOTION_SENSE_TIGHT_TIMESTAMPS = 36,
1277 /*
1278 * EC supports tablet mode detection aligned to Chrome and allows
1279 * setting of threshold by host command using
1280 * MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE.
1281 */
1282 EC_FEATURE_REFINED_TABLET_MODE_HYSTERESIS = 37,
1283 /* The MCU is a System Companion Processor (SCP). */
1284 EC_FEATURE_SCP = 39,
1285 /* The MCU is an Integrated Sensor Hub */
1286 EC_FEATURE_ISH = 40,
1287 /* New TCPMv2 TYPEC_ prefaced commands supported */
1288 EC_FEATURE_TYPEC_CMD = 41,
1289};
1290
1291#define EC_FEATURE_MASK_0(event_code) BIT(event_code % 32)
1292#define EC_FEATURE_MASK_1(event_code) BIT(event_code - 32)
1293
1294struct ec_response_get_features {
1295 uint32_t flags[2];
1296} __ec_align4;
1297
1298/*****************************************************************************/
1299/* Get the board's SKU ID from EC */
1300#define EC_CMD_GET_SKU_ID 0x000E
1301
1302/* Set SKU ID from AP */
1303#define EC_CMD_SET_SKU_ID 0x000F
1304
1305struct ec_sku_id_info {
1306 uint32_t sku_id;
1307} __ec_align4;
1308
1309/*****************************************************************************/
1310/* Flash commands */
1311
1312/* Get flash info */
1313#define EC_CMD_FLASH_INFO 0x0010
1314#define EC_VER_FLASH_INFO 2
1315
1316/**
1317 * struct ec_response_flash_info - Response to the flash info command.
1318 * @flash_size: Usable flash size in bytes.
1319 * @write_block_size: Write block size. Write offset and size must be a
1320 * multiple of this.
1321 * @erase_block_size: Erase block size. Erase offset and size must be a
1322 * multiple of this.
1323 * @protect_block_size: Protection block size. Protection offset and size
1324 * must be a multiple of this.
1325 *
1326 * Version 0 returns these fields.
1327 */
1328struct ec_response_flash_info {
1329 uint32_t flash_size;
1330 uint32_t write_block_size;
1331 uint32_t erase_block_size;
1332 uint32_t protect_block_size;
1333} __ec_align4;
1334
1335/*
1336 * Flags for version 1+ flash info command
1337 * EC flash erases bits to 0 instead of 1.
1338 */
1339#define EC_FLASH_INFO_ERASE_TO_0 BIT(0)
1340
1341/*
1342 * Flash must be selected for read/write/erase operations to succeed. This may
1343 * be necessary on a chip where write/erase can be corrupted by other board
1344 * activity, or where the chip needs to enable some sort of programming voltage,
1345 * or where the read/write/erase operations require cleanly suspending other
1346 * chip functionality.
1347 */
1348#define EC_FLASH_INFO_SELECT_REQUIRED BIT(1)
1349
1350/**
1351 * struct ec_response_flash_info_1 - Response to the flash info v1 command.
1352 * @flash_size: Usable flash size in bytes.
1353 * @write_block_size: Write block size. Write offset and size must be a
1354 * multiple of this.
1355 * @erase_block_size: Erase block size. Erase offset and size must be a
1356 * multiple of this.
1357 * @protect_block_size: Protection block size. Protection offset and size
1358 * must be a multiple of this.
1359 * @write_ideal_size: Ideal write size in bytes. Writes will be fastest if
1360 * size is exactly this and offset is a multiple of this.
1361 * For example, an EC may have a write buffer which can do
1362 * half-page operations if data is aligned, and a slower
1363 * word-at-a-time write mode.
1364 * @flags: Flags; see EC_FLASH_INFO_*
1365 *
1366 * Version 1 returns the same initial fields as version 0, with additional
1367 * fields following.
1368 *
1369 * gcc anonymous structs don't seem to get along with the __packed directive;
1370 * if they did we'd define the version 0 structure as a sub-structure of this
1371 * one.
1372 *
1373 * Version 2 supports flash banks of different sizes:
1374 * The caller specified the number of banks it has preallocated
1375 * (num_banks_desc)
1376 * The EC returns the number of banks describing the flash memory.
1377 * It adds banks descriptions up to num_banks_desc.
1378 */
1379struct ec_response_flash_info_1 {
1380 /* Version 0 fields; see above for description */
1381 uint32_t flash_size;
1382 uint32_t write_block_size;
1383 uint32_t erase_block_size;
1384 uint32_t protect_block_size;
1385
1386 /* Version 1 adds these fields: */
1387 uint32_t write_ideal_size;
1388 uint32_t flags;
1389} __ec_align4;
1390
1391struct ec_params_flash_info_2 {
1392 /* Number of banks to describe */
1393 uint16_t num_banks_desc;
1394 /* Reserved; set 0; ignore on read */
1395 uint8_t reserved[2];
1396} __ec_align4;
1397
1398struct ec_flash_bank {
1399 /* Number of sector is in this bank. */
1400 uint16_t count;
1401 /* Size in power of 2 of each sector (8 --> 256 bytes) */
1402 uint8_t size_exp;
1403 /* Minimal write size for the sectors in this bank */
1404 uint8_t write_size_exp;
1405 /* Erase size for the sectors in this bank */
1406 uint8_t erase_size_exp;
1407 /* Size for write protection, usually identical to erase size. */
1408 uint8_t protect_size_exp;
1409 /* Reserved; set 0; ignore on read */
1410 uint8_t reserved[2];
1411};
1412
1413struct ec_response_flash_info_2 {
1414 /* Total flash in the EC. */
1415 uint32_t flash_size;
1416 /* Flags; see EC_FLASH_INFO_* */
1417 uint32_t flags;
1418 /* Maximum size to use to send data to write to the EC. */
1419 uint32_t write_ideal_size;
1420 /* Number of banks present in the EC. */
1421 uint16_t num_banks_total;
1422 /* Number of banks described in banks array. */
1423 uint16_t num_banks_desc;
1424 struct ec_flash_bank banks[];
1425} __ec_align4;
1426
1427/*
1428 * Read flash
1429 *
1430 * Response is params.size bytes of data.
1431 */
1432#define EC_CMD_FLASH_READ 0x0011
1433
1434/**
1435 * struct ec_params_flash_read - Parameters for the flash read command.
1436 * @offset: Byte offset to read.
1437 * @size: Size to read in bytes.
1438 */
1439struct ec_params_flash_read {
1440 uint32_t offset;
1441 uint32_t size;
1442} __ec_align4;
1443
1444/* Write flash */
1445#define EC_CMD_FLASH_WRITE 0x0012
1446#define EC_VER_FLASH_WRITE 1
1447
1448/* Version 0 of the flash command supported only 64 bytes of data */
1449#define EC_FLASH_WRITE_VER0_SIZE 64
1450
1451/**
1452 * struct ec_params_flash_write - Parameters for the flash write command.
1453 * @offset: Byte offset to write.
1454 * @size: Size to write in bytes.
1455 */
1456struct ec_params_flash_write {
1457 uint32_t offset;
1458 uint32_t size;
1459 /* Followed by data to write */
1460} __ec_align4;
1461
1462/* Erase flash */
1463#define EC_CMD_FLASH_ERASE 0x0013
1464
1465/**
1466 * struct ec_params_flash_erase - Parameters for the flash erase command, v0.
1467 * @offset: Byte offset to erase.
1468 * @size: Size to erase in bytes.
1469 */
1470struct ec_params_flash_erase {
1471 uint32_t offset;
1472 uint32_t size;
1473} __ec_align4;
1474
1475/*
1476 * v1 add async erase:
1477 * subcommands can returns:
1478 * EC_RES_SUCCESS : erased (see ERASE_SECTOR_ASYNC case below).
1479 * EC_RES_INVALID_PARAM : offset/size are not aligned on a erase boundary.
1480 * EC_RES_ERROR : other errors.
1481 * EC_RES_BUSY : an existing erase operation is in progress.
1482 * EC_RES_ACCESS_DENIED: Trying to erase running image.
1483 *
1484 * When ERASE_SECTOR_ASYNC returns EC_RES_SUCCESS, the operation is just
1485 * properly queued. The user must call ERASE_GET_RESULT subcommand to get
1486 * the proper result.
1487 * When ERASE_GET_RESULT returns EC_RES_BUSY, the caller must wait and send
1488 * ERASE_GET_RESULT again to get the result of ERASE_SECTOR_ASYNC.
1489 * ERASE_GET_RESULT command may timeout on EC where flash access is not
1490 * permitted while erasing. (For instance, STM32F4).
1491 */
1492enum ec_flash_erase_cmd {
1493 FLASH_ERASE_SECTOR, /* Erase and wait for result */
1494 FLASH_ERASE_SECTOR_ASYNC, /* Erase and return immediately. */
1495 FLASH_ERASE_GET_RESULT, /* Ask for last erase result */
1496};
1497
1498/**
1499 * struct ec_params_flash_erase_v1 - Parameters for the flash erase command, v1.
1500 * @cmd: One of ec_flash_erase_cmd.
1501 * @reserved: Pad byte; currently always contains 0.
1502 * @flag: No flags defined yet; set to 0.
1503 * @params: Same as v0 parameters.
1504 */
1505struct ec_params_flash_erase_v1 {
1506 uint8_t cmd;
1507 uint8_t reserved;
1508 uint16_t flag;
1509 struct ec_params_flash_erase params;
1510} __ec_align4;
1511
1512/*
1513 * Get/set flash protection.
1514 *
1515 * If mask!=0, sets/clear the requested bits of flags. Depending on the
1516 * firmware write protect GPIO, not all flags will take effect immediately;
1517 * some flags require a subsequent hard reset to take effect. Check the
1518 * returned flags bits to see what actually happened.
1519 *
1520 * If mask=0, simply returns the current flags state.
1521 */
1522#define EC_CMD_FLASH_PROTECT 0x0015
1523#define EC_VER_FLASH_PROTECT 1 /* Command version 1 */
1524
1525/* Flags for flash protection */
1526/* RO flash code protected when the EC boots */
1527#define EC_FLASH_PROTECT_RO_AT_BOOT BIT(0)
1528/*
1529 * RO flash code protected now. If this bit is set, at-boot status cannot
1530 * be changed.
1531 */
1532#define EC_FLASH_PROTECT_RO_NOW BIT(1)
1533/* Entire flash code protected now, until reboot. */
1534#define EC_FLASH_PROTECT_ALL_NOW BIT(2)
1535/* Flash write protect GPIO is asserted now */
1536#define EC_FLASH_PROTECT_GPIO_ASSERTED BIT(3)
1537/* Error - at least one bank of flash is stuck locked, and cannot be unlocked */
1538#define EC_FLASH_PROTECT_ERROR_STUCK BIT(4)
1539/*
1540 * Error - flash protection is in inconsistent state. At least one bank of
1541 * flash which should be protected is not protected. Usually fixed by
1542 * re-requesting the desired flags, or by a hard reset if that fails.
1543 */
1544#define EC_FLASH_PROTECT_ERROR_INCONSISTENT BIT(5)
1545/* Entire flash code protected when the EC boots */
1546#define EC_FLASH_PROTECT_ALL_AT_BOOT BIT(6)
1547/* RW flash code protected when the EC boots */
1548#define EC_FLASH_PROTECT_RW_AT_BOOT BIT(7)
1549/* RW flash code protected now. */
1550#define EC_FLASH_PROTECT_RW_NOW BIT(8)
1551/* Rollback information flash region protected when the EC boots */
1552#define EC_FLASH_PROTECT_ROLLBACK_AT_BOOT BIT(9)
1553/* Rollback information flash region protected now */
1554#define EC_FLASH_PROTECT_ROLLBACK_NOW BIT(10)
1555
1556
1557/**
1558 * struct ec_params_flash_protect - Parameters for the flash protect command.
1559 * @mask: Bits in flags to apply.
1560 * @flags: New flags to apply.
1561 */
1562struct ec_params_flash_protect {
1563 uint32_t mask;
1564 uint32_t flags;
1565} __ec_align4;
1566
1567/**
1568 * struct ec_response_flash_protect - Response to the flash protect command.
1569 * @flags: Current value of flash protect flags.
1570 * @valid_flags: Flags which are valid on this platform. This allows the
1571 * caller to distinguish between flags which aren't set vs. flags
1572 * which can't be set on this platform.
1573 * @writable_flags: Flags which can be changed given the current protection
1574 * state.
1575 */
1576struct ec_response_flash_protect {
1577 uint32_t flags;
1578 uint32_t valid_flags;
1579 uint32_t writable_flags;
1580} __ec_align4;
1581
1582/*
1583 * Note: commands 0x14 - 0x19 version 0 were old commands to get/set flash
1584 * write protect. These commands may be reused with version > 0.
1585 */
1586
1587/* Get the region offset/size */
1588#define EC_CMD_FLASH_REGION_INFO 0x0016
1589#define EC_VER_FLASH_REGION_INFO 1
1590
1591enum ec_flash_region {
1592 /* Region which holds read-only EC image */
1593 EC_FLASH_REGION_RO = 0,
1594 /*
1595 * Region which holds active RW image. 'Active' is different from
1596 * 'running'. Active means 'scheduled-to-run'. Since RO image always
1597 * scheduled to run, active/non-active applies only to RW images (for
1598 * the same reason 'update' applies only to RW images. It's a state of
1599 * an image on a flash. Running image can be RO, RW_A, RW_B but active
1600 * image can only be RW_A or RW_B. In recovery mode, an active RW image
1601 * doesn't enter 'running' state but it's still active on a flash.
1602 */
1603 EC_FLASH_REGION_ACTIVE,
1604 /*
1605 * Region which should be write-protected in the factory (a superset of
1606 * EC_FLASH_REGION_RO)
1607 */
1608 EC_FLASH_REGION_WP_RO,
1609 /* Region which holds updatable (non-active) RW image */
1610 EC_FLASH_REGION_UPDATE,
1611 /* Number of regions */
1612 EC_FLASH_REGION_COUNT,
1613};
1614/*
1615 * 'RW' is vague if there are multiple RW images; we mean the active one,
1616 * so the old constant is deprecated.
1617 */
1618#define EC_FLASH_REGION_RW EC_FLASH_REGION_ACTIVE
1619
1620/**
1621 * struct ec_params_flash_region_info - Parameters for the flash region info
1622 * command.
1623 * @region: Flash region; see EC_FLASH_REGION_*
1624 */
1625struct ec_params_flash_region_info {
1626 uint32_t region;
1627} __ec_align4;
1628
1629struct ec_response_flash_region_info {
1630 uint32_t offset;
1631 uint32_t size;
1632} __ec_align4;
1633
1634/* Read/write VbNvContext */
1635#define EC_CMD_VBNV_CONTEXT 0x0017
1636#define EC_VER_VBNV_CONTEXT 1
1637#define EC_VBNV_BLOCK_SIZE 16
1638
1639enum ec_vbnvcontext_op {
1640 EC_VBNV_CONTEXT_OP_READ,
1641 EC_VBNV_CONTEXT_OP_WRITE,
1642};
1643
1644struct ec_params_vbnvcontext {
1645 uint32_t op;
1646 uint8_t block[EC_VBNV_BLOCK_SIZE];
1647} __ec_align4;
1648
1649struct ec_response_vbnvcontext {
1650 uint8_t block[EC_VBNV_BLOCK_SIZE];
1651} __ec_align4;
1652
1653
1654/* Get SPI flash information */
1655#define EC_CMD_FLASH_SPI_INFO 0x0018
1656
1657struct ec_response_flash_spi_info {
1658 /* JEDEC info from command 0x9F (manufacturer, memory type, size) */
1659 uint8_t jedec[3];
1660
1661 /* Pad byte; currently always contains 0 */
1662 uint8_t reserved0;
1663
1664 /* Manufacturer / device ID from command 0x90 */
1665 uint8_t mfr_dev_id[2];
1666
1667 /* Status registers from command 0x05 and 0x35 */
1668 uint8_t sr1, sr2;
1669} __ec_align1;
1670
1671
1672/* Select flash during flash operations */
1673#define EC_CMD_FLASH_SELECT 0x0019
1674
1675/**
1676 * struct ec_params_flash_select - Parameters for the flash select command.
1677 * @select: 1 to select flash, 0 to deselect flash
1678 */
1679struct ec_params_flash_select {
1680 uint8_t select;
1681} __ec_align4;
1682
1683
1684/*****************************************************************************/
1685/* PWM commands */
1686
1687/* Get fan target RPM */
1688#define EC_CMD_PWM_GET_FAN_TARGET_RPM 0x0020
1689
1690struct ec_response_pwm_get_fan_rpm {
1691 uint32_t rpm;
1692} __ec_align4;
1693
1694/* Set target fan RPM */
1695#define EC_CMD_PWM_SET_FAN_TARGET_RPM 0x0021
1696
1697/* Version 0 of input params */
1698struct ec_params_pwm_set_fan_target_rpm_v0 {
1699 uint32_t rpm;
1700} __ec_align4;
1701
1702/* Version 1 of input params */
1703struct ec_params_pwm_set_fan_target_rpm_v1 {
1704 uint32_t rpm;
1705 uint8_t fan_idx;
1706} __ec_align_size1;
1707
1708/* Get keyboard backlight */
1709/* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */
1710#define EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT 0x0022
1711
1712struct ec_response_pwm_get_keyboard_backlight {
1713 uint8_t percent;
1714 uint8_t enabled;
1715} __ec_align1;
1716
1717/* Set keyboard backlight */
1718/* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */
1719#define EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT 0x0023
1720
1721struct ec_params_pwm_set_keyboard_backlight {
1722 uint8_t percent;
1723} __ec_align1;
1724
1725/* Set target fan PWM duty cycle */
1726#define EC_CMD_PWM_SET_FAN_DUTY 0x0024
1727
1728/* Version 0 of input params */
1729struct ec_params_pwm_set_fan_duty_v0 {
1730 uint32_t percent;
1731} __ec_align4;
1732
1733/* Version 1 of input params */
1734struct ec_params_pwm_set_fan_duty_v1 {
1735 uint32_t percent;
1736 uint8_t fan_idx;
1737} __ec_align_size1;
1738
1739#define EC_CMD_PWM_SET_DUTY 0x0025
1740/* 16 bit duty cycle, 0xffff = 100% */
1741#define EC_PWM_MAX_DUTY 0xffff
1742
1743enum ec_pwm_type {
1744 /* All types, indexed by board-specific enum pwm_channel */
1745 EC_PWM_TYPE_GENERIC = 0,
1746 /* Keyboard backlight */
1747 EC_PWM_TYPE_KB_LIGHT,
1748 /* Display backlight */
1749 EC_PWM_TYPE_DISPLAY_LIGHT,
1750 EC_PWM_TYPE_COUNT,
1751};
1752
1753struct ec_params_pwm_set_duty {
1754 uint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */
1755 uint8_t pwm_type; /* ec_pwm_type */
1756 uint8_t index; /* Type-specific index, or 0 if unique */
1757} __ec_align4;
1758
1759#define EC_CMD_PWM_GET_DUTY 0x0026
1760
1761struct ec_params_pwm_get_duty {
1762 uint8_t pwm_type; /* ec_pwm_type */
1763 uint8_t index; /* Type-specific index, or 0 if unique */
1764} __ec_align1;
1765
1766struct ec_response_pwm_get_duty {
1767 uint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */
1768} __ec_align2;
1769
1770/*****************************************************************************/
1771/*
1772 * Lightbar commands. This looks worse than it is. Since we only use one HOST
1773 * command to say "talk to the lightbar", we put the "and tell it to do X" part
1774 * into a subcommand. We'll make separate structs for subcommands with
1775 * different input args, so that we know how much to expect.
1776 */
1777#define EC_CMD_LIGHTBAR_CMD 0x0028
1778
1779struct rgb_s {
1780 uint8_t r, g, b;
1781} __ec_todo_unpacked;
1782
1783#define LB_BATTERY_LEVELS 4
1784
1785/*
1786 * List of tweakable parameters. NOTE: It's __packed so it can be sent in a
1787 * host command, but the alignment is the same regardless. Keep it that way.
1788 */
1789struct lightbar_params_v0 {
1790 /* Timing */
1791 int32_t google_ramp_up;
1792 int32_t google_ramp_down;
1793 int32_t s3s0_ramp_up;
1794 int32_t s0_tick_delay[2]; /* AC=0/1 */
1795 int32_t s0a_tick_delay[2]; /* AC=0/1 */
1796 int32_t s0s3_ramp_down;
1797 int32_t s3_sleep_for;
1798 int32_t s3_ramp_up;
1799 int32_t s3_ramp_down;
1800
1801 /* Oscillation */
1802 uint8_t new_s0;
1803 uint8_t osc_min[2]; /* AC=0/1 */
1804 uint8_t osc_max[2]; /* AC=0/1 */
1805 uint8_t w_ofs[2]; /* AC=0/1 */
1806
1807 /* Brightness limits based on the backlight and AC. */
1808 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */
1809 uint8_t bright_bl_on_min[2]; /* AC=0/1 */
1810 uint8_t bright_bl_on_max[2]; /* AC=0/1 */
1811
1812 /* Battery level thresholds */
1813 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1];
1814
1815 /* Map [AC][battery_level] to color index */
1816 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */
1817 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */
1818
1819 /* Color palette */
1820 struct rgb_s color[8]; /* 0-3 are Google colors */
1821} __ec_todo_packed;
1822
1823struct lightbar_params_v1 {
1824 /* Timing */
1825 int32_t google_ramp_up;
1826 int32_t google_ramp_down;
1827 int32_t s3s0_ramp_up;
1828 int32_t s0_tick_delay[2]; /* AC=0/1 */
1829 int32_t s0a_tick_delay[2]; /* AC=0/1 */
1830 int32_t s0s3_ramp_down;
1831 int32_t s3_sleep_for;
1832 int32_t s3_ramp_up;
1833 int32_t s3_ramp_down;
1834 int32_t s5_ramp_up;
1835 int32_t s5_ramp_down;
1836 int32_t tap_tick_delay;
1837 int32_t tap_gate_delay;
1838 int32_t tap_display_time;
1839
1840 /* Tap-for-battery params */
1841 uint8_t tap_pct_red;
1842 uint8_t tap_pct_green;
1843 uint8_t tap_seg_min_on;
1844 uint8_t tap_seg_max_on;
1845 uint8_t tap_seg_osc;
1846 uint8_t tap_idx[3];
1847
1848 /* Oscillation */
1849 uint8_t osc_min[2]; /* AC=0/1 */
1850 uint8_t osc_max[2]; /* AC=0/1 */
1851 uint8_t w_ofs[2]; /* AC=0/1 */
1852
1853 /* Brightness limits based on the backlight and AC. */
1854 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */
1855 uint8_t bright_bl_on_min[2]; /* AC=0/1 */
1856 uint8_t bright_bl_on_max[2]; /* AC=0/1 */
1857
1858 /* Battery level thresholds */
1859 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1];
1860
1861 /* Map [AC][battery_level] to color index */
1862 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */
1863 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */
1864
1865 /* s5: single color pulse on inhibited power-up */
1866 uint8_t s5_idx;
1867
1868 /* Color palette */
1869 struct rgb_s color[8]; /* 0-3 are Google colors */
1870} __ec_todo_packed;
1871
1872/* Lightbar command params v2
1873 * crbug.com/467716
1874 *
1875 * lightbar_parms_v1 was too big for i2c, therefore in v2, we split them up by
1876 * logical groups to make it more manageable ( < 120 bytes).
1877 *
1878 * NOTE: Each of these groups must be less than 120 bytes.
1879 */
1880
1881struct lightbar_params_v2_timing {
1882 /* Timing */
1883 int32_t google_ramp_up;
1884 int32_t google_ramp_down;
1885 int32_t s3s0_ramp_up;
1886 int32_t s0_tick_delay[2]; /* AC=0/1 */
1887 int32_t s0a_tick_delay[2]; /* AC=0/1 */
1888 int32_t s0s3_ramp_down;
1889 int32_t s3_sleep_for;
1890 int32_t s3_ramp_up;
1891 int32_t s3_ramp_down;
1892 int32_t s5_ramp_up;
1893 int32_t s5_ramp_down;
1894 int32_t tap_tick_delay;
1895 int32_t tap_gate_delay;
1896 int32_t tap_display_time;
1897} __ec_todo_packed;
1898
1899struct lightbar_params_v2_tap {
1900 /* Tap-for-battery params */
1901 uint8_t tap_pct_red;
1902 uint8_t tap_pct_green;
1903 uint8_t tap_seg_min_on;
1904 uint8_t tap_seg_max_on;
1905 uint8_t tap_seg_osc;
1906 uint8_t tap_idx[3];
1907} __ec_todo_packed;
1908
1909struct lightbar_params_v2_oscillation {
1910 /* Oscillation */
1911 uint8_t osc_min[2]; /* AC=0/1 */
1912 uint8_t osc_max[2]; /* AC=0/1 */
1913 uint8_t w_ofs[2]; /* AC=0/1 */
1914} __ec_todo_packed;
1915
1916struct lightbar_params_v2_brightness {
1917 /* Brightness limits based on the backlight and AC. */
1918 uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */
1919 uint8_t bright_bl_on_min[2]; /* AC=0/1 */
1920 uint8_t bright_bl_on_max[2]; /* AC=0/1 */
1921} __ec_todo_packed;
1922
1923struct lightbar_params_v2_thresholds {
1924 /* Battery level thresholds */
1925 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1];
1926} __ec_todo_packed;
1927
1928struct lightbar_params_v2_colors {
1929 /* Map [AC][battery_level] to color index */
1930 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */
1931 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */
1932
1933 /* s5: single color pulse on inhibited power-up */
1934 uint8_t s5_idx;
1935
1936 /* Color palette */
1937 struct rgb_s color[8]; /* 0-3 are Google colors */
1938} __ec_todo_packed;
1939
1940/* Lightbar program. */
1941#define EC_LB_PROG_LEN 192
1942struct lightbar_program {
1943 uint8_t size;
1944 uint8_t data[EC_LB_PROG_LEN];
1945} __ec_todo_unpacked;
1946
1947struct ec_params_lightbar {
1948 uint8_t cmd; /* Command (see enum lightbar_command) */
1949 union {
1950 /*
1951 * The following commands have no args:
1952 *
1953 * dump, off, on, init, get_seq, get_params_v0, get_params_v1,
1954 * version, get_brightness, get_demo, suspend, resume,
1955 * get_params_v2_timing, get_params_v2_tap, get_params_v2_osc,
1956 * get_params_v2_bright, get_params_v2_thlds,
1957 * get_params_v2_colors
1958 *
1959 * Don't use an empty struct, because C++ hates that.
1960 */
1961
1962 struct __ec_todo_unpacked {
1963 uint8_t num;
1964 } set_brightness, seq, demo;
1965
1966 struct __ec_todo_unpacked {
1967 uint8_t ctrl, reg, value;
1968 } reg;
1969
1970 struct __ec_todo_unpacked {
1971 uint8_t led, red, green, blue;
1972 } set_rgb;
1973
1974 struct __ec_todo_unpacked {
1975 uint8_t led;
1976 } get_rgb;
1977
1978 struct __ec_todo_unpacked {
1979 uint8_t enable;
1980 } manual_suspend_ctrl;
1981
1982 struct lightbar_params_v0 set_params_v0;
1983 struct lightbar_params_v1 set_params_v1;
1984
1985 struct lightbar_params_v2_timing set_v2par_timing;
1986 struct lightbar_params_v2_tap set_v2par_tap;
1987 struct lightbar_params_v2_oscillation set_v2par_osc;
1988 struct lightbar_params_v2_brightness set_v2par_bright;
1989 struct lightbar_params_v2_thresholds set_v2par_thlds;
1990 struct lightbar_params_v2_colors set_v2par_colors;
1991
1992 struct lightbar_program set_program;
1993 };
1994} __ec_todo_packed;
1995
1996struct ec_response_lightbar {
1997 union {
1998 struct __ec_todo_unpacked {
1999 struct __ec_todo_unpacked {
2000 uint8_t reg;
2001 uint8_t ic0;
2002 uint8_t ic1;
2003 } vals[23];
2004 } dump;
2005
2006 struct __ec_todo_unpacked {
2007 uint8_t num;
2008 } get_seq, get_brightness, get_demo;
2009
2010 struct lightbar_params_v0 get_params_v0;
2011 struct lightbar_params_v1 get_params_v1;
2012
2013
2014 struct lightbar_params_v2_timing get_params_v2_timing;
2015 struct lightbar_params_v2_tap get_params_v2_tap;
2016 struct lightbar_params_v2_oscillation get_params_v2_osc;
2017 struct lightbar_params_v2_brightness get_params_v2_bright;
2018 struct lightbar_params_v2_thresholds get_params_v2_thlds;
2019 struct lightbar_params_v2_colors get_params_v2_colors;
2020
2021 struct __ec_todo_unpacked {
2022 uint32_t num;
2023 uint32_t flags;
2024 } version;
2025
2026 struct __ec_todo_unpacked {
2027 uint8_t red, green, blue;
2028 } get_rgb;
2029
2030 /*
2031 * The following commands have no response:
2032 *
2033 * off, on, init, set_brightness, seq, reg, set_rgb, demo,
2034 * set_params_v0, set_params_v1, set_program,
2035 * manual_suspend_ctrl, suspend, resume, set_v2par_timing,
2036 * set_v2par_tap, set_v2par_osc, set_v2par_bright,
2037 * set_v2par_thlds, set_v2par_colors
2038 */
2039 };
2040} __ec_todo_packed;
2041
2042/* Lightbar commands */
2043enum lightbar_command {
2044 LIGHTBAR_CMD_DUMP = 0,
2045 LIGHTBAR_CMD_OFF = 1,
2046 LIGHTBAR_CMD_ON = 2,
2047 LIGHTBAR_CMD_INIT = 3,
2048 LIGHTBAR_CMD_SET_BRIGHTNESS = 4,
2049 LIGHTBAR_CMD_SEQ = 5,
2050 LIGHTBAR_CMD_REG = 6,
2051 LIGHTBAR_CMD_SET_RGB = 7,
2052 LIGHTBAR_CMD_GET_SEQ = 8,
2053 LIGHTBAR_CMD_DEMO = 9,
2054 LIGHTBAR_CMD_GET_PARAMS_V0 = 10,
2055 LIGHTBAR_CMD_SET_PARAMS_V0 = 11,
2056 LIGHTBAR_CMD_VERSION = 12,
2057 LIGHTBAR_CMD_GET_BRIGHTNESS = 13,
2058 LIGHTBAR_CMD_GET_RGB = 14,
2059 LIGHTBAR_CMD_GET_DEMO = 15,
2060 LIGHTBAR_CMD_GET_PARAMS_V1 = 16,
2061 LIGHTBAR_CMD_SET_PARAMS_V1 = 17,
2062 LIGHTBAR_CMD_SET_PROGRAM = 18,
2063 LIGHTBAR_CMD_MANUAL_SUSPEND_CTRL = 19,
2064 LIGHTBAR_CMD_SUSPEND = 20,
2065 LIGHTBAR_CMD_RESUME = 21,
2066 LIGHTBAR_CMD_GET_PARAMS_V2_TIMING = 22,
2067 LIGHTBAR_CMD_SET_PARAMS_V2_TIMING = 23,
2068 LIGHTBAR_CMD_GET_PARAMS_V2_TAP = 24,
2069 LIGHTBAR_CMD_SET_PARAMS_V2_TAP = 25,
2070 LIGHTBAR_CMD_GET_PARAMS_V2_OSCILLATION = 26,
2071 LIGHTBAR_CMD_SET_PARAMS_V2_OSCILLATION = 27,
2072 LIGHTBAR_CMD_GET_PARAMS_V2_BRIGHTNESS = 28,
2073 LIGHTBAR_CMD_SET_PARAMS_V2_BRIGHTNESS = 29,
2074 LIGHTBAR_CMD_GET_PARAMS_V2_THRESHOLDS = 30,
2075 LIGHTBAR_CMD_SET_PARAMS_V2_THRESHOLDS = 31,
2076 LIGHTBAR_CMD_GET_PARAMS_V2_COLORS = 32,
2077 LIGHTBAR_CMD_SET_PARAMS_V2_COLORS = 33,
2078 LIGHTBAR_NUM_CMDS
2079};
2080
2081/*****************************************************************************/
2082/* LED control commands */
2083
2084#define EC_CMD_LED_CONTROL 0x0029
2085
2086enum ec_led_id {
2087 /* LED to indicate battery state of charge */
2088 EC_LED_ID_BATTERY_LED = 0,
2089 /*
2090 * LED to indicate system power state (on or in suspend).
2091 * May be on power button or on C-panel.
2092 */
2093 EC_LED_ID_POWER_LED,
2094 /* LED on power adapter or its plug */
2095 EC_LED_ID_ADAPTER_LED,
2096 /* LED to indicate left side */
2097 EC_LED_ID_LEFT_LED,
2098 /* LED to indicate right side */
2099 EC_LED_ID_RIGHT_LED,
2100 /* LED to indicate recovery mode with HW_REINIT */
2101 EC_LED_ID_RECOVERY_HW_REINIT_LED,
2102 /* LED to indicate sysrq debug mode. */
2103 EC_LED_ID_SYSRQ_DEBUG_LED,
2104
2105 EC_LED_ID_COUNT
2106};
2107
2108/* LED control flags */
2109#define EC_LED_FLAGS_QUERY BIT(0) /* Query LED capability only */
2110#define EC_LED_FLAGS_AUTO BIT(1) /* Switch LED back to automatic control */
2111
2112enum ec_led_colors {
2113 EC_LED_COLOR_RED = 0,
2114 EC_LED_COLOR_GREEN,
2115 EC_LED_COLOR_BLUE,
2116 EC_LED_COLOR_YELLOW,
2117 EC_LED_COLOR_WHITE,
2118 EC_LED_COLOR_AMBER,
2119
2120 EC_LED_COLOR_COUNT
2121};
2122
2123struct ec_params_led_control {
2124 uint8_t led_id; /* Which LED to control */
2125 uint8_t flags; /* Control flags */
2126
2127 uint8_t brightness[EC_LED_COLOR_COUNT];
2128} __ec_align1;
2129
2130struct ec_response_led_control {
2131 /*
2132 * Available brightness value range.
2133 *
2134 * Range 0 means color channel not present.
2135 * Range 1 means on/off control.
2136 * Other values means the LED is control by PWM.
2137 */
2138 uint8_t brightness_range[EC_LED_COLOR_COUNT];
2139} __ec_align1;
2140
2141/*****************************************************************************/
2142/* Verified boot commands */
2143
2144/*
2145 * Note: command code 0x29 version 0 was VBOOT_CMD in Link EVT; it may be
2146 * reused for other purposes with version > 0.
2147 */
2148
2149/* Verified boot hash command */
2150#define EC_CMD_VBOOT_HASH 0x002A
2151
2152struct ec_params_vboot_hash {
2153 uint8_t cmd; /* enum ec_vboot_hash_cmd */
2154 uint8_t hash_type; /* enum ec_vboot_hash_type */
2155 uint8_t nonce_size; /* Nonce size; may be 0 */
2156 uint8_t reserved0; /* Reserved; set 0 */
2157 uint32_t offset; /* Offset in flash to hash */
2158 uint32_t size; /* Number of bytes to hash */
2159 uint8_t nonce_data[64]; /* Nonce data; ignored if nonce_size=0 */
2160} __ec_align4;
2161
2162struct ec_response_vboot_hash {
2163 uint8_t status; /* enum ec_vboot_hash_status */
2164 uint8_t hash_type; /* enum ec_vboot_hash_type */
2165 uint8_t digest_size; /* Size of hash digest in bytes */
2166 uint8_t reserved0; /* Ignore; will be 0 */
2167 uint32_t offset; /* Offset in flash which was hashed */
2168 uint32_t size; /* Number of bytes hashed */
2169 uint8_t hash_digest[64]; /* Hash digest data */
2170} __ec_align4;
2171
2172enum ec_vboot_hash_cmd {
2173 EC_VBOOT_HASH_GET = 0, /* Get current hash status */
2174 EC_VBOOT_HASH_ABORT = 1, /* Abort calculating current hash */
2175 EC_VBOOT_HASH_START = 2, /* Start computing a new hash */
2176 EC_VBOOT_HASH_RECALC = 3, /* Synchronously compute a new hash */
2177};
2178
2179enum ec_vboot_hash_type {
2180 EC_VBOOT_HASH_TYPE_SHA256 = 0, /* SHA-256 */
2181};
2182
2183enum ec_vboot_hash_status {
2184 EC_VBOOT_HASH_STATUS_NONE = 0, /* No hash (not started, or aborted) */
2185 EC_VBOOT_HASH_STATUS_DONE = 1, /* Finished computing a hash */
2186 EC_VBOOT_HASH_STATUS_BUSY = 2, /* Busy computing a hash */
2187};
2188
2189/*
2190 * Special values for offset for EC_VBOOT_HASH_START and EC_VBOOT_HASH_RECALC.
2191 * If one of these is specified, the EC will automatically update offset and
2192 * size to the correct values for the specified image (RO or RW).
2193 */
2194#define EC_VBOOT_HASH_OFFSET_RO 0xfffffffe
2195#define EC_VBOOT_HASH_OFFSET_ACTIVE 0xfffffffd
2196#define EC_VBOOT_HASH_OFFSET_UPDATE 0xfffffffc
2197
2198/*
2199 * 'RW' is vague if there are multiple RW images; we mean the active one,
2200 * so the old constant is deprecated.
2201 */
2202#define EC_VBOOT_HASH_OFFSET_RW EC_VBOOT_HASH_OFFSET_ACTIVE
2203
2204/*****************************************************************************/
2205/*
2206 * Motion sense commands. We'll make separate structs for sub-commands with
2207 * different input args, so that we know how much to expect.
2208 */
2209#define EC_CMD_MOTION_SENSE_CMD 0x002B
2210
2211/* Motion sense commands */
2212enum motionsense_command {
2213 /*
2214 * Dump command returns all motion sensor data including motion sense
2215 * module flags and individual sensor flags.
2216 */
2217 MOTIONSENSE_CMD_DUMP = 0,
2218
2219 /*
2220 * Info command returns data describing the details of a given sensor,
2221 * including enum motionsensor_type, enum motionsensor_location, and
2222 * enum motionsensor_chip.
2223 */
2224 MOTIONSENSE_CMD_INFO = 1,
2225
2226 /*
2227 * EC Rate command is a setter/getter command for the EC sampling rate
2228 * in milliseconds.
2229 * It is per sensor, the EC run sample task at the minimum of all
2230 * sensors EC_RATE.
2231 * For sensors without hardware FIFO, EC_RATE should be equals to 1/ODR
2232 * to collect all the sensor samples.
2233 * For sensor with hardware FIFO, EC_RATE is used as the maximal delay
2234 * to process of all motion sensors in milliseconds.
2235 */
2236 MOTIONSENSE_CMD_EC_RATE = 2,
2237
2238 /*
2239 * Sensor ODR command is a setter/getter command for the output data
2240 * rate of a specific motion sensor in millihertz.
2241 */
2242 MOTIONSENSE_CMD_SENSOR_ODR = 3,
2243
2244 /*
2245 * Sensor range command is a setter/getter command for the range of
2246 * a specified motion sensor in +/-G's or +/- deg/s.
2247 */
2248 MOTIONSENSE_CMD_SENSOR_RANGE = 4,
2249
2250 /*
2251 * Setter/getter command for the keyboard wake angle. When the lid
2252 * angle is greater than this value, keyboard wake is disabled in S3,
2253 * and when the lid angle goes less than this value, keyboard wake is
2254 * enabled. Note, the lid angle measurement is an approximate,
2255 * un-calibrated value, hence the wake angle isn't exact.
2256 */
2257 MOTIONSENSE_CMD_KB_WAKE_ANGLE = 5,
2258
2259 /*
2260 * Returns a single sensor data.
2261 */
2262 MOTIONSENSE_CMD_DATA = 6,
2263
2264 /*
2265 * Return sensor fifo info.
2266 */
2267 MOTIONSENSE_CMD_FIFO_INFO = 7,
2268
2269 /*
2270 * Insert a flush element in the fifo and return sensor fifo info.
2271 * The host can use that element to synchronize its operation.
2272 */
2273 MOTIONSENSE_CMD_FIFO_FLUSH = 8,
2274
2275 /*
2276 * Return a portion of the fifo.
2277 */
2278 MOTIONSENSE_CMD_FIFO_READ = 9,
2279
2280 /*
2281 * Perform low level calibration.
2282 * On sensors that support it, ask to do offset calibration.
2283 */
2284 MOTIONSENSE_CMD_PERFORM_CALIB = 10,
2285
2286 /*
2287 * Sensor Offset command is a setter/getter command for the offset
2288 * used for calibration.
2289 * The offsets can be calculated by the host, or via
2290 * PERFORM_CALIB command.
2291 */
2292 MOTIONSENSE_CMD_SENSOR_OFFSET = 11,
2293
2294 /*
2295 * List available activities for a MOTION sensor.
2296 * Indicates if they are enabled or disabled.
2297 */
2298 MOTIONSENSE_CMD_LIST_ACTIVITIES = 12,
2299
2300 /*
2301 * Activity management
2302 * Enable/Disable activity recognition.
2303 */
2304 MOTIONSENSE_CMD_SET_ACTIVITY = 13,
2305
2306 /*
2307 * Lid Angle
2308 */
2309 MOTIONSENSE_CMD_LID_ANGLE = 14,
2310
2311 /*
2312 * Allow the FIFO to trigger interrupt via MKBP events.
2313 * By default the FIFO does not send interrupt to process the FIFO
2314 * until the AP is ready or it is coming from a wakeup sensor.
2315 */
2316 MOTIONSENSE_CMD_FIFO_INT_ENABLE = 15,
2317
2318 /*
2319 * Spoof the readings of the sensors. The spoofed readings can be set
2320 * to arbitrary values, or will lock to the last read actual values.
2321 */
2322 MOTIONSENSE_CMD_SPOOF = 16,
2323
2324 /* Set lid angle for tablet mode detection. */
2325 MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE = 17,
2326
2327 /*
2328 * Sensor Scale command is a setter/getter command for the calibration
2329 * scale.
2330 */
2331 MOTIONSENSE_CMD_SENSOR_SCALE = 18,
2332
2333 /* Number of motionsense sub-commands. */
2334 MOTIONSENSE_NUM_CMDS
2335};
2336
2337/* List of motion sensor types. */
2338enum motionsensor_type {
2339 MOTIONSENSE_TYPE_ACCEL = 0,
2340 MOTIONSENSE_TYPE_GYRO = 1,
2341 MOTIONSENSE_TYPE_MAG = 2,
2342 MOTIONSENSE_TYPE_PROX = 3,
2343 MOTIONSENSE_TYPE_LIGHT = 4,
2344 MOTIONSENSE_TYPE_ACTIVITY = 5,
2345 MOTIONSENSE_TYPE_BARO = 6,
2346 MOTIONSENSE_TYPE_SYNC = 7,
2347 MOTIONSENSE_TYPE_MAX,
2348};
2349
2350/* List of motion sensor locations. */
2351enum motionsensor_location {
2352 MOTIONSENSE_LOC_BASE = 0,
2353 MOTIONSENSE_LOC_LID = 1,
2354 MOTIONSENSE_LOC_CAMERA = 2,
2355 MOTIONSENSE_LOC_MAX,
2356};
2357
2358/* List of motion sensor chips. */
2359enum motionsensor_chip {
2360 MOTIONSENSE_CHIP_KXCJ9 = 0,
2361 MOTIONSENSE_CHIP_LSM6DS0 = 1,
2362 MOTIONSENSE_CHIP_BMI160 = 2,
2363 MOTIONSENSE_CHIP_SI1141 = 3,
2364 MOTIONSENSE_CHIP_SI1142 = 4,
2365 MOTIONSENSE_CHIP_SI1143 = 5,
2366 MOTIONSENSE_CHIP_KX022 = 6,
2367 MOTIONSENSE_CHIP_L3GD20H = 7,
2368 MOTIONSENSE_CHIP_BMA255 = 8,
2369 MOTIONSENSE_CHIP_BMP280 = 9,
2370 MOTIONSENSE_CHIP_OPT3001 = 10,
2371 MOTIONSENSE_CHIP_BH1730 = 11,
2372 MOTIONSENSE_CHIP_GPIO = 12,
2373 MOTIONSENSE_CHIP_LIS2DH = 13,
2374 MOTIONSENSE_CHIP_LSM6DSM = 14,
2375 MOTIONSENSE_CHIP_LIS2DE = 15,
2376 MOTIONSENSE_CHIP_LIS2MDL = 16,
2377 MOTIONSENSE_CHIP_LSM6DS3 = 17,
2378 MOTIONSENSE_CHIP_LSM6DSO = 18,
2379 MOTIONSENSE_CHIP_LNG2DM = 19,
2380 MOTIONSENSE_CHIP_MAX,
2381};
2382
2383/* List of orientation positions */
2384enum motionsensor_orientation {
2385 MOTIONSENSE_ORIENTATION_LANDSCAPE = 0,
2386 MOTIONSENSE_ORIENTATION_PORTRAIT = 1,
2387 MOTIONSENSE_ORIENTATION_UPSIDE_DOWN_PORTRAIT = 2,
2388 MOTIONSENSE_ORIENTATION_UPSIDE_DOWN_LANDSCAPE = 3,
2389 MOTIONSENSE_ORIENTATION_UNKNOWN = 4,
2390};
2391
2392struct ec_response_motion_sensor_data {
2393 /* Flags for each sensor. */
2394 uint8_t flags;
2395 /* Sensor number the data comes from. */
2396 uint8_t sensor_num;
2397 /* Each sensor is up to 3-axis. */
2398 union {
2399 int16_t data[3];
2400 struct __ec_todo_packed {
2401 uint16_t reserved;
2402 uint32_t timestamp;
2403 };
2404 struct __ec_todo_unpacked {
2405 uint8_t activity; /* motionsensor_activity */
2406 uint8_t state;
2407 int16_t add_info[2];
2408 };
2409 };
2410} __ec_todo_packed;
2411
2412/* Note: used in ec_response_get_next_data */
2413struct ec_response_motion_sense_fifo_info {
2414 /* Size of the fifo */
2415 uint16_t size;
2416 /* Amount of space used in the fifo */
2417 uint16_t count;
2418 /* Timestamp recorded in us.
2419 * aka accurate timestamp when host event was triggered.
2420 */
2421 uint32_t timestamp;
2422 /* Total amount of vector lost */
2423 uint16_t total_lost;
2424 /* Lost events since the last fifo_info, per sensors */
2425 uint16_t lost[];
2426} __ec_todo_packed;
2427
2428struct ec_response_motion_sense_fifo_data {
2429 uint32_t number_data;
2430 struct ec_response_motion_sensor_data data[];
2431} __ec_todo_packed;
2432
2433/* List supported activity recognition */
2434enum motionsensor_activity {
2435 MOTIONSENSE_ACTIVITY_RESERVED = 0,
2436 MOTIONSENSE_ACTIVITY_SIG_MOTION = 1,
2437 MOTIONSENSE_ACTIVITY_DOUBLE_TAP = 2,
2438 MOTIONSENSE_ACTIVITY_ORIENTATION = 3,
2439};
2440
2441struct ec_motion_sense_activity {
2442 uint8_t sensor_num;
2443 uint8_t activity; /* one of enum motionsensor_activity */
2444 uint8_t enable; /* 1: enable, 0: disable */
2445 uint8_t reserved;
2446 uint16_t parameters[3]; /* activity dependent parameters */
2447} __ec_todo_unpacked;
2448
2449/* Module flag masks used for the dump sub-command. */
2450#define MOTIONSENSE_MODULE_FLAG_ACTIVE BIT(0)
2451
2452/* Sensor flag masks used for the dump sub-command. */
2453#define MOTIONSENSE_SENSOR_FLAG_PRESENT BIT(0)
2454
2455/*
2456 * Flush entry for synchronization.
2457 * data contains time stamp
2458 */
2459#define MOTIONSENSE_SENSOR_FLAG_FLUSH BIT(0)
2460#define MOTIONSENSE_SENSOR_FLAG_TIMESTAMP BIT(1)
2461#define MOTIONSENSE_SENSOR_FLAG_WAKEUP BIT(2)
2462#define MOTIONSENSE_SENSOR_FLAG_TABLET_MODE BIT(3)
2463#define MOTIONSENSE_SENSOR_FLAG_ODR BIT(4)
2464
2465/*
2466 * Send this value for the data element to only perform a read. If you
2467 * send any other value, the EC will interpret it as data to set and will
2468 * return the actual value set.
2469 */
2470#define EC_MOTION_SENSE_NO_VALUE -1
2471
2472#define EC_MOTION_SENSE_INVALID_CALIB_TEMP 0x8000
2473
2474/* MOTIONSENSE_CMD_SENSOR_OFFSET subcommand flag */
2475/* Set Calibration information */
2476#define MOTION_SENSE_SET_OFFSET BIT(0)
2477
2478/* Default Scale value, factor 1. */
2479#define MOTION_SENSE_DEFAULT_SCALE BIT(15)
2480
2481#define LID_ANGLE_UNRELIABLE 500
2482
2483enum motionsense_spoof_mode {
2484 /* Disable spoof mode. */
2485 MOTIONSENSE_SPOOF_MODE_DISABLE = 0,
2486
2487 /* Enable spoof mode, but use provided component values. */
2488 MOTIONSENSE_SPOOF_MODE_CUSTOM,
2489
2490 /* Enable spoof mode, but use the current sensor values. */
2491 MOTIONSENSE_SPOOF_MODE_LOCK_CURRENT,
2492
2493 /* Query the current spoof mode status for the sensor. */
2494 MOTIONSENSE_SPOOF_MODE_QUERY,
2495};
2496
2497struct ec_params_motion_sense {
2498 uint8_t cmd;
2499 union {
2500 /* Used for MOTIONSENSE_CMD_DUMP. */
2501 struct __ec_todo_unpacked {
2502 /*
2503 * Maximal number of sensor the host is expecting.
2504 * 0 means the host is only interested in the number
2505 * of sensors controlled by the EC.
2506 */
2507 uint8_t max_sensor_count;
2508 } dump;
2509
2510 /*
2511 * Used for MOTIONSENSE_CMD_KB_WAKE_ANGLE.
2512 */
2513 struct __ec_todo_unpacked {
2514 /* Data to set or EC_MOTION_SENSE_NO_VALUE to read.
2515 * kb_wake_angle: angle to wakup AP.
2516 */
2517 int16_t data;
2518 } kb_wake_angle;
2519
2520 /*
2521 * Used for MOTIONSENSE_CMD_INFO, MOTIONSENSE_CMD_DATA
2522 * and MOTIONSENSE_CMD_PERFORM_CALIB.
2523 */
2524 struct __ec_todo_unpacked {
2525 uint8_t sensor_num;
2526 } info, info_3, data, fifo_flush, perform_calib,
2527 list_activities;
2528
2529 /*
2530 * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR
2531 * and MOTIONSENSE_CMD_SENSOR_RANGE.
2532 */
2533 struct __ec_todo_unpacked {
2534 uint8_t sensor_num;
2535
2536 /* Rounding flag, true for round-up, false for down. */
2537 uint8_t roundup;
2538
2539 uint16_t reserved;
2540
2541 /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. */
2542 int32_t data;
2543 } ec_rate, sensor_odr, sensor_range;
2544
2545 /* Used for MOTIONSENSE_CMD_SENSOR_OFFSET */
2546 struct __ec_todo_packed {
2547 uint8_t sensor_num;
2548
2549 /*
2550 * bit 0: If set (MOTION_SENSE_SET_OFFSET), set
2551 * the calibration information in the EC.
2552 * If unset, just retrieve calibration information.
2553 */
2554 uint16_t flags;
2555
2556 /*
2557 * Temperature at calibration, in units of 0.01 C
2558 * 0x8000: invalid / unknown.
2559 * 0x0: 0C
2560 * 0x7fff: +327.67C
2561 */
2562 int16_t temp;
2563
2564 /*
2565 * Offset for calibration.
2566 * Unit:
2567 * Accelerometer: 1/1024 g
2568 * Gyro: 1/1024 deg/s
2569 * Compass: 1/16 uT
2570 */
2571 int16_t offset[3];
2572 } sensor_offset;
2573
2574 /* Used for MOTIONSENSE_CMD_SENSOR_SCALE */
2575 struct __ec_todo_packed {
2576 uint8_t sensor_num;
2577
2578 /*
2579 * bit 0: If set (MOTION_SENSE_SET_OFFSET), set
2580 * the calibration information in the EC.
2581 * If unset, just retrieve calibration information.
2582 */
2583 uint16_t flags;
2584
2585 /*
2586 * Temperature at calibration, in units of 0.01 C
2587 * 0x8000: invalid / unknown.
2588 * 0x0: 0C
2589 * 0x7fff: +327.67C
2590 */
2591 int16_t temp;
2592
2593 /*
2594 * Scale for calibration:
2595 * By default scale is 1, it is encoded on 16bits:
2596 * 1 = BIT(15)
2597 * ~2 = 0xFFFF
2598 * ~0 = 0.
2599 */
2600 uint16_t scale[3];
2601 } sensor_scale;
2602
2603
2604 /* Used for MOTIONSENSE_CMD_FIFO_INFO */
2605 /* (no params) */
2606
2607 /* Used for MOTIONSENSE_CMD_FIFO_READ */
2608 struct __ec_todo_unpacked {
2609 /*
2610 * Number of expected vector to return.
2611 * EC may return less or 0 if none available.
2612 */
2613 uint32_t max_data_vector;
2614 } fifo_read;
2615
2616 struct ec_motion_sense_activity set_activity;
2617
2618 /* Used for MOTIONSENSE_CMD_LID_ANGLE */
2619 /* (no params) */
2620
2621 /* Used for MOTIONSENSE_CMD_FIFO_INT_ENABLE */
2622 struct __ec_todo_unpacked {
2623 /*
2624 * 1: enable, 0 disable fifo,
2625 * EC_MOTION_SENSE_NO_VALUE return value.
2626 */
2627 int8_t enable;
2628 } fifo_int_enable;
2629
2630 /* Used for MOTIONSENSE_CMD_SPOOF */
2631 struct __ec_todo_packed {
2632 uint8_t sensor_id;
2633
2634 /* See enum motionsense_spoof_mode. */
2635 uint8_t spoof_enable;
2636
2637 /* Ignored, used for alignment. */
2638 uint8_t reserved;
2639
2640 /* Individual component values to spoof. */
2641 int16_t components[3];
2642 } spoof;
2643
2644 /* Used for MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. */
2645 struct __ec_todo_unpacked {
2646 /*
2647 * Lid angle threshold for switching between tablet and
2648 * clamshell mode.
2649 */
2650 int16_t lid_angle;
2651
2652 /*
2653 * Hysteresis degree to prevent fluctuations between
2654 * clamshell and tablet mode if lid angle keeps
2655 * changing around the threshold. Lid motion driver will
2656 * use lid_angle + hys_degree to trigger tablet mode and
2657 * lid_angle - hys_degree to trigger clamshell mode.
2658 */
2659 int16_t hys_degree;
2660 } tablet_mode_threshold;
2661 };
2662} __ec_todo_packed;
2663
2664struct ec_response_motion_sense {
2665 union {
2666 /* Used for MOTIONSENSE_CMD_DUMP */
2667 struct __ec_todo_unpacked {
2668 /* Flags representing the motion sensor module. */
2669 uint8_t module_flags;
2670
2671 /* Number of sensors managed directly by the EC. */
2672 uint8_t sensor_count;
2673
2674 /*
2675 * Sensor data is truncated if response_max is too small
2676 * for holding all the data.
2677 */
2678 struct ec_response_motion_sensor_data sensor[0];
2679 } dump;
2680
2681 /* Used for MOTIONSENSE_CMD_INFO. */
2682 struct __ec_todo_unpacked {
2683 /* Should be element of enum motionsensor_type. */
2684 uint8_t type;
2685
2686 /* Should be element of enum motionsensor_location. */
2687 uint8_t location;
2688
2689 /* Should be element of enum motionsensor_chip. */
2690 uint8_t chip;
2691 } info;
2692
2693 /* Used for MOTIONSENSE_CMD_INFO version 3 */
2694 struct __ec_todo_unpacked {
2695 /* Should be element of enum motionsensor_type. */
2696 uint8_t type;
2697
2698 /* Should be element of enum motionsensor_location. */
2699 uint8_t location;
2700
2701 /* Should be element of enum motionsensor_chip. */
2702 uint8_t chip;
2703
2704 /* Minimum sensor sampling frequency */
2705 uint32_t min_frequency;
2706
2707 /* Maximum sensor sampling frequency */
2708 uint32_t max_frequency;
2709
2710 /* Max number of sensor events that could be in fifo */
2711 uint32_t fifo_max_event_count;
2712 } info_3;
2713
2714 /* Used for MOTIONSENSE_CMD_DATA */
2715 struct ec_response_motion_sensor_data data;
2716
2717 /*
2718 * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR,
2719 * MOTIONSENSE_CMD_SENSOR_RANGE,
2720 * MOTIONSENSE_CMD_KB_WAKE_ANGLE,
2721 * MOTIONSENSE_CMD_FIFO_INT_ENABLE and
2722 * MOTIONSENSE_CMD_SPOOF.
2723 */
2724 struct __ec_todo_unpacked {
2725 /* Current value of the parameter queried. */
2726 int32_t ret;
2727 } ec_rate, sensor_odr, sensor_range, kb_wake_angle,
2728 fifo_int_enable, spoof;
2729
2730 /*
2731 * Used for MOTIONSENSE_CMD_SENSOR_OFFSET,
2732 * PERFORM_CALIB.
2733 */
2734 struct __ec_todo_unpacked {
2735 int16_t temp;
2736 int16_t offset[3];
2737 } sensor_offset, perform_calib;
2738
2739 /* Used for MOTIONSENSE_CMD_SENSOR_SCALE */
2740 struct __ec_todo_unpacked {
2741 int16_t temp;
2742 uint16_t scale[3];
2743 } sensor_scale;
2744
2745 struct ec_response_motion_sense_fifo_info fifo_info, fifo_flush;
2746
2747 struct ec_response_motion_sense_fifo_data fifo_read;
2748
2749 struct __ec_todo_packed {
2750 uint16_t reserved;
2751 uint32_t enabled;
2752 uint32_t disabled;
2753 } list_activities;
2754
2755 /* No params for set activity */
2756
2757 /* Used for MOTIONSENSE_CMD_LID_ANGLE */
2758 struct __ec_todo_unpacked {
2759 /*
2760 * Angle between 0 and 360 degree if available,
2761 * LID_ANGLE_UNRELIABLE otherwise.
2762 */
2763 uint16_t value;
2764 } lid_angle;
2765
2766 /* Used for MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. */
2767 struct __ec_todo_unpacked {
2768 /*
2769 * Lid angle threshold for switching between tablet and
2770 * clamshell mode.
2771 */
2772 uint16_t lid_angle;
2773
2774 /* Hysteresis degree. */
2775 uint16_t hys_degree;
2776 } tablet_mode_threshold;
2777
2778 };
2779} __ec_todo_packed;
2780
2781/*****************************************************************************/
2782/* Force lid open command */
2783
2784/* Make lid event always open */
2785#define EC_CMD_FORCE_LID_OPEN 0x002C
2786
2787struct ec_params_force_lid_open {
2788 uint8_t enabled;
2789} __ec_align1;
2790
2791/*****************************************************************************/
2792/* Configure the behavior of the power button */
2793#define EC_CMD_CONFIG_POWER_BUTTON 0x002D
2794
2795enum ec_config_power_button_flags {
2796 /* Enable/Disable power button pulses for x86 devices */
2797 EC_POWER_BUTTON_ENABLE_PULSE = BIT(0),
2798};
2799
2800struct ec_params_config_power_button {
2801 /* See enum ec_config_power_button_flags */
2802 uint8_t flags;
2803} __ec_align1;
2804
2805/*****************************************************************************/
2806/* USB charging control commands */
2807
2808/* Set USB port charging mode */
2809#define EC_CMD_USB_CHARGE_SET_MODE 0x0030
2810
2811struct ec_params_usb_charge_set_mode {
2812 uint8_t usb_port_id;
2813 uint8_t mode:7;
2814 uint8_t inhibit_charge:1;
2815} __ec_align1;
2816
2817/*****************************************************************************/
2818/* Persistent storage for host */
2819
2820/* Maximum bytes that can be read/written in a single command */
2821#define EC_PSTORE_SIZE_MAX 64
2822
2823/* Get persistent storage info */
2824#define EC_CMD_PSTORE_INFO 0x0040
2825
2826struct ec_response_pstore_info {
2827 /* Persistent storage size, in bytes */
2828 uint32_t pstore_size;
2829 /* Access size; read/write offset and size must be a multiple of this */
2830 uint32_t access_size;
2831} __ec_align4;
2832
2833/*
2834 * Read persistent storage
2835 *
2836 * Response is params.size bytes of data.
2837 */
2838#define EC_CMD_PSTORE_READ 0x0041
2839
2840struct ec_params_pstore_read {
2841 uint32_t offset; /* Byte offset to read */
2842 uint32_t size; /* Size to read in bytes */
2843} __ec_align4;
2844
2845/* Write persistent storage */
2846#define EC_CMD_PSTORE_WRITE 0x0042
2847
2848struct ec_params_pstore_write {
2849 uint32_t offset; /* Byte offset to write */
2850 uint32_t size; /* Size to write in bytes */
2851 uint8_t data[EC_PSTORE_SIZE_MAX];
2852} __ec_align4;
2853
2854/*****************************************************************************/
2855/* Real-time clock */
2856
2857/* RTC params and response structures */
2858struct ec_params_rtc {
2859 uint32_t time;
2860} __ec_align4;
2861
2862struct ec_response_rtc {
2863 uint32_t time;
2864} __ec_align4;
2865
2866/* These use ec_response_rtc */
2867#define EC_CMD_RTC_GET_VALUE 0x0044
2868#define EC_CMD_RTC_GET_ALARM 0x0045
2869
2870/* These all use ec_params_rtc */
2871#define EC_CMD_RTC_SET_VALUE 0x0046
2872#define EC_CMD_RTC_SET_ALARM 0x0047
2873
2874/* Pass as time param to SET_ALARM to clear the current alarm */
2875#define EC_RTC_ALARM_CLEAR 0
2876
2877/*****************************************************************************/
2878/* Port80 log access */
2879
2880/* Maximum entries that can be read/written in a single command */
2881#define EC_PORT80_SIZE_MAX 32
2882
2883/* Get last port80 code from previous boot */
2884#define EC_CMD_PORT80_LAST_BOOT 0x0048
2885#define EC_CMD_PORT80_READ 0x0048
2886
2887enum ec_port80_subcmd {
2888 EC_PORT80_GET_INFO = 0,
2889 EC_PORT80_READ_BUFFER,
2890};
2891
2892struct ec_params_port80_read {
2893 uint16_t subcmd;
2894 union {
2895 struct __ec_todo_unpacked {
2896 uint32_t offset;
2897 uint32_t num_entries;
2898 } read_buffer;
2899 };
2900} __ec_todo_packed;
2901
2902struct ec_response_port80_read {
2903 union {
2904 struct __ec_todo_unpacked {
2905 uint32_t writes;
2906 uint32_t history_size;
2907 uint32_t last_boot;
2908 } get_info;
2909 struct __ec_todo_unpacked {
2910 uint16_t codes[EC_PORT80_SIZE_MAX];
2911 } data;
2912 };
2913} __ec_todo_packed;
2914
2915struct ec_response_port80_last_boot {
2916 uint16_t code;
2917} __ec_align2;
2918
2919/*****************************************************************************/
2920/* Temporary secure storage for host verified boot use */
2921
2922/* Number of bytes in a vstore slot */
2923#define EC_VSTORE_SLOT_SIZE 64
2924
2925/* Maximum number of vstore slots */
2926#define EC_VSTORE_SLOT_MAX 32
2927
2928/* Get persistent storage info */
2929#define EC_CMD_VSTORE_INFO 0x0049
2930struct ec_response_vstore_info {
2931 /* Indicates which slots are locked */
2932 uint32_t slot_locked;
2933 /* Total number of slots available */
2934 uint8_t slot_count;
2935} __ec_align_size1;
2936
2937/*
2938 * Read temporary secure storage
2939 *
2940 * Response is EC_VSTORE_SLOT_SIZE bytes of data.
2941 */
2942#define EC_CMD_VSTORE_READ 0x004A
2943
2944struct ec_params_vstore_read {
2945 uint8_t slot; /* Slot to read from */
2946} __ec_align1;
2947
2948struct ec_response_vstore_read {
2949 uint8_t data[EC_VSTORE_SLOT_SIZE];
2950} __ec_align1;
2951
2952/*
2953 * Write temporary secure storage and lock it.
2954 */
2955#define EC_CMD_VSTORE_WRITE 0x004B
2956
2957struct ec_params_vstore_write {
2958 uint8_t slot; /* Slot to write to */
2959 uint8_t data[EC_VSTORE_SLOT_SIZE];
2960} __ec_align1;
2961
2962/*****************************************************************************/
2963/* Thermal engine commands. Note that there are two implementations. We'll
2964 * reuse the command number, but the data and behavior is incompatible.
2965 * Version 0 is what originally shipped on Link.
2966 * Version 1 separates the CPU thermal limits from the fan control.
2967 */
2968
2969#define EC_CMD_THERMAL_SET_THRESHOLD 0x0050
2970#define EC_CMD_THERMAL_GET_THRESHOLD 0x0051
2971
2972/* The version 0 structs are opaque. You have to know what they are for
2973 * the get/set commands to make any sense.
2974 */
2975
2976/* Version 0 - set */
2977struct ec_params_thermal_set_threshold {
2978 uint8_t sensor_type;
2979 uint8_t threshold_id;
2980 uint16_t value;
2981} __ec_align2;
2982
2983/* Version 0 - get */
2984struct ec_params_thermal_get_threshold {
2985 uint8_t sensor_type;
2986 uint8_t threshold_id;
2987} __ec_align1;
2988
2989struct ec_response_thermal_get_threshold {
2990 uint16_t value;
2991} __ec_align2;
2992
2993
2994/* The version 1 structs are visible. */
2995enum ec_temp_thresholds {
2996 EC_TEMP_THRESH_WARN = 0,
2997 EC_TEMP_THRESH_HIGH,
2998 EC_TEMP_THRESH_HALT,
2999
3000 EC_TEMP_THRESH_COUNT
3001};
3002
3003/*
3004 * Thermal configuration for one temperature sensor. Temps are in degrees K.
3005 * Zero values will be silently ignored by the thermal task.
3006 *
3007 * Set 'temp_host' value allows thermal task to trigger some event with 1 degree
3008 * hysteresis.
3009 * For example,
3010 * temp_host[EC_TEMP_THRESH_HIGH] = 300 K
3011 * temp_host_release[EC_TEMP_THRESH_HIGH] = 0 K
3012 * EC will throttle ap when temperature >= 301 K, and release throttling when
3013 * temperature <= 299 K.
3014 *
3015 * Set 'temp_host_release' value allows thermal task has a custom hysteresis.
3016 * For example,
3017 * temp_host[EC_TEMP_THRESH_HIGH] = 300 K
3018 * temp_host_release[EC_TEMP_THRESH_HIGH] = 295 K
3019 * EC will throttle ap when temperature >= 301 K, and release throttling when
3020 * temperature <= 294 K.
3021 *
3022 * Note that this structure is a sub-structure of
3023 * ec_params_thermal_set_threshold_v1, but maintains its alignment there.
3024 */
3025struct ec_thermal_config {
3026 uint32_t temp_host[EC_TEMP_THRESH_COUNT]; /* levels of hotness */
3027 uint32_t temp_host_release[EC_TEMP_THRESH_COUNT]; /* release levels */
3028 uint32_t temp_fan_off; /* no active cooling needed */
3029 uint32_t temp_fan_max; /* max active cooling needed */
3030} __ec_align4;
3031
3032/* Version 1 - get config for one sensor. */
3033struct ec_params_thermal_get_threshold_v1 {
3034 uint32_t sensor_num;
3035} __ec_align4;
3036/* This returns a struct ec_thermal_config */
3037
3038/*
3039 * Version 1 - set config for one sensor.
3040 * Use read-modify-write for best results!
3041 */
3042struct ec_params_thermal_set_threshold_v1 {
3043 uint32_t sensor_num;
3044 struct ec_thermal_config cfg;
3045} __ec_align4;
3046/* This returns no data */
3047
3048/****************************************************************************/
3049
3050/* Toggle automatic fan control */
3051#define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x0052
3052
3053/* Version 1 of input params */
3054struct ec_params_auto_fan_ctrl_v1 {
3055 uint8_t fan_idx;
3056} __ec_align1;
3057
3058/* Get/Set TMP006 calibration data */
3059#define EC_CMD_TMP006_GET_CALIBRATION 0x0053
3060#define EC_CMD_TMP006_SET_CALIBRATION 0x0054
3061
3062/*
3063 * The original TMP006 calibration only needed four params, but now we need
3064 * more. Since the algorithm is nothing but magic numbers anyway, we'll leave
3065 * the params opaque. The v1 "get" response will include the algorithm number
3066 * and how many params it requires. That way we can change the EC code without
3067 * needing to update this file. We can also use a different algorithm on each
3068 * sensor.
3069 */
3070
3071/* This is the same struct for both v0 and v1. */
3072struct ec_params_tmp006_get_calibration {
3073 uint8_t index;
3074} __ec_align1;
3075
3076/* Version 0 */
3077struct ec_response_tmp006_get_calibration_v0 {
3078 float s0;
3079 float b0;
3080 float b1;
3081 float b2;
3082} __ec_align4;
3083
3084struct ec_params_tmp006_set_calibration_v0 {
3085 uint8_t index;
3086 uint8_t reserved[3];
3087 float s0;
3088 float b0;
3089 float b1;
3090 float b2;
3091} __ec_align4;
3092
3093/* Version 1 */
3094struct ec_response_tmp006_get_calibration_v1 {
3095 uint8_t algorithm;
3096 uint8_t num_params;
3097 uint8_t reserved[2];
3098 float val[];
3099} __ec_align4;
3100
3101struct ec_params_tmp006_set_calibration_v1 {
3102 uint8_t index;
3103 uint8_t algorithm;
3104 uint8_t num_params;
3105 uint8_t reserved;
3106 float val[];
3107} __ec_align4;
3108
3109
3110/* Read raw TMP006 data */
3111#define EC_CMD_TMP006_GET_RAW 0x0055
3112
3113struct ec_params_tmp006_get_raw {
3114 uint8_t index;
3115} __ec_align1;
3116
3117struct ec_response_tmp006_get_raw {
3118 int32_t t; /* In 1/100 K */
3119 int32_t v; /* In nV */
3120} __ec_align4;
3121
3122/*****************************************************************************/
3123/* MKBP - Matrix KeyBoard Protocol */
3124
3125/*
3126 * Read key state
3127 *
3128 * Returns raw data for keyboard cols; see ec_response_mkbp_info.cols for
3129 * expected response size.
3130 *
3131 * NOTE: This has been superseded by EC_CMD_MKBP_GET_NEXT_EVENT. If you wish
3132 * to obtain the instantaneous state, use EC_CMD_MKBP_INFO with the type
3133 * EC_MKBP_INFO_CURRENT and event EC_MKBP_EVENT_KEY_MATRIX.
3134 */
3135#define EC_CMD_MKBP_STATE 0x0060
3136
3137/*
3138 * Provide information about various MKBP things. See enum ec_mkbp_info_type.
3139 */
3140#define EC_CMD_MKBP_INFO 0x0061
3141
3142struct ec_response_mkbp_info {
3143 uint32_t rows;
3144 uint32_t cols;
3145 /* Formerly "switches", which was 0. */
3146 uint8_t reserved;
3147} __ec_align_size1;
3148
3149struct ec_params_mkbp_info {
3150 uint8_t info_type;
3151 uint8_t event_type;
3152} __ec_align1;
3153
3154enum ec_mkbp_info_type {
3155 /*
3156 * Info about the keyboard matrix: number of rows and columns.
3157 *
3158 * Returns struct ec_response_mkbp_info.
3159 */
3160 EC_MKBP_INFO_KBD = 0,
3161
3162 /*
3163 * For buttons and switches, info about which specifically are
3164 * supported. event_type must be set to one of the values in enum
3165 * ec_mkbp_event.
3166 *
3167 * For EC_MKBP_EVENT_BUTTON and EC_MKBP_EVENT_SWITCH, returns a 4 byte
3168 * bitmask indicating which buttons or switches are present. See the
3169 * bit inidices below.
3170 */
3171 EC_MKBP_INFO_SUPPORTED = 1,
3172
3173 /*
3174 * Instantaneous state of buttons and switches.
3175 *
3176 * event_type must be set to one of the values in enum ec_mkbp_event.
3177 *
3178 * For EC_MKBP_EVENT_KEY_MATRIX, returns uint8_t key_matrix[13]
3179 * indicating the current state of the keyboard matrix.
3180 *
3181 * For EC_MKBP_EVENT_HOST_EVENT, return uint32_t host_event, the raw
3182 * event state.
3183 *
3184 * For EC_MKBP_EVENT_BUTTON, returns uint32_t buttons, indicating the
3185 * state of supported buttons.
3186 *
3187 * For EC_MKBP_EVENT_SWITCH, returns uint32_t switches, indicating the
3188 * state of supported switches.
3189 */
3190 EC_MKBP_INFO_CURRENT = 2,
3191};
3192
3193/* Simulate key press */
3194#define EC_CMD_MKBP_SIMULATE_KEY 0x0062
3195
3196struct ec_params_mkbp_simulate_key {
3197 uint8_t col;
3198 uint8_t row;
3199 uint8_t pressed;
3200} __ec_align1;
3201
3202#define EC_CMD_GET_KEYBOARD_ID 0x0063
3203
3204struct ec_response_keyboard_id {
3205 uint32_t keyboard_id;
3206} __ec_align4;
3207
3208enum keyboard_id {
3209 KEYBOARD_ID_UNSUPPORTED = 0,
3210 KEYBOARD_ID_UNREADABLE = 0xffffffff,
3211};
3212
3213/* Configure keyboard scanning */
3214#define EC_CMD_MKBP_SET_CONFIG 0x0064
3215#define EC_CMD_MKBP_GET_CONFIG 0x0065
3216
3217/* flags */
3218enum mkbp_config_flags {
3219 EC_MKBP_FLAGS_ENABLE = 1, /* Enable keyboard scanning */
3220};
3221
3222enum mkbp_config_valid {
3223 EC_MKBP_VALID_SCAN_PERIOD = BIT(0),
3224 EC_MKBP_VALID_POLL_TIMEOUT = BIT(1),
3225 EC_MKBP_VALID_MIN_POST_SCAN_DELAY = BIT(3),
3226 EC_MKBP_VALID_OUTPUT_SETTLE = BIT(4),
3227 EC_MKBP_VALID_DEBOUNCE_DOWN = BIT(5),
3228 EC_MKBP_VALID_DEBOUNCE_UP = BIT(6),
3229 EC_MKBP_VALID_FIFO_MAX_DEPTH = BIT(7),
3230};
3231
3232/*
3233 * Configuration for our key scanning algorithm.
3234 *
3235 * Note that this is used as a sub-structure of
3236 * ec_{params/response}_mkbp_get_config.
3237 */
3238struct ec_mkbp_config {
3239 uint32_t valid_mask; /* valid fields */
3240 uint8_t flags; /* some flags (enum mkbp_config_flags) */
3241 uint8_t valid_flags; /* which flags are valid */
3242 uint16_t scan_period_us; /* period between start of scans */
3243 /* revert to interrupt mode after no activity for this long */
3244 uint32_t poll_timeout_us;
3245 /*
3246 * minimum post-scan relax time. Once we finish a scan we check
3247 * the time until we are due to start the next one. If this time is
3248 * shorter this field, we use this instead.
3249 */
3250 uint16_t min_post_scan_delay_us;
3251 /* delay between setting up output and waiting for it to settle */
3252 uint16_t output_settle_us;
3253 uint16_t debounce_down_us; /* time for debounce on key down */
3254 uint16_t debounce_up_us; /* time for debounce on key up */
3255 /* maximum depth to allow for fifo (0 = no keyscan output) */
3256 uint8_t fifo_max_depth;
3257} __ec_align_size1;
3258
3259struct ec_params_mkbp_set_config {
3260 struct ec_mkbp_config config;
3261} __ec_align_size1;
3262
3263struct ec_response_mkbp_get_config {
3264 struct ec_mkbp_config config;
3265} __ec_align_size1;
3266
3267/* Run the key scan emulation */
3268#define EC_CMD_KEYSCAN_SEQ_CTRL 0x0066
3269
3270enum ec_keyscan_seq_cmd {
3271 EC_KEYSCAN_SEQ_STATUS = 0, /* Get status information */
3272 EC_KEYSCAN_SEQ_CLEAR = 1, /* Clear sequence */
3273 EC_KEYSCAN_SEQ_ADD = 2, /* Add item to sequence */
3274 EC_KEYSCAN_SEQ_START = 3, /* Start running sequence */
3275 EC_KEYSCAN_SEQ_COLLECT = 4, /* Collect sequence summary data */
3276};
3277
3278enum ec_collect_flags {
3279 /*
3280 * Indicates this scan was processed by the EC. Due to timing, some
3281 * scans may be skipped.
3282 */
3283 EC_KEYSCAN_SEQ_FLAG_DONE = BIT(0),
3284};
3285
3286struct ec_collect_item {
3287 uint8_t flags; /* some flags (enum ec_collect_flags) */
3288} __ec_align1;
3289
3290struct ec_params_keyscan_seq_ctrl {
3291 uint8_t cmd; /* Command to send (enum ec_keyscan_seq_cmd) */
3292 union {
3293 struct __ec_align1 {
3294 uint8_t active; /* still active */
3295 uint8_t num_items; /* number of items */
3296 /* Current item being presented */
3297 uint8_t cur_item;
3298 } status;
3299 struct __ec_todo_unpacked {
3300 /*
3301 * Absolute time for this scan, measured from the
3302 * start of the sequence.
3303 */
3304 uint32_t time_us;
3305 uint8_t scan[0]; /* keyscan data */
3306 } add;
3307 struct __ec_align1 {
3308 uint8_t start_item; /* First item to return */
3309 uint8_t num_items; /* Number of items to return */
3310 } collect;
3311 };
3312} __ec_todo_packed;
3313
3314struct ec_result_keyscan_seq_ctrl {
3315 union {
3316 struct __ec_todo_unpacked {
3317 uint8_t num_items; /* Number of items */
3318 /* Data for each item */
3319 struct ec_collect_item item[0];
3320 } collect;
3321 };
3322} __ec_todo_packed;
3323
3324/*
3325 * Get the next pending MKBP event.
3326 *
3327 * Returns EC_RES_UNAVAILABLE if there is no event pending.
3328 */
3329#define EC_CMD_GET_NEXT_EVENT 0x0067
3330
3331#define EC_MKBP_HAS_MORE_EVENTS_SHIFT 7
3332
3333/*
3334 * We use the most significant bit of the event type to indicate to the host
3335 * that the EC has more MKBP events available to provide.
3336 */
3337#define EC_MKBP_HAS_MORE_EVENTS BIT(EC_MKBP_HAS_MORE_EVENTS_SHIFT)
3338
3339/* The mask to apply to get the raw event type */
3340#define EC_MKBP_EVENT_TYPE_MASK (BIT(EC_MKBP_HAS_MORE_EVENTS_SHIFT) - 1)
3341
3342enum ec_mkbp_event {
3343 /* Keyboard matrix changed. The event data is the new matrix state. */
3344 EC_MKBP_EVENT_KEY_MATRIX = 0,
3345
3346 /* New host event. The event data is 4 bytes of host event flags. */
3347 EC_MKBP_EVENT_HOST_EVENT = 1,
3348
3349 /* New Sensor FIFO data. The event data is fifo_info structure. */
3350 EC_MKBP_EVENT_SENSOR_FIFO = 2,
3351
3352 /* The state of the non-matrixed buttons have changed. */
3353 EC_MKBP_EVENT_BUTTON = 3,
3354
3355 /* The state of the switches have changed. */
3356 EC_MKBP_EVENT_SWITCH = 4,
3357
3358 /* New Fingerprint sensor event, the event data is fp_events bitmap. */
3359 EC_MKBP_EVENT_FINGERPRINT = 5,
3360
3361 /*
3362 * Sysrq event: send emulated sysrq. The event data is sysrq,
3363 * corresponding to the key to be pressed.
3364 */
3365 EC_MKBP_EVENT_SYSRQ = 6,
3366
3367 /*
3368 * New 64-bit host event.
3369 * The event data is 8 bytes of host event flags.
3370 */
3371 EC_MKBP_EVENT_HOST_EVENT64 = 7,
3372
3373 /* Notify the AP that something happened on CEC */
3374 EC_MKBP_EVENT_CEC_EVENT = 8,
3375
3376 /* Send an incoming CEC message to the AP */
3377 EC_MKBP_EVENT_CEC_MESSAGE = 9,
3378
3379 /* Number of MKBP events */
3380 EC_MKBP_EVENT_COUNT,
3381};
3382BUILD_ASSERT(EC_MKBP_EVENT_COUNT <= EC_MKBP_EVENT_TYPE_MASK);
3383
3384union __ec_align_offset1 ec_response_get_next_data {
3385 uint8_t key_matrix[13];
3386
3387 /* Unaligned */
3388 uint32_t host_event;
3389 uint64_t host_event64;
3390
3391 struct __ec_todo_unpacked {
3392 /* For aligning the fifo_info */
3393 uint8_t reserved[3];
3394 struct ec_response_motion_sense_fifo_info info;
3395 } sensor_fifo;
3396
3397 uint32_t buttons;
3398
3399 uint32_t switches;
3400
3401 uint32_t fp_events;
3402
3403 uint32_t sysrq;
3404
3405 /* CEC events from enum mkbp_cec_event */
3406 uint32_t cec_events;
3407};
3408
3409union __ec_align_offset1 ec_response_get_next_data_v1 {
3410 uint8_t key_matrix[16];
3411
3412 /* Unaligned */
3413 uint32_t host_event;
3414 uint64_t host_event64;
3415
3416 struct __ec_todo_unpacked {
3417 /* For aligning the fifo_info */
3418 uint8_t reserved[3];
3419 struct ec_response_motion_sense_fifo_info info;
3420 } sensor_fifo;
3421
3422 uint32_t buttons;
3423
3424 uint32_t switches;
3425
3426 uint32_t fp_events;
3427
3428 uint32_t sysrq;
3429
3430 /* CEC events from enum mkbp_cec_event */
3431 uint32_t cec_events;
3432
3433 uint8_t cec_message[16];
3434};
3435BUILD_ASSERT(sizeof(union ec_response_get_next_data_v1) == 16);
3436
3437struct ec_response_get_next_event {
3438 uint8_t event_type;
3439 /* Followed by event data if any */
3440 union ec_response_get_next_data data;
3441} __ec_align1;
3442
3443struct ec_response_get_next_event_v1 {
3444 uint8_t event_type;
3445 /* Followed by event data if any */
3446 union ec_response_get_next_data_v1 data;
3447} __ec_align1;
3448
3449/* Bit indices for buttons and switches.*/
3450/* Buttons */
3451#define EC_MKBP_POWER_BUTTON 0
3452#define EC_MKBP_VOL_UP 1
3453#define EC_MKBP_VOL_DOWN 2
3454#define EC_MKBP_RECOVERY 3
3455
3456/* Switches */
3457#define EC_MKBP_LID_OPEN 0
3458#define EC_MKBP_TABLET_MODE 1
3459#define EC_MKBP_BASE_ATTACHED 2
3460
3461/* Run keyboard factory test scanning */
3462#define EC_CMD_KEYBOARD_FACTORY_TEST 0x0068
3463
3464struct ec_response_keyboard_factory_test {
3465 uint16_t shorted; /* Keyboard pins are shorted */
3466} __ec_align2;
3467
3468/* Fingerprint events in 'fp_events' for EC_MKBP_EVENT_FINGERPRINT */
3469#define EC_MKBP_FP_RAW_EVENT(fp_events) ((fp_events) & 0x00FFFFFF)
3470#define EC_MKBP_FP_ERRCODE(fp_events) ((fp_events) & 0x0000000F)
3471#define EC_MKBP_FP_ENROLL_PROGRESS_OFFSET 4
3472#define EC_MKBP_FP_ENROLL_PROGRESS(fpe) (((fpe) & 0x00000FF0) \
3473 >> EC_MKBP_FP_ENROLL_PROGRESS_OFFSET)
3474#define EC_MKBP_FP_MATCH_IDX_OFFSET 12
3475#define EC_MKBP_FP_MATCH_IDX_MASK 0x0000F000
3476#define EC_MKBP_FP_MATCH_IDX(fpe) (((fpe) & EC_MKBP_FP_MATCH_IDX_MASK) \
3477 >> EC_MKBP_FP_MATCH_IDX_OFFSET)
3478#define EC_MKBP_FP_ENROLL BIT(27)
3479#define EC_MKBP_FP_MATCH BIT(28)
3480#define EC_MKBP_FP_FINGER_DOWN BIT(29)
3481#define EC_MKBP_FP_FINGER_UP BIT(30)
3482#define EC_MKBP_FP_IMAGE_READY BIT(31)
3483/* code given by EC_MKBP_FP_ERRCODE() when EC_MKBP_FP_ENROLL is set */
3484#define EC_MKBP_FP_ERR_ENROLL_OK 0
3485#define EC_MKBP_FP_ERR_ENROLL_LOW_QUALITY 1
3486#define EC_MKBP_FP_ERR_ENROLL_IMMOBILE 2
3487#define EC_MKBP_FP_ERR_ENROLL_LOW_COVERAGE 3
3488#define EC_MKBP_FP_ERR_ENROLL_INTERNAL 5
3489/* Can be used to detect if image was usable for enrollment or not. */
3490#define EC_MKBP_FP_ERR_ENROLL_PROBLEM_MASK 1
3491/* code given by EC_MKBP_FP_ERRCODE() when EC_MKBP_FP_MATCH is set */
3492#define EC_MKBP_FP_ERR_MATCH_NO 0
3493#define EC_MKBP_FP_ERR_MATCH_NO_INTERNAL 6
3494#define EC_MKBP_FP_ERR_MATCH_NO_TEMPLATES 7
3495#define EC_MKBP_FP_ERR_MATCH_NO_LOW_QUALITY 2
3496#define EC_MKBP_FP_ERR_MATCH_NO_LOW_COVERAGE 4
3497#define EC_MKBP_FP_ERR_MATCH_YES 1
3498#define EC_MKBP_FP_ERR_MATCH_YES_UPDATED 3
3499#define EC_MKBP_FP_ERR_MATCH_YES_UPDATE_FAILED 5
3500
3501
3502/*****************************************************************************/
3503/* Temperature sensor commands */
3504
3505/* Read temperature sensor info */
3506#define EC_CMD_TEMP_SENSOR_GET_INFO 0x0070
3507
3508struct ec_params_temp_sensor_get_info {
3509 uint8_t id;
3510} __ec_align1;
3511
3512struct ec_response_temp_sensor_get_info {
3513 char sensor_name[32];
3514 uint8_t sensor_type;
3515} __ec_align1;
3516
3517/*****************************************************************************/
3518
3519/*
3520 * Note: host commands 0x80 - 0x87 are reserved to avoid conflict with ACPI
3521 * commands accidentally sent to the wrong interface. See the ACPI section
3522 * below.
3523 */
3524
3525/*****************************************************************************/
3526/* Host event commands */
3527
3528
3529/* Obsolete. New implementation should use EC_CMD_HOST_EVENT instead */
3530/*
3531 * Host event mask params and response structures, shared by all of the host
3532 * event commands below.
3533 */
3534struct ec_params_host_event_mask {
3535 uint32_t mask;
3536} __ec_align4;
3537
3538struct ec_response_host_event_mask {
3539 uint32_t mask;
3540} __ec_align4;
3541
3542/* These all use ec_response_host_event_mask */
3543#define EC_CMD_HOST_EVENT_GET_B 0x0087
3544#define EC_CMD_HOST_EVENT_GET_SMI_MASK 0x0088
3545#define EC_CMD_HOST_EVENT_GET_SCI_MASK 0x0089
3546#define EC_CMD_HOST_EVENT_GET_WAKE_MASK 0x008D
3547
3548/* These all use ec_params_host_event_mask */
3549#define EC_CMD_HOST_EVENT_SET_SMI_MASK 0x008A
3550#define EC_CMD_HOST_EVENT_SET_SCI_MASK 0x008B
3551#define EC_CMD_HOST_EVENT_CLEAR 0x008C
3552#define EC_CMD_HOST_EVENT_SET_WAKE_MASK 0x008E
3553#define EC_CMD_HOST_EVENT_CLEAR_B 0x008F
3554
3555/*
3556 * Unified host event programming interface - Should be used by newer versions
3557 * of BIOS/OS to program host events and masks
3558 */
3559
3560struct ec_params_host_event {
3561
3562 /* Action requested by host - one of enum ec_host_event_action. */
3563 uint8_t action;
3564
3565 /*
3566 * Mask type that the host requested the action on - one of
3567 * enum ec_host_event_mask_type.
3568 */
3569 uint8_t mask_type;
3570
3571 /* Set to 0, ignore on read */
3572 uint16_t reserved;
3573
3574 /* Value to be used in case of set operations. */
3575 uint64_t value;
3576} __ec_align4;
3577
3578/*
3579 * Response structure returned by EC_CMD_HOST_EVENT.
3580 * Update the value on a GET request. Set to 0 on GET/CLEAR
3581 */
3582
3583struct ec_response_host_event {
3584
3585 /* Mask value in case of get operation */
3586 uint64_t value;
3587} __ec_align4;
3588
3589enum ec_host_event_action {
3590 /*
3591 * params.value is ignored. Value of mask_type populated
3592 * in response.value
3593 */
3594 EC_HOST_EVENT_GET,
3595
3596 /* Bits in params.value are set */
3597 EC_HOST_EVENT_SET,
3598
3599 /* Bits in params.value are cleared */
3600 EC_HOST_EVENT_CLEAR,
3601};
3602
3603enum ec_host_event_mask_type {
3604
3605 /* Main host event copy */
3606 EC_HOST_EVENT_MAIN,
3607
3608 /* Copy B of host events */
3609 EC_HOST_EVENT_B,
3610
3611 /* SCI Mask */
3612 EC_HOST_EVENT_SCI_MASK,
3613
3614 /* SMI Mask */
3615 EC_HOST_EVENT_SMI_MASK,
3616
3617 /* Mask of events that should be always reported in hostevents */
3618 EC_HOST_EVENT_ALWAYS_REPORT_MASK,
3619
3620 /* Active wake mask */
3621 EC_HOST_EVENT_ACTIVE_WAKE_MASK,
3622
3623 /* Lazy wake mask for S0ix */
3624 EC_HOST_EVENT_LAZY_WAKE_MASK_S0IX,
3625
3626 /* Lazy wake mask for S3 */
3627 EC_HOST_EVENT_LAZY_WAKE_MASK_S3,
3628
3629 /* Lazy wake mask for S5 */
3630 EC_HOST_EVENT_LAZY_WAKE_MASK_S5,
3631};
3632
3633#define EC_CMD_HOST_EVENT 0x00A4
3634
3635/*****************************************************************************/
3636/* Switch commands */
3637
3638/* Enable/disable LCD backlight */
3639#define EC_CMD_SWITCH_ENABLE_BKLIGHT 0x0090
3640
3641struct ec_params_switch_enable_backlight {
3642 uint8_t enabled;
3643} __ec_align1;
3644
3645/* Enable/disable WLAN/Bluetooth */
3646#define EC_CMD_SWITCH_ENABLE_WIRELESS 0x0091
3647#define EC_VER_SWITCH_ENABLE_WIRELESS 1
3648
3649/* Version 0 params; no response */
3650struct ec_params_switch_enable_wireless_v0 {
3651 uint8_t enabled;
3652} __ec_align1;
3653
3654/* Version 1 params */
3655struct ec_params_switch_enable_wireless_v1 {
3656 /* Flags to enable now */
3657 uint8_t now_flags;
3658
3659 /* Which flags to copy from now_flags */
3660 uint8_t now_mask;
3661
3662 /*
3663 * Flags to leave enabled in S3, if they're on at the S0->S3
3664 * transition. (Other flags will be disabled by the S0->S3
3665 * transition.)
3666 */
3667 uint8_t suspend_flags;
3668
3669 /* Which flags to copy from suspend_flags */
3670 uint8_t suspend_mask;
3671} __ec_align1;
3672
3673/* Version 1 response */
3674struct ec_response_switch_enable_wireless_v1 {
3675 /* Flags to enable now */
3676 uint8_t now_flags;
3677
3678 /* Flags to leave enabled in S3 */
3679 uint8_t suspend_flags;
3680} __ec_align1;
3681
3682/*****************************************************************************/
3683/* GPIO commands. Only available on EC if write protect has been disabled. */
3684
3685/* Set GPIO output value */
3686#define EC_CMD_GPIO_SET 0x0092
3687
3688struct ec_params_gpio_set {
3689 char name[32];
3690 uint8_t val;
3691} __ec_align1;
3692
3693/* Get GPIO value */
3694#define EC_CMD_GPIO_GET 0x0093
3695
3696/* Version 0 of input params and response */
3697struct ec_params_gpio_get {
3698 char name[32];
3699} __ec_align1;
3700
3701struct ec_response_gpio_get {
3702 uint8_t val;
3703} __ec_align1;
3704
3705/* Version 1 of input params and response */
3706struct ec_params_gpio_get_v1 {
3707 uint8_t subcmd;
3708 union {
3709 struct __ec_align1 {
3710 char name[32];
3711 } get_value_by_name;
3712 struct __ec_align1 {
3713 uint8_t index;
3714 } get_info;
3715 };
3716} __ec_align1;
3717
3718struct ec_response_gpio_get_v1 {
3719 union {
3720 struct __ec_align1 {
3721 uint8_t val;
3722 } get_value_by_name, get_count;
3723 struct __ec_todo_unpacked {
3724 uint8_t val;
3725 char name[32];
3726 uint32_t flags;
3727 } get_info;
3728 };
3729} __ec_todo_packed;
3730
3731enum gpio_get_subcmd {
3732 EC_GPIO_GET_BY_NAME = 0,
3733 EC_GPIO_GET_COUNT = 1,
3734 EC_GPIO_GET_INFO = 2,
3735};
3736
3737/*****************************************************************************/
3738/* I2C commands. Only available when flash write protect is unlocked. */
3739
3740/*
3741 * CAUTION: These commands are deprecated, and are not supported anymore in EC
3742 * builds >= 8398.0.0 (see crosbug.com/p/23570).
3743 *
3744 * Use EC_CMD_I2C_PASSTHRU instead.
3745 */
3746
3747/* Read I2C bus */
3748#define EC_CMD_I2C_READ 0x0094
3749
3750struct ec_params_i2c_read {
3751 uint16_t addr; /* 8-bit address (7-bit shifted << 1) */
3752 uint8_t read_size; /* Either 8 or 16. */
3753 uint8_t port;
3754 uint8_t offset;
3755} __ec_align_size1;
3756
3757struct ec_response_i2c_read {
3758 uint16_t data;
3759} __ec_align2;
3760
3761/* Write I2C bus */
3762#define EC_CMD_I2C_WRITE 0x0095
3763
3764struct ec_params_i2c_write {
3765 uint16_t data;
3766 uint16_t addr; /* 8-bit address (7-bit shifted << 1) */
3767 uint8_t write_size; /* Either 8 or 16. */
3768 uint8_t port;
3769 uint8_t offset;
3770} __ec_align_size1;
3771
3772/*****************************************************************************/
3773/* Charge state commands. Only available when flash write protect unlocked. */
3774
3775/* Force charge state machine to stop charging the battery or force it to
3776 * discharge the battery.
3777 */
3778#define EC_CMD_CHARGE_CONTROL 0x0096
3779#define EC_VER_CHARGE_CONTROL 1
3780
3781enum ec_charge_control_mode {
3782 CHARGE_CONTROL_NORMAL = 0,
3783 CHARGE_CONTROL_IDLE,
3784 CHARGE_CONTROL_DISCHARGE,
3785};
3786
3787struct ec_params_charge_control {
3788 uint32_t mode; /* enum charge_control_mode */
3789} __ec_align4;
3790
3791/*****************************************************************************/
3792
3793/* Snapshot console output buffer for use by EC_CMD_CONSOLE_READ. */
3794#define EC_CMD_CONSOLE_SNAPSHOT 0x0097
3795
3796/*
3797 * Read data from the saved snapshot. If the subcmd parameter is
3798 * CONSOLE_READ_NEXT, this will return data starting from the beginning of
3799 * the latest snapshot. If it is CONSOLE_READ_RECENT, it will start from the
3800 * end of the previous snapshot.
3801 *
3802 * The params are only looked at in version >= 1 of this command. Prior
3803 * versions will just default to CONSOLE_READ_NEXT behavior.
3804 *
3805 * Response is null-terminated string. Empty string, if there is no more
3806 * remaining output.
3807 */
3808#define EC_CMD_CONSOLE_READ 0x0098
3809
3810enum ec_console_read_subcmd {
3811 CONSOLE_READ_NEXT = 0,
3812 CONSOLE_READ_RECENT
3813};
3814
3815struct ec_params_console_read_v1 {
3816 uint8_t subcmd; /* enum ec_console_read_subcmd */
3817} __ec_align1;
3818
3819/*****************************************************************************/
3820
3821/*
3822 * Cut off battery power immediately or after the host has shut down.
3823 *
3824 * return EC_RES_INVALID_COMMAND if unsupported by a board/battery.
3825 * EC_RES_SUCCESS if the command was successful.
3826 * EC_RES_ERROR if the cut off command failed.
3827 */
3828#define EC_CMD_BATTERY_CUT_OFF 0x0099
3829
3830#define EC_BATTERY_CUTOFF_FLAG_AT_SHUTDOWN BIT(0)
3831
3832struct ec_params_battery_cutoff {
3833 uint8_t flags;
3834} __ec_align1;
3835
3836/*****************************************************************************/
3837/* USB port mux control. */
3838
3839/*
3840 * Switch USB mux or return to automatic switching.
3841 */
3842#define EC_CMD_USB_MUX 0x009A
3843
3844struct ec_params_usb_mux {
3845 uint8_t mux;
3846} __ec_align1;
3847
3848/*****************************************************************************/
3849/* LDOs / FETs control. */
3850
3851enum ec_ldo_state {
3852 EC_LDO_STATE_OFF = 0, /* the LDO / FET is shut down */
3853 EC_LDO_STATE_ON = 1, /* the LDO / FET is ON / providing power */
3854};
3855
3856/*
3857 * Switch on/off a LDO.
3858 */
3859#define EC_CMD_LDO_SET 0x009B
3860
3861struct ec_params_ldo_set {
3862 uint8_t index;
3863 uint8_t state;
3864} __ec_align1;
3865
3866/*
3867 * Get LDO state.
3868 */
3869#define EC_CMD_LDO_GET 0x009C
3870
3871struct ec_params_ldo_get {
3872 uint8_t index;
3873} __ec_align1;
3874
3875struct ec_response_ldo_get {
3876 uint8_t state;
3877} __ec_align1;
3878
3879/*****************************************************************************/
3880/* Power info. */
3881
3882/*
3883 * Get power info.
3884 */
3885#define EC_CMD_POWER_INFO 0x009D
3886
3887struct ec_response_power_info {
3888 uint32_t usb_dev_type;
3889 uint16_t voltage_ac;
3890 uint16_t voltage_system;
3891 uint16_t current_system;
3892 uint16_t usb_current_limit;
3893} __ec_align4;
3894
3895/*****************************************************************************/
3896/* I2C passthru command */
3897
3898#define EC_CMD_I2C_PASSTHRU 0x009E
3899
3900/* Read data; if not present, message is a write */
3901#define EC_I2C_FLAG_READ BIT(15)
3902
3903/* Mask for address */
3904#define EC_I2C_ADDR_MASK 0x3ff
3905
3906#define EC_I2C_STATUS_NAK BIT(0) /* Transfer was not acknowledged */
3907#define EC_I2C_STATUS_TIMEOUT BIT(1) /* Timeout during transfer */
3908
3909/* Any error */
3910#define EC_I2C_STATUS_ERROR (EC_I2C_STATUS_NAK | EC_I2C_STATUS_TIMEOUT)
3911
3912struct ec_params_i2c_passthru_msg {
3913 uint16_t addr_flags; /* I2C slave address (7 or 10 bits) and flags */
3914 uint16_t len; /* Number of bytes to read or write */
3915} __ec_align2;
3916
3917struct ec_params_i2c_passthru {
3918 uint8_t port; /* I2C port number */
3919 uint8_t num_msgs; /* Number of messages */
3920 struct ec_params_i2c_passthru_msg msg[];
3921 /* Data to write for all messages is concatenated here */
3922} __ec_align2;
3923
3924struct ec_response_i2c_passthru {
3925 uint8_t i2c_status; /* Status flags (EC_I2C_STATUS_...) */
3926 uint8_t num_msgs; /* Number of messages processed */
3927 uint8_t data[]; /* Data read by messages concatenated here */
3928} __ec_align1;
3929
3930/*****************************************************************************/
3931/* Power button hang detect */
3932
3933#define EC_CMD_HANG_DETECT 0x009F
3934
3935/* Reasons to start hang detection timer */
3936/* Power button pressed */
3937#define EC_HANG_START_ON_POWER_PRESS BIT(0)
3938
3939/* Lid closed */
3940#define EC_HANG_START_ON_LID_CLOSE BIT(1)
3941
3942 /* Lid opened */
3943#define EC_HANG_START_ON_LID_OPEN BIT(2)
3944
3945/* Start of AP S3->S0 transition (booting or resuming from suspend) */
3946#define EC_HANG_START_ON_RESUME BIT(3)
3947
3948/* Reasons to cancel hang detection */
3949
3950/* Power button released */
3951#define EC_HANG_STOP_ON_POWER_RELEASE BIT(8)
3952
3953/* Any host command from AP received */
3954#define EC_HANG_STOP_ON_HOST_COMMAND BIT(9)
3955
3956/* Stop on end of AP S0->S3 transition (suspending or shutting down) */
3957#define EC_HANG_STOP_ON_SUSPEND BIT(10)
3958
3959/*
3960 * If this flag is set, all the other fields are ignored, and the hang detect
3961 * timer is started. This provides the AP a way to start the hang timer
3962 * without reconfiguring any of the other hang detect settings. Note that
3963 * you must previously have configured the timeouts.
3964 */
3965#define EC_HANG_START_NOW BIT(30)
3966
3967/*
3968 * If this flag is set, all the other fields are ignored (including
3969 * EC_HANG_START_NOW). This provides the AP a way to stop the hang timer
3970 * without reconfiguring any of the other hang detect settings.
3971 */
3972#define EC_HANG_STOP_NOW BIT(31)
3973
3974struct ec_params_hang_detect {
3975 /* Flags; see EC_HANG_* */
3976 uint32_t flags;
3977
3978 /* Timeout in msec before generating host event, if enabled */
3979 uint16_t host_event_timeout_msec;
3980
3981 /* Timeout in msec before generating warm reboot, if enabled */
3982 uint16_t warm_reboot_timeout_msec;
3983} __ec_align4;
3984
3985/*****************************************************************************/
3986/* Commands for battery charging */
3987
3988/*
3989 * This is the single catch-all host command to exchange data regarding the
3990 * charge state machine (v2 and up).
3991 */
3992#define EC_CMD_CHARGE_STATE 0x00A0
3993
3994/* Subcommands for this host command */
3995enum charge_state_command {
3996 CHARGE_STATE_CMD_GET_STATE,
3997 CHARGE_STATE_CMD_GET_PARAM,
3998 CHARGE_STATE_CMD_SET_PARAM,
3999 CHARGE_STATE_NUM_CMDS
4000};
4001
4002/*
4003 * Known param numbers are defined here. Ranges are reserved for board-specific
4004 * params, which are handled by the particular implementations.
4005 */
4006enum charge_state_params {
4007 CS_PARAM_CHG_VOLTAGE, /* charger voltage limit */
4008 CS_PARAM_CHG_CURRENT, /* charger current limit */
4009 CS_PARAM_CHG_INPUT_CURRENT, /* charger input current limit */
4010 CS_PARAM_CHG_STATUS, /* charger-specific status */
4011 CS_PARAM_CHG_OPTION, /* charger-specific options */
4012 CS_PARAM_LIMIT_POWER, /*
4013 * Check if power is limited due to
4014 * low battery and / or a weak external
4015 * charger. READ ONLY.
4016 */
4017 /* How many so far? */
4018 CS_NUM_BASE_PARAMS,
4019
4020 /* Range for CONFIG_CHARGER_PROFILE_OVERRIDE params */
4021 CS_PARAM_CUSTOM_PROFILE_MIN = 0x10000,
4022 CS_PARAM_CUSTOM_PROFILE_MAX = 0x1ffff,
4023
4024 /* Range for CONFIG_CHARGE_STATE_DEBUG params */
4025 CS_PARAM_DEBUG_MIN = 0x20000,
4026 CS_PARAM_DEBUG_CTL_MODE = 0x20000,
4027 CS_PARAM_DEBUG_MANUAL_MODE,
4028 CS_PARAM_DEBUG_SEEMS_DEAD,
4029 CS_PARAM_DEBUG_SEEMS_DISCONNECTED,
4030 CS_PARAM_DEBUG_BATT_REMOVED,
4031 CS_PARAM_DEBUG_MANUAL_CURRENT,
4032 CS_PARAM_DEBUG_MANUAL_VOLTAGE,
4033 CS_PARAM_DEBUG_MAX = 0x2ffff,
4034
4035 /* Other custom param ranges go here... */
4036};
4037
4038struct ec_params_charge_state {
4039 uint8_t cmd; /* enum charge_state_command */
4040 union {
4041 /* get_state has no args */
4042
4043 struct __ec_todo_unpacked {
4044 uint32_t param; /* enum charge_state_param */
4045 } get_param;
4046
4047 struct __ec_todo_unpacked {
4048 uint32_t param; /* param to set */
4049 uint32_t value; /* value to set */
4050 } set_param;
4051 };
4052} __ec_todo_packed;
4053
4054struct ec_response_charge_state {
4055 union {
4056 struct __ec_align4 {
4057 int ac;
4058 int chg_voltage;
4059 int chg_current;
4060 int chg_input_current;
4061 int batt_state_of_charge;
4062 } get_state;
4063
4064 struct __ec_align4 {
4065 uint32_t value;
4066 } get_param;
4067
4068 /* set_param returns no args */
4069 };
4070} __ec_align4;
4071
4072
4073/*
4074 * Set maximum battery charging current.
4075 */
4076#define EC_CMD_CHARGE_CURRENT_LIMIT 0x00A1
4077
4078struct ec_params_current_limit {
4079 uint32_t limit; /* in mA */
4080} __ec_align4;
4081
4082/*
4083 * Set maximum external voltage / current.
4084 */
4085#define EC_CMD_EXTERNAL_POWER_LIMIT 0x00A2
4086
4087/* Command v0 is used only on Spring and is obsolete + unsupported */
4088struct ec_params_external_power_limit_v1 {
4089 uint16_t current_lim; /* in mA, or EC_POWER_LIMIT_NONE to clear limit */
4090 uint16_t voltage_lim; /* in mV, or EC_POWER_LIMIT_NONE to clear limit */
4091} __ec_align2;
4092
4093#define EC_POWER_LIMIT_NONE 0xffff
4094
4095/*
4096 * Set maximum voltage & current of a dedicated charge port
4097 */
4098#define EC_CMD_OVERRIDE_DEDICATED_CHARGER_LIMIT 0x00A3
4099
4100struct ec_params_dedicated_charger_limit {
4101 uint16_t current_lim; /* in mA */
4102 uint16_t voltage_lim; /* in mV */
4103} __ec_align2;
4104
4105/*****************************************************************************/
4106/* Hibernate/Deep Sleep Commands */
4107
4108/* Set the delay before going into hibernation. */
4109#define EC_CMD_HIBERNATION_DELAY 0x00A8
4110
4111struct ec_params_hibernation_delay {
4112 /*
4113 * Seconds to wait in G3 before hibernate. Pass in 0 to read the
4114 * current settings without changing them.
4115 */
4116 uint32_t seconds;
4117} __ec_align4;
4118
4119struct ec_response_hibernation_delay {
4120 /*
4121 * The current time in seconds in which the system has been in the G3
4122 * state. This value is reset if the EC transitions out of G3.
4123 */
4124 uint32_t time_g3;
4125
4126 /*
4127 * The current time remaining in seconds until the EC should hibernate.
4128 * This value is also reset if the EC transitions out of G3.
4129 */
4130 uint32_t time_remaining;
4131
4132 /*
4133 * The current time in seconds that the EC should wait in G3 before
4134 * hibernating.
4135 */
4136 uint32_t hibernate_delay;
4137} __ec_align4;
4138
4139/* Inform the EC when entering a sleep state */
4140#define EC_CMD_HOST_SLEEP_EVENT 0x00A9
4141
4142enum host_sleep_event {
4143 HOST_SLEEP_EVENT_S3_SUSPEND = 1,
4144 HOST_SLEEP_EVENT_S3_RESUME = 2,
4145 HOST_SLEEP_EVENT_S0IX_SUSPEND = 3,
4146 HOST_SLEEP_EVENT_S0IX_RESUME = 4,
4147 /* S3 suspend with additional enabled wake sources */
4148 HOST_SLEEP_EVENT_S3_WAKEABLE_SUSPEND = 5,
4149};
4150
4151struct ec_params_host_sleep_event {
4152 uint8_t sleep_event;
4153} __ec_align1;
4154
4155/*
4156 * Use a default timeout value (CONFIG_SLEEP_TIMEOUT_MS) for detecting sleep
4157 * transition failures
4158 */
4159#define EC_HOST_SLEEP_TIMEOUT_DEFAULT 0
4160
4161/* Disable timeout detection for this sleep transition */
4162#define EC_HOST_SLEEP_TIMEOUT_INFINITE 0xFFFF
4163
4164struct ec_params_host_sleep_event_v1 {
4165 /* The type of sleep being entered or exited. */
4166 uint8_t sleep_event;
4167
4168 /* Padding */
4169 uint8_t reserved;
4170 union {
4171 /* Parameters that apply for suspend messages. */
4172 struct {
4173 /*
4174 * The timeout in milliseconds between when this message
4175 * is received and when the EC will declare sleep
4176 * transition failure if the sleep signal is not
4177 * asserted.
4178 */
4179 uint16_t sleep_timeout_ms;
4180 } suspend_params;
4181
4182 /* No parameters for non-suspend messages. */
4183 };
4184} __ec_align2;
4185
4186/* A timeout occurred when this bit is set */
4187#define EC_HOST_RESUME_SLEEP_TIMEOUT 0x80000000
4188
4189/*
4190 * The mask defining which bits correspond to the number of sleep transitions,
4191 * as well as the maximum number of suspend line transitions that will be
4192 * reported back to the host.
4193 */
4194#define EC_HOST_RESUME_SLEEP_TRANSITIONS_MASK 0x7FFFFFFF
4195
4196struct ec_response_host_sleep_event_v1 {
4197 union {
4198 /* Response fields that apply for resume messages. */
4199 struct {
4200 /*
4201 * The number of sleep power signal transitions that
4202 * occurred since the suspend message. The high bit
4203 * indicates a timeout occurred.
4204 */
4205 uint32_t sleep_transitions;
4206 } resume_response;
4207
4208 /* No response fields for non-resume messages. */
4209 };
4210} __ec_align4;
4211
4212/*****************************************************************************/
4213/* Device events */
4214#define EC_CMD_DEVICE_EVENT 0x00AA
4215
4216enum ec_device_event {
4217 EC_DEVICE_EVENT_TRACKPAD,
4218 EC_DEVICE_EVENT_DSP,
4219 EC_DEVICE_EVENT_WIFI,
4220};
4221
4222enum ec_device_event_param {
4223 /* Get and clear pending device events */
4224 EC_DEVICE_EVENT_PARAM_GET_CURRENT_EVENTS,
4225 /* Get device event mask */
4226 EC_DEVICE_EVENT_PARAM_GET_ENABLED_EVENTS,
4227 /* Set device event mask */
4228 EC_DEVICE_EVENT_PARAM_SET_ENABLED_EVENTS,
4229};
4230
4231#define EC_DEVICE_EVENT_MASK(event_code) BIT(event_code % 32)
4232
4233struct ec_params_device_event {
4234 uint32_t event_mask;
4235 uint8_t param;
4236} __ec_align_size1;
4237
4238struct ec_response_device_event {
4239 uint32_t event_mask;
4240} __ec_align4;
4241
4242/*****************************************************************************/
4243/* Smart battery pass-through */
4244
4245/* Get / Set 16-bit smart battery registers */
4246#define EC_CMD_SB_READ_WORD 0x00B0
4247#define EC_CMD_SB_WRITE_WORD 0x00B1
4248
4249/* Get / Set string smart battery parameters
4250 * formatted as SMBUS "block".
4251 */
4252#define EC_CMD_SB_READ_BLOCK 0x00B2
4253#define EC_CMD_SB_WRITE_BLOCK 0x00B3
4254
4255struct ec_params_sb_rd {
4256 uint8_t reg;
4257} __ec_align1;
4258
4259struct ec_response_sb_rd_word {
4260 uint16_t value;
4261} __ec_align2;
4262
4263struct ec_params_sb_wr_word {
4264 uint8_t reg;
4265 uint16_t value;
4266} __ec_align1;
4267
4268struct ec_response_sb_rd_block {
4269 uint8_t data[32];
4270} __ec_align1;
4271
4272struct ec_params_sb_wr_block {
4273 uint8_t reg;
4274 uint16_t data[32];
4275} __ec_align1;
4276
4277/*****************************************************************************/
4278/* Battery vendor parameters
4279 *
4280 * Get or set vendor-specific parameters in the battery. Implementations may
4281 * differ between boards or batteries. On a set operation, the response
4282 * contains the actual value set, which may be rounded or clipped from the
4283 * requested value.
4284 */
4285
4286#define EC_CMD_BATTERY_VENDOR_PARAM 0x00B4
4287
4288enum ec_battery_vendor_param_mode {
4289 BATTERY_VENDOR_PARAM_MODE_GET = 0,
4290 BATTERY_VENDOR_PARAM_MODE_SET,
4291};
4292
4293struct ec_params_battery_vendor_param {
4294 uint32_t param;
4295 uint32_t value;
4296 uint8_t mode;
4297} __ec_align_size1;
4298
4299struct ec_response_battery_vendor_param {
4300 uint32_t value;
4301} __ec_align4;
4302
4303/*****************************************************************************/
4304/*
4305 * Smart Battery Firmware Update Commands
4306 */
4307#define EC_CMD_SB_FW_UPDATE 0x00B5
4308
4309enum ec_sb_fw_update_subcmd {
4310 EC_SB_FW_UPDATE_PREPARE = 0x0,
4311 EC_SB_FW_UPDATE_INFO = 0x1, /*query sb info */
4312 EC_SB_FW_UPDATE_BEGIN = 0x2, /*check if protected */
4313 EC_SB_FW_UPDATE_WRITE = 0x3, /*check if protected */
4314 EC_SB_FW_UPDATE_END = 0x4,
4315 EC_SB_FW_UPDATE_STATUS = 0x5,
4316 EC_SB_FW_UPDATE_PROTECT = 0x6,
4317 EC_SB_FW_UPDATE_MAX = 0x7,
4318};
4319
4320#define SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE 32
4321#define SB_FW_UPDATE_CMD_STATUS_SIZE 2
4322#define SB_FW_UPDATE_CMD_INFO_SIZE 8
4323
4324struct ec_sb_fw_update_header {
4325 uint16_t subcmd; /* enum ec_sb_fw_update_subcmd */
4326 uint16_t fw_id; /* firmware id */
4327} __ec_align4;
4328
4329struct ec_params_sb_fw_update {
4330 struct ec_sb_fw_update_header hdr;
4331 union {
4332 /* EC_SB_FW_UPDATE_PREPARE = 0x0 */
4333 /* EC_SB_FW_UPDATE_INFO = 0x1 */
4334 /* EC_SB_FW_UPDATE_BEGIN = 0x2 */
4335 /* EC_SB_FW_UPDATE_END = 0x4 */
4336 /* EC_SB_FW_UPDATE_STATUS = 0x5 */
4337 /* EC_SB_FW_UPDATE_PROTECT = 0x6 */
4338 /* Those have no args */
4339
4340 /* EC_SB_FW_UPDATE_WRITE = 0x3 */
4341 struct __ec_align4 {
4342 uint8_t data[SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE];
4343 } write;
4344 };
4345} __ec_align4;
4346
4347struct ec_response_sb_fw_update {
4348 union {
4349 /* EC_SB_FW_UPDATE_INFO = 0x1 */
4350 struct __ec_align1 {
4351 uint8_t data[SB_FW_UPDATE_CMD_INFO_SIZE];
4352 } info;
4353
4354 /* EC_SB_FW_UPDATE_STATUS = 0x5 */
4355 struct __ec_align1 {
4356 uint8_t data[SB_FW_UPDATE_CMD_STATUS_SIZE];
4357 } status;
4358 };
4359} __ec_align1;
4360
4361/*
4362 * Entering Verified Boot Mode Command
4363 * Default mode is VBOOT_MODE_NORMAL if EC did not receive this command.
4364 * Valid Modes are: normal, developer, and recovery.
4365 */
4366#define EC_CMD_ENTERING_MODE 0x00B6
4367
4368struct ec_params_entering_mode {
4369 int vboot_mode;
4370} __ec_align4;
4371
4372#define VBOOT_MODE_NORMAL 0
4373#define VBOOT_MODE_DEVELOPER 1
4374#define VBOOT_MODE_RECOVERY 2
4375
4376/*****************************************************************************/
4377/*
4378 * I2C passthru protection command: Protects I2C tunnels against access on
4379 * certain addresses (board-specific).
4380 */
4381#define EC_CMD_I2C_PASSTHRU_PROTECT 0x00B7
4382
4383enum ec_i2c_passthru_protect_subcmd {
4384 EC_CMD_I2C_PASSTHRU_PROTECT_STATUS = 0x0,
4385 EC_CMD_I2C_PASSTHRU_PROTECT_ENABLE = 0x1,
4386};
4387
4388struct ec_params_i2c_passthru_protect {
4389 uint8_t subcmd;
4390 uint8_t port; /* I2C port number */
4391} __ec_align1;
4392
4393struct ec_response_i2c_passthru_protect {
4394 uint8_t status; /* Status flags (0: unlocked, 1: locked) */
4395} __ec_align1;
4396
4397
4398/*****************************************************************************/
4399/*
4400 * HDMI CEC commands
4401 *
4402 * These commands are for sending and receiving message via HDMI CEC
4403 */
4404
4405#define MAX_CEC_MSG_LEN 16
4406
4407/* CEC message from the AP to be written on the CEC bus */
4408#define EC_CMD_CEC_WRITE_MSG 0x00B8
4409
4410/**
4411 * struct ec_params_cec_write - Message to write to the CEC bus
4412 * @msg: message content to write to the CEC bus
4413 */
4414struct ec_params_cec_write {
4415 uint8_t msg[MAX_CEC_MSG_LEN];
4416} __ec_align1;
4417
4418/* Set various CEC parameters */
4419#define EC_CMD_CEC_SET 0x00BA
4420
4421/**
4422 * struct ec_params_cec_set - CEC parameters set
4423 * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS
4424 * @val: in case cmd is CEC_CMD_ENABLE, this field can be 0 to disable CEC
4425 * or 1 to enable CEC functionality, in case cmd is
4426 * CEC_CMD_LOGICAL_ADDRESS, this field encodes the requested logical
4427 * address between 0 and 15 or 0xff to unregister
4428 */
4429struct ec_params_cec_set {
4430 uint8_t cmd; /* enum cec_command */
4431 uint8_t val;
4432} __ec_align1;
4433
4434/* Read various CEC parameters */
4435#define EC_CMD_CEC_GET 0x00BB
4436
4437/**
4438 * struct ec_params_cec_get - CEC parameters get
4439 * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS
4440 */
4441struct ec_params_cec_get {
4442 uint8_t cmd; /* enum cec_command */
4443} __ec_align1;
4444
4445/**
4446 * struct ec_response_cec_get - CEC parameters get response
4447 * @val: in case cmd was CEC_CMD_ENABLE, this field will 0 if CEC is
4448 * disabled or 1 if CEC functionality is enabled,
4449 * in case cmd was CEC_CMD_LOGICAL_ADDRESS, this will encode the
4450 * configured logical address between 0 and 15 or 0xff if unregistered
4451 */
4452struct ec_response_cec_get {
4453 uint8_t val;
4454} __ec_align1;
4455
4456/* CEC parameters command */
4457enum cec_command {
4458 /* CEC reading, writing and events enable */
4459 CEC_CMD_ENABLE,
4460 /* CEC logical address */
4461 CEC_CMD_LOGICAL_ADDRESS,
4462};
4463
4464/* Events from CEC to AP */
4465enum mkbp_cec_event {
4466 /* Outgoing message was acknowledged by a follower */
4467 EC_MKBP_CEC_SEND_OK = BIT(0),
4468 /* Outgoing message was not acknowledged */
4469 EC_MKBP_CEC_SEND_FAILED = BIT(1),
4470};
4471
4472/*****************************************************************************/
4473
4474/* Commands for audio codec. */
4475#define EC_CMD_EC_CODEC 0x00BC
4476
4477enum ec_codec_subcmd {
4478 EC_CODEC_GET_CAPABILITIES = 0x0,
4479 EC_CODEC_GET_SHM_ADDR = 0x1,
4480 EC_CODEC_SET_SHM_ADDR = 0x2,
4481 EC_CODEC_SUBCMD_COUNT,
4482};
4483
4484enum ec_codec_cap {
4485 EC_CODEC_CAP_WOV_AUDIO_SHM = 0,
4486 EC_CODEC_CAP_WOV_LANG_SHM = 1,
4487 EC_CODEC_CAP_LAST = 32,
4488};
4489
4490enum ec_codec_shm_id {
4491 EC_CODEC_SHM_ID_WOV_AUDIO = 0x0,
4492 EC_CODEC_SHM_ID_WOV_LANG = 0x1,
4493 EC_CODEC_SHM_ID_LAST,
4494};
4495
4496enum ec_codec_shm_type {
4497 EC_CODEC_SHM_TYPE_EC_RAM = 0x0,
4498 EC_CODEC_SHM_TYPE_SYSTEM_RAM = 0x1,
4499};
4500
4501struct __ec_align1 ec_param_ec_codec_get_shm_addr {
4502 uint8_t shm_id;
4503 uint8_t reserved[3];
4504};
4505
4506struct __ec_align4 ec_param_ec_codec_set_shm_addr {
4507 uint64_t phys_addr;
4508 uint32_t len;
4509 uint8_t shm_id;
4510 uint8_t reserved[3];
4511};
4512
4513struct __ec_align4 ec_param_ec_codec {
4514 uint8_t cmd; /* enum ec_codec_subcmd */
4515 uint8_t reserved[3];
4516
4517 union {
4518 struct ec_param_ec_codec_get_shm_addr
4519 get_shm_addr_param;
4520 struct ec_param_ec_codec_set_shm_addr
4521 set_shm_addr_param;
4522 };
4523};
4524
4525struct __ec_align4 ec_response_ec_codec_get_capabilities {
4526 uint32_t capabilities;
4527};
4528
4529struct __ec_align4 ec_response_ec_codec_get_shm_addr {
4530 uint64_t phys_addr;
4531 uint32_t len;
4532 uint8_t type;
4533 uint8_t reserved[3];
4534};
4535
4536/*****************************************************************************/
4537
4538/* Commands for DMIC on audio codec. */
4539#define EC_CMD_EC_CODEC_DMIC 0x00BD
4540
4541enum ec_codec_dmic_subcmd {
4542 EC_CODEC_DMIC_GET_MAX_GAIN = 0x0,
4543 EC_CODEC_DMIC_SET_GAIN_IDX = 0x1,
4544 EC_CODEC_DMIC_GET_GAIN_IDX = 0x2,
4545 EC_CODEC_DMIC_SUBCMD_COUNT,
4546};
4547
4548enum ec_codec_dmic_channel {
4549 EC_CODEC_DMIC_CHANNEL_0 = 0x0,
4550 EC_CODEC_DMIC_CHANNEL_1 = 0x1,
4551 EC_CODEC_DMIC_CHANNEL_2 = 0x2,
4552 EC_CODEC_DMIC_CHANNEL_3 = 0x3,
4553 EC_CODEC_DMIC_CHANNEL_4 = 0x4,
4554 EC_CODEC_DMIC_CHANNEL_5 = 0x5,
4555 EC_CODEC_DMIC_CHANNEL_6 = 0x6,
4556 EC_CODEC_DMIC_CHANNEL_7 = 0x7,
4557 EC_CODEC_DMIC_CHANNEL_COUNT,
4558};
4559
4560struct __ec_align1 ec_param_ec_codec_dmic_set_gain_idx {
4561 uint8_t channel; /* enum ec_codec_dmic_channel */
4562 uint8_t gain;
4563 uint8_t reserved[2];
4564};
4565
4566struct __ec_align1 ec_param_ec_codec_dmic_get_gain_idx {
4567 uint8_t channel; /* enum ec_codec_dmic_channel */
4568 uint8_t reserved[3];
4569};
4570
4571struct __ec_align4 ec_param_ec_codec_dmic {
4572 uint8_t cmd; /* enum ec_codec_dmic_subcmd */
4573 uint8_t reserved[3];
4574
4575 union {
4576 struct ec_param_ec_codec_dmic_set_gain_idx
4577 set_gain_idx_param;
4578 struct ec_param_ec_codec_dmic_get_gain_idx
4579 get_gain_idx_param;
4580 };
4581};
4582
4583struct __ec_align1 ec_response_ec_codec_dmic_get_max_gain {
4584 uint8_t max_gain;
4585};
4586
4587struct __ec_align1 ec_response_ec_codec_dmic_get_gain_idx {
4588 uint8_t gain;
4589};
4590
4591/*****************************************************************************/
4592
4593/* Commands for I2S RX on audio codec. */
4594
4595#define EC_CMD_EC_CODEC_I2S_RX 0x00BE
4596
4597enum ec_codec_i2s_rx_subcmd {
4598 EC_CODEC_I2S_RX_ENABLE = 0x0,
4599 EC_CODEC_I2S_RX_DISABLE = 0x1,
4600 EC_CODEC_I2S_RX_SET_SAMPLE_DEPTH = 0x2,
4601 EC_CODEC_I2S_RX_SET_DAIFMT = 0x3,
4602 EC_CODEC_I2S_RX_SET_BCLK = 0x4,
4603 EC_CODEC_I2S_RX_SUBCMD_COUNT,
4604};
4605
4606enum ec_codec_i2s_rx_sample_depth {
4607 EC_CODEC_I2S_RX_SAMPLE_DEPTH_16 = 0x0,
4608 EC_CODEC_I2S_RX_SAMPLE_DEPTH_24 = 0x1,
4609 EC_CODEC_I2S_RX_SAMPLE_DEPTH_COUNT,
4610};
4611
4612enum ec_codec_i2s_rx_daifmt {
4613 EC_CODEC_I2S_RX_DAIFMT_I2S = 0x0,
4614 EC_CODEC_I2S_RX_DAIFMT_RIGHT_J = 0x1,
4615 EC_CODEC_I2S_RX_DAIFMT_LEFT_J = 0x2,
4616 EC_CODEC_I2S_RX_DAIFMT_COUNT,
4617};
4618
4619struct __ec_align1 ec_param_ec_codec_i2s_rx_set_sample_depth {
4620 uint8_t depth;
4621 uint8_t reserved[3];
4622};
4623
4624struct __ec_align1 ec_param_ec_codec_i2s_rx_set_gain {
4625 uint8_t left;
4626 uint8_t right;
4627 uint8_t reserved[2];
4628};
4629
4630struct __ec_align1 ec_param_ec_codec_i2s_rx_set_daifmt {
4631 uint8_t daifmt;
4632 uint8_t reserved[3];
4633};
4634
4635struct __ec_align4 ec_param_ec_codec_i2s_rx_set_bclk {
4636 uint32_t bclk;
4637};
4638
4639struct __ec_align4 ec_param_ec_codec_i2s_rx {
4640 uint8_t cmd; /* enum ec_codec_i2s_rx_subcmd */
4641 uint8_t reserved[3];
4642
4643 union {
4644 struct ec_param_ec_codec_i2s_rx_set_sample_depth
4645 set_sample_depth_param;
4646 struct ec_param_ec_codec_i2s_rx_set_daifmt
4647 set_daifmt_param;
4648 struct ec_param_ec_codec_i2s_rx_set_bclk
4649 set_bclk_param;
4650 };
4651};
4652
4653/*****************************************************************************/
4654/* Commands for WoV on audio codec. */
4655
4656#define EC_CMD_EC_CODEC_WOV 0x00BF
4657
4658enum ec_codec_wov_subcmd {
4659 EC_CODEC_WOV_SET_LANG = 0x0,
4660 EC_CODEC_WOV_SET_LANG_SHM = 0x1,
4661 EC_CODEC_WOV_GET_LANG = 0x2,
4662 EC_CODEC_WOV_ENABLE = 0x3,
4663 EC_CODEC_WOV_DISABLE = 0x4,
4664 EC_CODEC_WOV_READ_AUDIO = 0x5,
4665 EC_CODEC_WOV_READ_AUDIO_SHM = 0x6,
4666 EC_CODEC_WOV_SUBCMD_COUNT,
4667};
4668
4669/*
4670 * @hash is SHA256 of the whole language model.
4671 * @total_len indicates the length of whole language model.
4672 * @offset is the cursor from the beginning of the model.
4673 * @buf is the packet buffer.
4674 * @len denotes how many bytes in the buf.
4675 */
4676struct __ec_align4 ec_param_ec_codec_wov_set_lang {
4677 uint8_t hash[32];
4678 uint32_t total_len;
4679 uint32_t offset;
4680 uint8_t buf[128];
4681 uint32_t len;
4682};
4683
4684struct __ec_align4 ec_param_ec_codec_wov_set_lang_shm {
4685 uint8_t hash[32];
4686 uint32_t total_len;
4687};
4688
4689struct __ec_align4 ec_param_ec_codec_wov {
4690 uint8_t cmd; /* enum ec_codec_wov_subcmd */
4691 uint8_t reserved[3];
4692
4693 union {
4694 struct ec_param_ec_codec_wov_set_lang
4695 set_lang_param;
4696 struct ec_param_ec_codec_wov_set_lang_shm
4697 set_lang_shm_param;
4698 };
4699};
4700
4701struct __ec_align4 ec_response_ec_codec_wov_get_lang {
4702 uint8_t hash[32];
4703};
4704
4705struct __ec_align4 ec_response_ec_codec_wov_read_audio {
4706 uint8_t buf[128];
4707 uint32_t len;
4708};
4709
4710struct __ec_align4 ec_response_ec_codec_wov_read_audio_shm {
4711 uint32_t offset;
4712 uint32_t len;
4713};
4714
4715/*****************************************************************************/
4716/* System commands */
4717
4718/*
4719 * TODO(crosbug.com/p/23747): This is a confusing name, since it doesn't
4720 * necessarily reboot the EC. Rename to "image" or something similar?
4721 */
4722#define EC_CMD_REBOOT_EC 0x00D2
4723
4724/* Command */
4725enum ec_reboot_cmd {
4726 EC_REBOOT_CANCEL = 0, /* Cancel a pending reboot */
4727 EC_REBOOT_JUMP_RO = 1, /* Jump to RO without rebooting */
4728 EC_REBOOT_JUMP_RW = 2, /* Jump to active RW without rebooting */
4729 /* (command 3 was jump to RW-B) */
4730 EC_REBOOT_COLD = 4, /* Cold-reboot */
4731 EC_REBOOT_DISABLE_JUMP = 5, /* Disable jump until next reboot */
4732 EC_REBOOT_HIBERNATE = 6, /* Hibernate EC */
4733 EC_REBOOT_HIBERNATE_CLEAR_AP_OFF = 7, /* and clears AP_OFF flag */
4734};
4735
4736/* Flags for ec_params_reboot_ec.reboot_flags */
4737#define EC_REBOOT_FLAG_RESERVED0 BIT(0) /* Was recovery request */
4738#define EC_REBOOT_FLAG_ON_AP_SHUTDOWN BIT(1) /* Reboot after AP shutdown */
4739#define EC_REBOOT_FLAG_SWITCH_RW_SLOT BIT(2) /* Switch RW slot */
4740
4741struct ec_params_reboot_ec {
4742 uint8_t cmd; /* enum ec_reboot_cmd */
4743 uint8_t flags; /* See EC_REBOOT_FLAG_* */
4744} __ec_align1;
4745
4746/*
4747 * Get information on last EC panic.
4748 *
4749 * Returns variable-length platform-dependent panic information. See panic.h
4750 * for details.
4751 */
4752#define EC_CMD_GET_PANIC_INFO 0x00D3
4753
4754/*****************************************************************************/
4755/*
4756 * Special commands
4757 *
4758 * These do not follow the normal rules for commands. See each command for
4759 * details.
4760 */
4761
4762/*
4763 * Reboot NOW
4764 *
4765 * This command will work even when the EC LPC interface is busy, because the
4766 * reboot command is processed at interrupt level. Note that when the EC
4767 * reboots, the host will reboot too, so there is no response to this command.
4768 *
4769 * Use EC_CMD_REBOOT_EC to reboot the EC more politely.
4770 */
4771#define EC_CMD_REBOOT 0x00D1 /* Think "die" */
4772
4773/*
4774 * Resend last response (not supported on LPC).
4775 *
4776 * Returns EC_RES_UNAVAILABLE if there is no response available - for example,
4777 * there was no previous command, or the previous command's response was too
4778 * big to save.
4779 */
4780#define EC_CMD_RESEND_RESPONSE 0x00DB
4781
4782/*
4783 * This header byte on a command indicate version 0. Any header byte less
4784 * than this means that we are talking to an old EC which doesn't support
4785 * versioning. In that case, we assume version 0.
4786 *
4787 * Header bytes greater than this indicate a later version. For example,
4788 * EC_CMD_VERSION0 + 1 means we are using version 1.
4789 *
4790 * The old EC interface must not use commands 0xdc or higher.
4791 */
4792#define EC_CMD_VERSION0 0x00DC
4793
4794/*****************************************************************************/
4795/*
4796 * PD commands
4797 *
4798 * These commands are for PD MCU communication.
4799 */
4800
4801/* EC to PD MCU exchange status command */
4802#define EC_CMD_PD_EXCHANGE_STATUS 0x0100
4803#define EC_VER_PD_EXCHANGE_STATUS 2
4804
4805enum pd_charge_state {
4806 PD_CHARGE_NO_CHANGE = 0, /* Don't change charge state */
4807 PD_CHARGE_NONE, /* No charging allowed */
4808 PD_CHARGE_5V, /* 5V charging only */
4809 PD_CHARGE_MAX /* Charge at max voltage */
4810};
4811
4812/* Status of EC being sent to PD */
4813#define EC_STATUS_HIBERNATING BIT(0)
4814
4815struct ec_params_pd_status {
4816 uint8_t status; /* EC status */
4817 int8_t batt_soc; /* battery state of charge */
4818 uint8_t charge_state; /* charging state (from enum pd_charge_state) */
4819} __ec_align1;
4820
4821/* Status of PD being sent back to EC */
4822#define PD_STATUS_HOST_EVENT BIT(0) /* Forward host event to AP */
4823#define PD_STATUS_IN_RW BIT(1) /* Running RW image */
4824#define PD_STATUS_JUMPED_TO_IMAGE BIT(2) /* Current image was jumped to */
4825#define PD_STATUS_TCPC_ALERT_0 BIT(3) /* Alert active in port 0 TCPC */
4826#define PD_STATUS_TCPC_ALERT_1 BIT(4) /* Alert active in port 1 TCPC */
4827#define PD_STATUS_TCPC_ALERT_2 BIT(5) /* Alert active in port 2 TCPC */
4828#define PD_STATUS_TCPC_ALERT_3 BIT(6) /* Alert active in port 3 TCPC */
4829#define PD_STATUS_EC_INT_ACTIVE (PD_STATUS_TCPC_ALERT_0 | \
4830 PD_STATUS_TCPC_ALERT_1 | \
4831 PD_STATUS_HOST_EVENT)
4832struct ec_response_pd_status {
4833 uint32_t curr_lim_ma; /* input current limit */
4834 uint16_t status; /* PD MCU status */
4835 int8_t active_charge_port; /* active charging port */
4836} __ec_align_size1;
4837
4838/* AP to PD MCU host event status command, cleared on read */
4839#define EC_CMD_PD_HOST_EVENT_STATUS 0x0104
4840
4841/* PD MCU host event status bits */
4842#define PD_EVENT_UPDATE_DEVICE BIT(0)
4843#define PD_EVENT_POWER_CHANGE BIT(1)
4844#define PD_EVENT_IDENTITY_RECEIVED BIT(2)
4845#define PD_EVENT_DATA_SWAP BIT(3)
4846struct ec_response_host_event_status {
4847 uint32_t status; /* PD MCU host event status */
4848} __ec_align4;
4849
4850/* Set USB type-C port role and muxes */
4851#define EC_CMD_USB_PD_CONTROL 0x0101
4852
4853enum usb_pd_control_role {
4854 USB_PD_CTRL_ROLE_NO_CHANGE = 0,
4855 USB_PD_CTRL_ROLE_TOGGLE_ON = 1, /* == AUTO */
4856 USB_PD_CTRL_ROLE_TOGGLE_OFF = 2,
4857 USB_PD_CTRL_ROLE_FORCE_SINK = 3,
4858 USB_PD_CTRL_ROLE_FORCE_SOURCE = 4,
4859 USB_PD_CTRL_ROLE_FREEZE = 5,
4860 USB_PD_CTRL_ROLE_COUNT
4861};
4862
4863enum usb_pd_control_mux {
4864 USB_PD_CTRL_MUX_NO_CHANGE = 0,
4865 USB_PD_CTRL_MUX_NONE = 1,
4866 USB_PD_CTRL_MUX_USB = 2,
4867 USB_PD_CTRL_MUX_DP = 3,
4868 USB_PD_CTRL_MUX_DOCK = 4,
4869 USB_PD_CTRL_MUX_AUTO = 5,
4870 USB_PD_CTRL_MUX_COUNT
4871};
4872
4873enum usb_pd_control_swap {
4874 USB_PD_CTRL_SWAP_NONE = 0,
4875 USB_PD_CTRL_SWAP_DATA = 1,
4876 USB_PD_CTRL_SWAP_POWER = 2,
4877 USB_PD_CTRL_SWAP_VCONN = 3,
4878 USB_PD_CTRL_SWAP_COUNT
4879};
4880
4881struct ec_params_usb_pd_control {
4882 uint8_t port;
4883 uint8_t role;
4884 uint8_t mux;
4885 uint8_t swap;
4886} __ec_align1;
4887
4888#define PD_CTRL_RESP_ENABLED_COMMS BIT(0) /* Communication enabled */
4889#define PD_CTRL_RESP_ENABLED_CONNECTED BIT(1) /* Device connected */
4890#define PD_CTRL_RESP_ENABLED_PD_CAPABLE BIT(2) /* Partner is PD capable */
4891
4892#define PD_CTRL_RESP_ROLE_POWER BIT(0) /* 0=SNK/1=SRC */
4893#define PD_CTRL_RESP_ROLE_DATA BIT(1) /* 0=UFP/1=DFP */
4894#define PD_CTRL_RESP_ROLE_VCONN BIT(2) /* Vconn status */
4895#define PD_CTRL_RESP_ROLE_DR_POWER BIT(3) /* Partner is dualrole power */
4896#define PD_CTRL_RESP_ROLE_DR_DATA BIT(4) /* Partner is dualrole data */
4897#define PD_CTRL_RESP_ROLE_USB_COMM BIT(5) /* Partner USB comm capable */
4898#define PD_CTRL_RESP_ROLE_EXT_POWERED BIT(6) /* Partner externally powerd */
4899
4900struct ec_response_usb_pd_control {
4901 uint8_t enabled;
4902 uint8_t role;
4903 uint8_t polarity;
4904 uint8_t state;
4905} __ec_align1;
4906
4907struct ec_response_usb_pd_control_v1 {
4908 uint8_t enabled;
4909 uint8_t role;
4910 uint8_t polarity;
4911 char state[32];
4912} __ec_align1;
4913
4914/* Values representing usbc PD CC state */
4915#define USBC_PD_CC_NONE 0 /* No accessory connected */
4916#define USBC_PD_CC_NO_UFP 1 /* No UFP accessory connected */
4917#define USBC_PD_CC_AUDIO_ACC 2 /* Audio accessory connected */
4918#define USBC_PD_CC_DEBUG_ACC 3 /* Debug accessory connected */
4919#define USBC_PD_CC_UFP_ATTACHED 4 /* UFP attached to usbc */
4920#define USBC_PD_CC_DFP_ATTACHED 5 /* DPF attached to usbc */
4921
4922/* Active/Passive Cable */
4923#define USB_PD_CTRL_ACTIVE_CABLE BIT(0)
4924/* Optical/Non-optical cable */
4925#define USB_PD_CTRL_OPTICAL_CABLE BIT(1)
4926/* 3rd Gen TBT device (or AMA)/2nd gen tbt Adapter */
4927#define USB_PD_CTRL_TBT_LEGACY_ADAPTER BIT(2)
4928/* Active Link Uni-Direction */
4929#define USB_PD_CTRL_ACTIVE_LINK_UNIDIR BIT(3)
4930
4931struct ec_response_usb_pd_control_v2 {
4932 uint8_t enabled;
4933 uint8_t role;
4934 uint8_t polarity;
4935 char state[32];
4936 uint8_t cc_state; /* enum pd_cc_states representing cc state */
4937 uint8_t dp_mode; /* Current DP pin mode (MODE_DP_PIN_[A-E]) */
4938 uint8_t reserved; /* Reserved for future use */
4939 uint8_t control_flags; /* USB_PD_CTRL_*flags */
4940 uint8_t cable_speed; /* TBT_SS_* cable speed */
4941 uint8_t cable_gen; /* TBT_GEN3_* cable rounded support */
4942} __ec_align1;
4943
4944#define EC_CMD_USB_PD_PORTS 0x0102
4945
4946/* Maximum number of PD ports on a device, num_ports will be <= this */
4947#define EC_USB_PD_MAX_PORTS 8
4948
4949struct ec_response_usb_pd_ports {
4950 uint8_t num_ports;
4951} __ec_align1;
4952
4953#define EC_CMD_USB_PD_POWER_INFO 0x0103
4954
4955#define PD_POWER_CHARGING_PORT 0xff
4956struct ec_params_usb_pd_power_info {
4957 uint8_t port;
4958} __ec_align1;
4959
4960enum usb_chg_type {
4961 USB_CHG_TYPE_NONE,
4962 USB_CHG_TYPE_PD,
4963 USB_CHG_TYPE_C,
4964 USB_CHG_TYPE_PROPRIETARY,
4965 USB_CHG_TYPE_BC12_DCP,
4966 USB_CHG_TYPE_BC12_CDP,
4967 USB_CHG_TYPE_BC12_SDP,
4968 USB_CHG_TYPE_OTHER,
4969 USB_CHG_TYPE_VBUS,
4970 USB_CHG_TYPE_UNKNOWN,
4971 USB_CHG_TYPE_DEDICATED,
4972};
4973enum usb_power_roles {
4974 USB_PD_PORT_POWER_DISCONNECTED,
4975 USB_PD_PORT_POWER_SOURCE,
4976 USB_PD_PORT_POWER_SINK,
4977 USB_PD_PORT_POWER_SINK_NOT_CHARGING,
4978};
4979
4980struct usb_chg_measures {
4981 uint16_t voltage_max;
4982 uint16_t voltage_now;
4983 uint16_t current_max;
4984 uint16_t current_lim;
4985} __ec_align2;
4986
4987struct ec_response_usb_pd_power_info {
4988 uint8_t role;
4989 uint8_t type;
4990 uint8_t dualrole;
4991 uint8_t reserved1;
4992 struct usb_chg_measures meas;
4993 uint32_t max_power;
4994} __ec_align4;
4995
4996
4997/*
4998 * This command will return the number of USB PD charge port + the number
4999 * of dedicated port present.
5000 * EC_CMD_USB_PD_PORTS does NOT include the dedicated ports
5001 */
5002#define EC_CMD_CHARGE_PORT_COUNT 0x0105
5003struct ec_response_charge_port_count {
5004 uint8_t port_count;
5005} __ec_align1;
5006
5007/* Write USB-PD device FW */
5008#define EC_CMD_USB_PD_FW_UPDATE 0x0110
5009
5010enum usb_pd_fw_update_cmds {
5011 USB_PD_FW_REBOOT,
5012 USB_PD_FW_FLASH_ERASE,
5013 USB_PD_FW_FLASH_WRITE,
5014 USB_PD_FW_ERASE_SIG,
5015};
5016
5017struct ec_params_usb_pd_fw_update {
5018 uint16_t dev_id;
5019 uint8_t cmd;
5020 uint8_t port;
5021 uint32_t size; /* Size to write in bytes */
5022 /* Followed by data to write */
5023} __ec_align4;
5024
5025/* Write USB-PD Accessory RW_HASH table entry */
5026#define EC_CMD_USB_PD_RW_HASH_ENTRY 0x0111
5027/* RW hash is first 20 bytes of SHA-256 of RW section */
5028#define PD_RW_HASH_SIZE 20
5029struct ec_params_usb_pd_rw_hash_entry {
5030 uint16_t dev_id;
5031 uint8_t dev_rw_hash[PD_RW_HASH_SIZE];
5032 uint8_t reserved; /*
5033 * For alignment of current_image
5034 * TODO(rspangler) but it's not aligned!
5035 * Should have been reserved[2].
5036 */
5037 uint32_t current_image; /* One of ec_current_image */
5038} __ec_align1;
5039
5040/* Read USB-PD Accessory info */
5041#define EC_CMD_USB_PD_DEV_INFO 0x0112
5042
5043struct ec_params_usb_pd_info_request {
5044 uint8_t port;
5045} __ec_align1;
5046
5047/* Read USB-PD Device discovery info */
5048#define EC_CMD_USB_PD_DISCOVERY 0x0113
5049struct ec_params_usb_pd_discovery_entry {
5050 uint16_t vid; /* USB-IF VID */
5051 uint16_t pid; /* USB-IF PID */
5052 uint8_t ptype; /* product type (hub,periph,cable,ama) */
5053} __ec_align_size1;
5054
5055/* Override default charge behavior */
5056#define EC_CMD_PD_CHARGE_PORT_OVERRIDE 0x0114
5057
5058/* Negative port parameters have special meaning */
5059enum usb_pd_override_ports {
5060 OVERRIDE_DONT_CHARGE = -2,
5061 OVERRIDE_OFF = -1,
5062 /* [0, CONFIG_USB_PD_PORT_COUNT): Port# */
5063};
5064
5065struct ec_params_charge_port_override {
5066 int16_t override_port; /* Override port# */
5067} __ec_align2;
5068
5069/*
5070 * Read (and delete) one entry of PD event log.
5071 * TODO(crbug.com/751742): Make this host command more generic to accommodate
5072 * future non-PD logs that use the same internal EC event_log.
5073 */
5074#define EC_CMD_PD_GET_LOG_ENTRY 0x0115
5075
5076struct ec_response_pd_log {
5077 uint32_t timestamp; /* relative timestamp in milliseconds */
5078 uint8_t type; /* event type : see PD_EVENT_xx below */
5079 uint8_t size_port; /* [7:5] port number [4:0] payload size in bytes */
5080 uint16_t data; /* type-defined data payload */
5081 uint8_t payload[]; /* optional additional data payload: 0..16 bytes */
5082} __ec_align4;
5083
5084/* The timestamp is the microsecond counter shifted to get about a ms. */
5085#define PD_LOG_TIMESTAMP_SHIFT 10 /* 1 LSB = 1024us */
5086
5087#define PD_LOG_SIZE_MASK 0x1f
5088#define PD_LOG_PORT_MASK 0xe0
5089#define PD_LOG_PORT_SHIFT 5
5090#define PD_LOG_PORT_SIZE(port, size) (((port) << PD_LOG_PORT_SHIFT) | \
5091 ((size) & PD_LOG_SIZE_MASK))
5092#define PD_LOG_PORT(size_port) ((size_port) >> PD_LOG_PORT_SHIFT)
5093#define PD_LOG_SIZE(size_port) ((size_port) & PD_LOG_SIZE_MASK)
5094
5095/* PD event log : entry types */
5096/* PD MCU events */
5097#define PD_EVENT_MCU_BASE 0x00
5098#define PD_EVENT_MCU_CHARGE (PD_EVENT_MCU_BASE+0)
5099#define PD_EVENT_MCU_CONNECT (PD_EVENT_MCU_BASE+1)
5100/* Reserved for custom board event */
5101#define PD_EVENT_MCU_BOARD_CUSTOM (PD_EVENT_MCU_BASE+2)
5102/* PD generic accessory events */
5103#define PD_EVENT_ACC_BASE 0x20
5104#define PD_EVENT_ACC_RW_FAIL (PD_EVENT_ACC_BASE+0)
5105#define PD_EVENT_ACC_RW_ERASE (PD_EVENT_ACC_BASE+1)
5106/* PD power supply events */
5107#define PD_EVENT_PS_BASE 0x40
5108#define PD_EVENT_PS_FAULT (PD_EVENT_PS_BASE+0)
5109/* PD video dongles events */
5110#define PD_EVENT_VIDEO_BASE 0x60
5111#define PD_EVENT_VIDEO_DP_MODE (PD_EVENT_VIDEO_BASE+0)
5112#define PD_EVENT_VIDEO_CODEC (PD_EVENT_VIDEO_BASE+1)
5113/* Returned in the "type" field, when there is no entry available */
5114#define PD_EVENT_NO_ENTRY 0xff
5115
5116/*
5117 * PD_EVENT_MCU_CHARGE event definition :
5118 * the payload is "struct usb_chg_measures"
5119 * the data field contains the port state flags as defined below :
5120 */
5121/* Port partner is a dual role device */
5122#define CHARGE_FLAGS_DUAL_ROLE BIT(15)
5123/* Port is the pending override port */
5124#define CHARGE_FLAGS_DELAYED_OVERRIDE BIT(14)
5125/* Port is the override port */
5126#define CHARGE_FLAGS_OVERRIDE BIT(13)
5127/* Charger type */
5128#define CHARGE_FLAGS_TYPE_SHIFT 3
5129#define CHARGE_FLAGS_TYPE_MASK (0xf << CHARGE_FLAGS_TYPE_SHIFT)
5130/* Power delivery role */
5131#define CHARGE_FLAGS_ROLE_MASK (7 << 0)
5132
5133/*
5134 * PD_EVENT_PS_FAULT data field flags definition :
5135 */
5136#define PS_FAULT_OCP 1
5137#define PS_FAULT_FAST_OCP 2
5138#define PS_FAULT_OVP 3
5139#define PS_FAULT_DISCH 4
5140
5141/*
5142 * PD_EVENT_VIDEO_CODEC payload is "struct mcdp_info".
5143 */
5144struct mcdp_version {
5145 uint8_t major;
5146 uint8_t minor;
5147 uint16_t build;
5148} __ec_align4;
5149
5150struct mcdp_info {
5151 uint8_t family[2];
5152 uint8_t chipid[2];
5153 struct mcdp_version irom;
5154 struct mcdp_version fw;
5155} __ec_align4;
5156
5157/* struct mcdp_info field decoding */
5158#define MCDP_CHIPID(chipid) ((chipid[0] << 8) | chipid[1])
5159#define MCDP_FAMILY(family) ((family[0] << 8) | family[1])
5160
5161/* Get/Set USB-PD Alternate mode info */
5162#define EC_CMD_USB_PD_GET_AMODE 0x0116
5163struct ec_params_usb_pd_get_mode_request {
5164 uint16_t svid_idx; /* SVID index to get */
5165 uint8_t port; /* port */
5166} __ec_align_size1;
5167
5168struct ec_params_usb_pd_get_mode_response {
5169 uint16_t svid; /* SVID */
5170 uint16_t opos; /* Object Position */
5171 uint32_t vdo[6]; /* Mode VDOs */
5172} __ec_align4;
5173
5174#define EC_CMD_USB_PD_SET_AMODE 0x0117
5175
5176enum pd_mode_cmd {
5177 PD_EXIT_MODE = 0,
5178 PD_ENTER_MODE = 1,
5179 /* Not a command. Do NOT remove. */
5180 PD_MODE_CMD_COUNT,
5181};
5182
5183struct ec_params_usb_pd_set_mode_request {
5184 uint32_t cmd; /* enum pd_mode_cmd */
5185 uint16_t svid; /* SVID to set */
5186 uint8_t opos; /* Object Position */
5187 uint8_t port; /* port */
5188} __ec_align4;
5189
5190/* Ask the PD MCU to record a log of a requested type */
5191#define EC_CMD_PD_WRITE_LOG_ENTRY 0x0118
5192
5193struct ec_params_pd_write_log_entry {
5194 uint8_t type; /* event type : see PD_EVENT_xx above */
5195 uint8_t port; /* port#, or 0 for events unrelated to a given port */
5196} __ec_align1;
5197
5198
5199/* Control USB-PD chip */
5200#define EC_CMD_PD_CONTROL 0x0119
5201
5202enum ec_pd_control_cmd {
5203 PD_SUSPEND = 0, /* Suspend the PD chip (EC: stop talking to PD) */
5204 PD_RESUME, /* Resume the PD chip (EC: start talking to PD) */
5205 PD_RESET, /* Force reset the PD chip */
5206 PD_CONTROL_DISABLE, /* Disable further calls to this command */
5207 PD_CHIP_ON, /* Power on the PD chip */
5208};
5209
5210struct ec_params_pd_control {
5211 uint8_t chip; /* chip id */
5212 uint8_t subcmd;
5213} __ec_align1;
5214
5215/* Get info about USB-C SS muxes */
5216#define EC_CMD_USB_PD_MUX_INFO 0x011A
5217
5218struct ec_params_usb_pd_mux_info {
5219 uint8_t port; /* USB-C port number */
5220} __ec_align1;
5221
5222/* Flags representing mux state */
5223#define USB_PD_MUX_NONE 0 /* Open switch */
5224#define USB_PD_MUX_USB_ENABLED BIT(0) /* USB connected */
5225#define USB_PD_MUX_DP_ENABLED BIT(1) /* DP connected */
5226#define USB_PD_MUX_POLARITY_INVERTED BIT(2) /* CC line Polarity inverted */
5227#define USB_PD_MUX_HPD_IRQ BIT(3) /* HPD IRQ is asserted */
5228#define USB_PD_MUX_HPD_LVL BIT(4) /* HPD level is asserted */
5229#define USB_PD_MUX_SAFE_MODE BIT(5) /* DP is in safe mode */
5230#define USB_PD_MUX_TBT_COMPAT_ENABLED BIT(6) /* TBT compat enabled */
5231#define USB_PD_MUX_USB4_ENABLED BIT(7) /* USB4 enabled */
5232
5233struct ec_response_usb_pd_mux_info {
5234 uint8_t flags; /* USB_PD_MUX_*-encoded USB mux state */
5235} __ec_align1;
5236
5237#define EC_CMD_PD_CHIP_INFO 0x011B
5238
5239struct ec_params_pd_chip_info {
5240 uint8_t port; /* USB-C port number */
5241 uint8_t renew; /* Force renewal */
5242} __ec_align1;
5243
5244struct ec_response_pd_chip_info {
5245 uint16_t vendor_id;
5246 uint16_t product_id;
5247 uint16_t device_id;
5248 union {
5249 uint8_t fw_version_string[8];
5250 uint64_t fw_version_number;
5251 };
5252} __ec_align2;
5253
5254struct ec_response_pd_chip_info_v1 {
5255 uint16_t vendor_id;
5256 uint16_t product_id;
5257 uint16_t device_id;
5258 union {
5259 uint8_t fw_version_string[8];
5260 uint64_t fw_version_number;
5261 };
5262 union {
5263 uint8_t min_req_fw_version_string[8];
5264 uint64_t min_req_fw_version_number;
5265 };
5266} __ec_align2;
5267
5268/* Run RW signature verification and get status */
5269#define EC_CMD_RWSIG_CHECK_STATUS 0x011C
5270
5271struct ec_response_rwsig_check_status {
5272 uint32_t status;
5273} __ec_align4;
5274
5275/* For controlling RWSIG task */
5276#define EC_CMD_RWSIG_ACTION 0x011D
5277
5278enum rwsig_action {
5279 RWSIG_ACTION_ABORT = 0, /* Abort RWSIG and prevent jumping */
5280 RWSIG_ACTION_CONTINUE = 1, /* Jump to RW immediately */
5281};
5282
5283struct ec_params_rwsig_action {
5284 uint32_t action;
5285} __ec_align4;
5286
5287/* Run verification on a slot */
5288#define EC_CMD_EFS_VERIFY 0x011E
5289
5290struct ec_params_efs_verify {
5291 uint8_t region; /* enum ec_flash_region */
5292} __ec_align1;
5293
5294/*
5295 * Retrieve info from Cros Board Info store. Response is based on the data
5296 * type. Integers return a uint32. Strings return a string, using the response
5297 * size to determine how big it is.
5298 */
5299#define EC_CMD_GET_CROS_BOARD_INFO 0x011F
5300/*
5301 * Write info into Cros Board Info on EEPROM. Write fails if the board has
5302 * hardware write-protect enabled.
5303 */
5304#define EC_CMD_SET_CROS_BOARD_INFO 0x0120
5305
5306enum cbi_data_tag {
5307 CBI_TAG_BOARD_VERSION = 0, /* uint32_t or smaller */
5308 CBI_TAG_OEM_ID = 1, /* uint32_t or smaller */
5309 CBI_TAG_SKU_ID = 2, /* uint32_t or smaller */
5310 CBI_TAG_DRAM_PART_NUM = 3, /* variable length ascii, nul terminated. */
5311 CBI_TAG_OEM_NAME = 4, /* variable length ascii, nul terminated. */
5312 CBI_TAG_MODEL_ID = 5, /* uint32_t or smaller */
5313 CBI_TAG_COUNT,
5314};
5315
5316/*
5317 * Flags to control read operation
5318 *
5319 * RELOAD: Invalidate cache and read data from EEPROM. Useful to verify
5320 * write was successful without reboot.
5321 */
5322#define CBI_GET_RELOAD BIT(0)
5323
5324struct ec_params_get_cbi {
5325 uint32_t tag; /* enum cbi_data_tag */
5326 uint32_t flag; /* CBI_GET_* */
5327} __ec_align4;
5328
5329/*
5330 * Flags to control write behavior.
5331 *
5332 * NO_SYNC: Makes EC update data in RAM but skip writing to EEPROM. It's
5333 * useful when writing multiple fields in a row.
5334 * INIT: Need to be set when creating a new CBI from scratch. All fields
5335 * will be initialized to zero first.
5336 */
5337#define CBI_SET_NO_SYNC BIT(0)
5338#define CBI_SET_INIT BIT(1)
5339
5340struct ec_params_set_cbi {
5341 uint32_t tag; /* enum cbi_data_tag */
5342 uint32_t flag; /* CBI_SET_* */
5343 uint32_t size; /* Data size */
5344 uint8_t data[]; /* For string and raw data */
5345} __ec_align1;
5346
5347/*
5348 * Information about resets of the AP by the EC and the EC's own uptime.
5349 */
5350#define EC_CMD_GET_UPTIME_INFO 0x0121
5351
5352struct ec_response_uptime_info {
5353 /*
5354 * Number of milliseconds since the last EC boot. Sysjump resets
5355 * typically do not restart the EC's time_since_boot epoch.
5356 *
5357 * WARNING: The EC's sense of time is much less accurate than the AP's
5358 * sense of time, in both phase and frequency. This timebase is similar
5359 * to CLOCK_MONOTONIC_RAW, but with 1% or more frequency error.
5360 */
5361 uint32_t time_since_ec_boot_ms;
5362
5363 /*
5364 * Number of times the AP was reset by the EC since the last EC boot.
5365 * Note that the AP may be held in reset by the EC during the initial
5366 * boot sequence, such that the very first AP boot may count as more
5367 * than one here.
5368 */
5369 uint32_t ap_resets_since_ec_boot;
5370
5371 /*
5372 * The set of flags which describe the EC's most recent reset. See
5373 * include/system.h RESET_FLAG_* for details.
5374 */
5375 uint32_t ec_reset_flags;
5376
5377 /* Empty log entries have both the cause and timestamp set to zero. */
5378 struct ap_reset_log_entry {
5379 /*
5380 * See include/chipset.h: enum chipset_{reset,shutdown}_reason
5381 * for details.
5382 */
5383 uint16_t reset_cause;
5384
5385 /* Reserved for protocol growth. */
5386 uint16_t reserved;
5387
5388 /*
5389 * The time of the reset's assertion, in milliseconds since the
5390 * last EC boot, in the same epoch as time_since_ec_boot_ms.
5391 * Set to zero if the log entry is empty.
5392 */
5393 uint32_t reset_time_ms;
5394 } recent_ap_reset[4];
5395} __ec_align4;
5396
5397/*
5398 * Add entropy to the device secret (stored in the rollback region).
5399 *
5400 * Depending on the chip, the operation may take a long time (e.g. to erase
5401 * flash), so the commands are asynchronous.
5402 */
5403#define EC_CMD_ADD_ENTROPY 0x0122
5404
5405enum add_entropy_action {
5406 /* Add entropy to the current secret. */
5407 ADD_ENTROPY_ASYNC = 0,
5408 /*
5409 * Add entropy, and also make sure that the previous secret is erased.
5410 * (this can be implemented by adding entropy multiple times until
5411 * all rolback blocks have been overwritten).
5412 */
5413 ADD_ENTROPY_RESET_ASYNC = 1,
5414 /* Read back result from the previous operation. */
5415 ADD_ENTROPY_GET_RESULT = 2,
5416};
5417
5418struct ec_params_rollback_add_entropy {
5419 uint8_t action;
5420} __ec_align1;
5421
5422/*
5423 * Perform a single read of a given ADC channel.
5424 */
5425#define EC_CMD_ADC_READ 0x0123
5426
5427struct ec_params_adc_read {
5428 uint8_t adc_channel;
5429} __ec_align1;
5430
5431struct ec_response_adc_read {
5432 int32_t adc_value;
5433} __ec_align4;
5434
5435/*
5436 * Read back rollback info
5437 */
5438#define EC_CMD_ROLLBACK_INFO 0x0124
5439
5440struct ec_response_rollback_info {
5441 int32_t id; /* Incrementing number to indicate which region to use. */
5442 int32_t rollback_min_version;
5443 int32_t rw_rollback_version;
5444} __ec_align4;
5445
5446
5447/* Issue AP reset */
5448#define EC_CMD_AP_RESET 0x0125
5449
5450/*****************************************************************************/
5451/* Voltage regulator controls */
5452
5453/*
5454 * Get basic info of voltage regulator for given index.
5455 *
5456 * Returns the regulator name and supported voltage list in mV.
5457 */
5458#define EC_CMD_REGULATOR_GET_INFO 0x012C
5459
5460/* Maximum length of regulator name */
5461#define EC_REGULATOR_NAME_MAX_LEN 16
5462
5463/* Maximum length of the supported voltage list. */
5464#define EC_REGULATOR_VOLTAGE_MAX_COUNT 16
5465
5466struct ec_params_regulator_get_info {
5467 uint32_t index;
5468} __ec_align4;
5469
5470struct ec_response_regulator_get_info {
5471 char name[EC_REGULATOR_NAME_MAX_LEN];
5472 uint16_t num_voltages;
5473 uint16_t voltages_mv[EC_REGULATOR_VOLTAGE_MAX_COUNT];
5474} __ec_align2;
5475
5476/*
5477 * Configure the regulator as enabled / disabled.
5478 */
5479#define EC_CMD_REGULATOR_ENABLE 0x012D
5480
5481struct ec_params_regulator_enable {
5482 uint32_t index;
5483 uint8_t enable;
5484} __ec_align4;
5485
5486/*
5487 * Query if the regulator is enabled.
5488 *
5489 * Returns 1 if the regulator is enabled, 0 if not.
5490 */
5491#define EC_CMD_REGULATOR_IS_ENABLED 0x012E
5492
5493struct ec_params_regulator_is_enabled {
5494 uint32_t index;
5495} __ec_align4;
5496
5497struct ec_response_regulator_is_enabled {
5498 uint8_t enabled;
5499} __ec_align1;
5500
5501/*
5502 * Set voltage for the voltage regulator within the range specified.
5503 *
5504 * The driver should select the voltage in range closest to min_mv.
5505 *
5506 * Also note that this might be called before the regulator is enabled, and the
5507 * setting should be in effect after the regulator is enabled.
5508 */
5509#define EC_CMD_REGULATOR_SET_VOLTAGE 0x012F
5510
5511struct ec_params_regulator_set_voltage {
5512 uint32_t index;
5513 uint32_t min_mv;
5514 uint32_t max_mv;
5515} __ec_align4;
5516
5517/*
5518 * Get the currently configured voltage for the voltage regulator.
5519 *
5520 * Note that this might be called before the regulator is enabled, and this
5521 * should return the configured output voltage if the regulator is enabled.
5522 */
5523#define EC_CMD_REGULATOR_GET_VOLTAGE 0x0130
5524
5525struct ec_params_regulator_get_voltage {
5526 uint32_t index;
5527} __ec_align4;
5528
5529struct ec_response_regulator_get_voltage {
5530 uint32_t voltage_mv;
5531} __ec_align4;
5532
5533/*
5534 * Gather all discovery information for the given port and partner type.
5535 *
5536 * Note that if discovery has not yet completed, only the currently completed
5537 * responses will be filled in. If the discovery data structures are changed
5538 * in the process of the command running, BUSY will be returned.
5539 *
5540 * VDO field sizes are set to the maximum possible number of VDOs a VDM may
5541 * contain, while the number of SVIDs here is selected to fit within the PROTO2
5542 * maximum parameter size.
5543 */
5544#define EC_CMD_TYPEC_DISCOVERY 0x0131
5545
5546enum typec_partner_type {
5547 TYPEC_PARTNER_SOP = 0,
5548 TYPEC_PARTNER_SOP_PRIME = 1,
5549};
5550
5551struct ec_params_typec_discovery {
5552 uint8_t port;
5553 uint8_t partner_type; /* enum typec_partner_type */
5554} __ec_align1;
5555
5556struct svid_mode_info {
5557 uint16_t svid;
5558 uint16_t mode_count; /* Number of modes partner sent */
5559 uint32_t mode_vdo[6]; /* Max VDOs allowed after VDM header is 6 */
5560};
5561
5562struct ec_response_typec_discovery {
5563 uint8_t identity_count; /* Number of identity VDOs partner sent */
5564 uint8_t svid_count; /* Number of SVIDs partner sent */
5565 uint16_t reserved;
5566 uint32_t discovery_vdo[6]; /* Max VDOs allowed after VDM header is 6 */
5567 struct svid_mode_info svids[0];
5568} __ec_align1;
5569
5570/*
5571 * Gather all status information for a port.
5572 *
5573 * Note: this covers many of the return fields from the deprecated
5574 * EC_CMD_USB_PD_CONTROL command, except those that are redundant with the
5575 * discovery data. The "enum pd_cc_states" is defined with the deprecated
5576 * EC_CMD_USB_PD_CONTROL command.
5577 *
5578 * This also combines in the EC_CMD_USB_PD_MUX_INFO flags.
5579 */
5580#define EC_CMD_TYPEC_STATUS 0x0133
5581
5582/*
5583 * Power role.
5584 *
5585 * Note this is also used for PD header creation, and values align to those in
5586 * the Power Delivery Specification Revision 3.0 (See
5587 * 6.2.1.1.4 Port Power Role).
5588 */
5589enum pd_power_role {
5590 PD_ROLE_SINK = 0,
5591 PD_ROLE_SOURCE = 1
5592};
5593
5594/*
5595 * Data role.
5596 *
5597 * Note this is also used for PD header creation, and the first two values
5598 * align to those in the Power Delivery Specification Revision 3.0 (See
5599 * 6.2.1.1.6 Port Data Role).
5600 */
5601enum pd_data_role {
5602 PD_ROLE_UFP = 0,
5603 PD_ROLE_DFP = 1,
5604 PD_ROLE_DISCONNECTED = 2,
5605};
5606
5607enum pd_vconn_role {
5608 PD_ROLE_VCONN_OFF = 0,
5609 PD_ROLE_VCONN_SRC = 1,
5610};
5611
5612/*
5613 * Note: BIT(0) may be used to determine whether the polarity is CC1 or CC2,
5614 * regardless of whether a debug accessory is connected.
5615 */
5616enum tcpc_cc_polarity {
5617 /*
5618 * _CCx: is used to indicate the polarity while not connected to
5619 * a Debug Accessory. Only one CC line will assert a resistor and
5620 * the other will be open.
5621 */
5622 POLARITY_CC1 = 0,
5623 POLARITY_CC2 = 1,
5624
5625 /*
5626 * _CCx_DTS is used to indicate the polarity while connected to a
5627 * SRC Debug Accessory. Assert resistors on both lines.
5628 */
5629 POLARITY_CC1_DTS = 2,
5630 POLARITY_CC2_DTS = 3,
5631
5632 /*
5633 * The current TCPC code relies on these specific POLARITY values.
5634 * Adding in a check to verify if the list grows for any reason
5635 * that this will give a hint that other places need to be
5636 * adjusted.
5637 */
5638 POLARITY_COUNT
5639};
5640
5641#define PD_STATUS_EVENT_SOP_DISC_DONE BIT(0)
5642#define PD_STATUS_EVENT_SOP_PRIME_DISC_DONE BIT(1)
5643
5644struct ec_params_typec_status {
5645 uint8_t port;
5646} __ec_align1;
5647
5648struct ec_response_typec_status {
5649 uint8_t pd_enabled; /* PD communication enabled - bool */
5650 uint8_t dev_connected; /* Device connected - bool */
5651 uint8_t sop_connected; /* Device is SOP PD capable - bool */
5652 uint8_t source_cap_count; /* Number of Source Cap PDOs */
5653
5654 uint8_t power_role; /* enum pd_power_role */
5655 uint8_t data_role; /* enum pd_data_role */
5656 uint8_t vconn_role; /* enum pd_vconn_role */
5657 uint8_t sink_cap_count; /* Number of Sink Cap PDOs */
5658
5659 uint8_t polarity; /* enum tcpc_cc_polarity */
5660 uint8_t cc_state; /* enum pd_cc_states */
5661 uint8_t dp_pin; /* DP pin mode (MODE_DP_IN_[A-E]) */
5662 uint8_t mux_state; /* USB_PD_MUX* - encoded mux state */
5663
5664 char tc_state[32]; /* TC state name */
5665
5666 uint32_t events; /* PD_STATUS_EVENT bitmask */
5667
5668 /*
5669 * BCD PD revisions for partners
5670 *
5671 * The format has the PD major reversion in the upper nibble, and PD
5672 * minor version in the next nibble. Following two nibbles are
5673 * currently 0.
5674 * ex. PD 3.2 would map to 0x3200
5675 *
5676 * PD major/minor will be 0 if no PD device is connected.
5677 */
5678 uint16_t sop_revision;
5679 uint16_t sop_prime_revision;
5680
5681 uint32_t source_cap_pdos[7]; /* Max 7 PDOs can be present */
5682
5683 uint32_t sink_cap_pdos[7]; /* Max 7 PDOs can be present */
5684} __ec_align1;
5685
5686/*****************************************************************************/
5687/* The command range 0x200-0x2FF is reserved for Rotor. */
5688
5689/*****************************************************************************/
5690/*
5691 * Reserve a range of host commands for the CR51 firmware.
5692 */
5693#define EC_CMD_CR51_BASE 0x0300
5694#define EC_CMD_CR51_LAST 0x03FF
5695
5696/*****************************************************************************/
5697/* Fingerprint MCU commands: range 0x0400-0x040x */
5698
5699/* Fingerprint SPI sensor passthru command: prototyping ONLY */
5700#define EC_CMD_FP_PASSTHRU 0x0400
5701
5702#define EC_FP_FLAG_NOT_COMPLETE 0x1
5703
5704struct ec_params_fp_passthru {
5705 uint16_t len; /* Number of bytes to write then read */
5706 uint16_t flags; /* EC_FP_FLAG_xxx */
5707 uint8_t data[]; /* Data to send */
5708} __ec_align2;
5709
5710/* Configure the Fingerprint MCU behavior */
5711#define EC_CMD_FP_MODE 0x0402
5712
5713/* Put the sensor in its lowest power mode */
5714#define FP_MODE_DEEPSLEEP BIT(0)
5715/* Wait to see a finger on the sensor */
5716#define FP_MODE_FINGER_DOWN BIT(1)
5717/* Poll until the finger has left the sensor */
5718#define FP_MODE_FINGER_UP BIT(2)
5719/* Capture the current finger image */
5720#define FP_MODE_CAPTURE BIT(3)
5721/* Finger enrollment session on-going */
5722#define FP_MODE_ENROLL_SESSION BIT(4)
5723/* Enroll the current finger image */
5724#define FP_MODE_ENROLL_IMAGE BIT(5)
5725/* Try to match the current finger image */
5726#define FP_MODE_MATCH BIT(6)
5727/* Reset and re-initialize the sensor. */
5728#define FP_MODE_RESET_SENSOR BIT(7)
5729/* special value: don't change anything just read back current mode */
5730#define FP_MODE_DONT_CHANGE BIT(31)
5731
5732#define FP_VALID_MODES (FP_MODE_DEEPSLEEP | \
5733 FP_MODE_FINGER_DOWN | \
5734 FP_MODE_FINGER_UP | \
5735 FP_MODE_CAPTURE | \
5736 FP_MODE_ENROLL_SESSION | \
5737 FP_MODE_ENROLL_IMAGE | \
5738 FP_MODE_MATCH | \
5739 FP_MODE_RESET_SENSOR | \
5740 FP_MODE_DONT_CHANGE)
5741
5742/* Capture types defined in bits [30..28] */
5743#define FP_MODE_CAPTURE_TYPE_SHIFT 28
5744#define FP_MODE_CAPTURE_TYPE_MASK (0x7 << FP_MODE_CAPTURE_TYPE_SHIFT)
5745/*
5746 * This enum must remain ordered, if you add new values you must ensure that
5747 * FP_CAPTURE_TYPE_MAX is still the last one.
5748 */
5749enum fp_capture_type {
5750 /* Full blown vendor-defined capture (produces 'frame_size' bytes) */
5751 FP_CAPTURE_VENDOR_FORMAT = 0,
5752 /* Simple raw image capture (produces width x height x bpp bits) */
5753 FP_CAPTURE_SIMPLE_IMAGE = 1,
5754 /* Self test pattern (e.g. checkerboard) */
5755 FP_CAPTURE_PATTERN0 = 2,
5756 /* Self test pattern (e.g. inverted checkerboard) */
5757 FP_CAPTURE_PATTERN1 = 3,
5758 /* Capture for Quality test with fixed contrast */
5759 FP_CAPTURE_QUALITY_TEST = 4,
5760 /* Capture for pixel reset value test */
5761 FP_CAPTURE_RESET_TEST = 5,
5762 FP_CAPTURE_TYPE_MAX,
5763};
5764/* Extracts the capture type from the sensor 'mode' word */
5765#define FP_CAPTURE_TYPE(mode) (((mode) & FP_MODE_CAPTURE_TYPE_MASK) \
5766 >> FP_MODE_CAPTURE_TYPE_SHIFT)
5767
5768struct ec_params_fp_mode {
5769 uint32_t mode; /* as defined by FP_MODE_ constants */
5770} __ec_align4;
5771
5772struct ec_response_fp_mode {
5773 uint32_t mode; /* as defined by FP_MODE_ constants */
5774} __ec_align4;
5775
5776/* Retrieve Fingerprint sensor information */
5777#define EC_CMD_FP_INFO 0x0403
5778
5779/* Number of dead pixels detected on the last maintenance */
5780#define FP_ERROR_DEAD_PIXELS(errors) ((errors) & 0x3FF)
5781/* Unknown number of dead pixels detected on the last maintenance */
5782#define FP_ERROR_DEAD_PIXELS_UNKNOWN (0x3FF)
5783/* No interrupt from the sensor */
5784#define FP_ERROR_NO_IRQ BIT(12)
5785/* SPI communication error */
5786#define FP_ERROR_SPI_COMM BIT(13)
5787/* Invalid sensor Hardware ID */
5788#define FP_ERROR_BAD_HWID BIT(14)
5789/* Sensor initialization failed */
5790#define FP_ERROR_INIT_FAIL BIT(15)
5791
5792struct ec_response_fp_info_v0 {
5793 /* Sensor identification */
5794 uint32_t vendor_id;
5795 uint32_t product_id;
5796 uint32_t model_id;
5797 uint32_t version;
5798 /* Image frame characteristics */
5799 uint32_t frame_size;
5800 uint32_t pixel_format; /* using V4L2_PIX_FMT_ */
5801 uint16_t width;
5802 uint16_t height;
5803 uint16_t bpp;
5804 uint16_t errors; /* see FP_ERROR_ flags above */
5805} __ec_align4;
5806
5807struct ec_response_fp_info {
5808 /* Sensor identification */
5809 uint32_t vendor_id;
5810 uint32_t product_id;
5811 uint32_t model_id;
5812 uint32_t version;
5813 /* Image frame characteristics */
5814 uint32_t frame_size;
5815 uint32_t pixel_format; /* using V4L2_PIX_FMT_ */
5816 uint16_t width;
5817 uint16_t height;
5818 uint16_t bpp;
5819 uint16_t errors; /* see FP_ERROR_ flags above */
5820 /* Template/finger current information */
5821 uint32_t template_size; /* max template size in bytes */
5822 uint16_t template_max; /* maximum number of fingers/templates */
5823 uint16_t template_valid; /* number of valid fingers/templates */
5824 uint32_t template_dirty; /* bitmap of templates with MCU side changes */
5825 uint32_t template_version; /* version of the template format */
5826} __ec_align4;
5827
5828/* Get the last captured finger frame or a template content */
5829#define EC_CMD_FP_FRAME 0x0404
5830
5831/* constants defining the 'offset' field which also contains the frame index */
5832#define FP_FRAME_INDEX_SHIFT 28
5833/* Frame buffer where the captured image is stored */
5834#define FP_FRAME_INDEX_RAW_IMAGE 0
5835/* First frame buffer holding a template */
5836#define FP_FRAME_INDEX_TEMPLATE 1
5837#define FP_FRAME_GET_BUFFER_INDEX(offset) ((offset) >> FP_FRAME_INDEX_SHIFT)
5838#define FP_FRAME_OFFSET_MASK 0x0FFFFFFF
5839
5840/* Version of the format of the encrypted templates. */
5841#define FP_TEMPLATE_FORMAT_VERSION 3
5842
5843/* Constants for encryption parameters */
5844#define FP_CONTEXT_NONCE_BYTES 12
5845#define FP_CONTEXT_USERID_WORDS (32 / sizeof(uint32_t))
5846#define FP_CONTEXT_TAG_BYTES 16
5847#define FP_CONTEXT_SALT_BYTES 16
5848#define FP_CONTEXT_TPM_BYTES 32
5849
5850struct ec_fp_template_encryption_metadata {
5851 /*
5852 * Version of the structure format (N=3).
5853 */
5854 uint16_t struct_version;
5855 /* Reserved bytes, set to 0. */
5856 uint16_t reserved;
5857 /*
5858 * The salt is *only* ever used for key derivation. The nonce is unique,
5859 * a different one is used for every message.
5860 */
5861 uint8_t nonce[FP_CONTEXT_NONCE_BYTES];
5862 uint8_t salt[FP_CONTEXT_SALT_BYTES];
5863 uint8_t tag[FP_CONTEXT_TAG_BYTES];
5864};
5865
5866struct ec_params_fp_frame {
5867 /*
5868 * The offset contains the template index or FP_FRAME_INDEX_RAW_IMAGE
5869 * in the high nibble, and the real offset within the frame in
5870 * FP_FRAME_OFFSET_MASK.
5871 */
5872 uint32_t offset;
5873 uint32_t size;
5874} __ec_align4;
5875
5876/* Load a template into the MCU */
5877#define EC_CMD_FP_TEMPLATE 0x0405
5878
5879/* Flag in the 'size' field indicating that the full template has been sent */
5880#define FP_TEMPLATE_COMMIT 0x80000000
5881
5882struct ec_params_fp_template {
5883 uint32_t offset;
5884 uint32_t size;
5885 uint8_t data[];
5886} __ec_align4;
5887
5888/* Clear the current fingerprint user context and set a new one */
5889#define EC_CMD_FP_CONTEXT 0x0406
5890
5891struct ec_params_fp_context {
5892 uint32_t userid[FP_CONTEXT_USERID_WORDS];
5893} __ec_align4;
5894
5895#define EC_CMD_FP_STATS 0x0407
5896
5897#define FPSTATS_CAPTURE_INV BIT(0)
5898#define FPSTATS_MATCHING_INV BIT(1)
5899
5900struct ec_response_fp_stats {
5901 uint32_t capture_time_us;
5902 uint32_t matching_time_us;
5903 uint32_t overall_time_us;
5904 struct {
5905 uint32_t lo;
5906 uint32_t hi;
5907 } overall_t0;
5908 uint8_t timestamps_invalid;
5909 int8_t template_matched;
5910} __ec_align2;
5911
5912#define EC_CMD_FP_SEED 0x0408
5913struct ec_params_fp_seed {
5914 /*
5915 * Version of the structure format (N=3).
5916 */
5917 uint16_t struct_version;
5918 /* Reserved bytes, set to 0. */
5919 uint16_t reserved;
5920 /* Seed from the TPM. */
5921 uint8_t seed[FP_CONTEXT_TPM_BYTES];
5922} __ec_align4;
5923
5924#define EC_CMD_FP_ENC_STATUS 0x0409
5925
5926/* FP TPM seed has been set or not */
5927#define FP_ENC_STATUS_SEED_SET BIT(0)
5928
5929struct ec_response_fp_encryption_status {
5930 /* Used bits in encryption engine status */
5931 uint32_t valid_flags;
5932 /* Encryption engine status */
5933 uint32_t status;
5934} __ec_align4;
5935
5936/*****************************************************************************/
5937/* Touchpad MCU commands: range 0x0500-0x05FF */
5938
5939/* Perform touchpad self test */
5940#define EC_CMD_TP_SELF_TEST 0x0500
5941
5942/* Get number of frame types, and the size of each type */
5943#define EC_CMD_TP_FRAME_INFO 0x0501
5944
5945struct ec_response_tp_frame_info {
5946 uint32_t n_frames;
5947 uint32_t frame_sizes[];
5948} __ec_align4;
5949
5950/* Create a snapshot of current frame readings */
5951#define EC_CMD_TP_FRAME_SNAPSHOT 0x0502
5952
5953/* Read the frame */
5954#define EC_CMD_TP_FRAME_GET 0x0503
5955
5956struct ec_params_tp_frame_get {
5957 uint32_t frame_index;
5958 uint32_t offset;
5959 uint32_t size;
5960} __ec_align4;
5961
5962/*****************************************************************************/
5963/* EC-EC communication commands: range 0x0600-0x06FF */
5964
5965#define EC_COMM_TEXT_MAX 8
5966
5967/*
5968 * Get battery static information, i.e. information that never changes, or
5969 * very infrequently.
5970 */
5971#define EC_CMD_BATTERY_GET_STATIC 0x0600
5972
5973/**
5974 * struct ec_params_battery_static_info - Battery static info parameters
5975 * @index: Battery index.
5976 */
5977struct ec_params_battery_static_info {
5978 uint8_t index;
5979} __ec_align_size1;
5980
5981/**
5982 * struct ec_response_battery_static_info - Battery static info response
5983 * @design_capacity: Battery Design Capacity (mAh)
5984 * @design_voltage: Battery Design Voltage (mV)
5985 * @manufacturer: Battery Manufacturer String
5986 * @model: Battery Model Number String
5987 * @serial: Battery Serial Number String
5988 * @type: Battery Type String
5989 * @cycle_count: Battery Cycle Count
5990 */
5991struct ec_response_battery_static_info {
5992 uint16_t design_capacity;
5993 uint16_t design_voltage;
5994 char manufacturer[EC_COMM_TEXT_MAX];
5995 char model[EC_COMM_TEXT_MAX];
5996 char serial[EC_COMM_TEXT_MAX];
5997 char type[EC_COMM_TEXT_MAX];
5998 /* TODO(crbug.com/795991): Consider moving to dynamic structure. */
5999 uint32_t cycle_count;
6000} __ec_align4;
6001
6002/*
6003 * Get battery dynamic information, i.e. information that is likely to change
6004 * every time it is read.
6005 */
6006#define EC_CMD_BATTERY_GET_DYNAMIC 0x0601
6007
6008/**
6009 * struct ec_params_battery_dynamic_info - Battery dynamic info parameters
6010 * @index: Battery index.
6011 */
6012struct ec_params_battery_dynamic_info {
6013 uint8_t index;
6014} __ec_align_size1;
6015
6016/**
6017 * struct ec_response_battery_dynamic_info - Battery dynamic info response
6018 * @actual_voltage: Battery voltage (mV)
6019 * @actual_current: Battery current (mA); negative=discharging
6020 * @remaining_capacity: Remaining capacity (mAh)
6021 * @full_capacity: Capacity (mAh, might change occasionally)
6022 * @flags: Flags, see EC_BATT_FLAG_*
6023 * @desired_voltage: Charging voltage desired by battery (mV)
6024 * @desired_current: Charging current desired by battery (mA)
6025 */
6026struct ec_response_battery_dynamic_info {
6027 int16_t actual_voltage;
6028 int16_t actual_current;
6029 int16_t remaining_capacity;
6030 int16_t full_capacity;
6031 int16_t flags;
6032 int16_t desired_voltage;
6033 int16_t desired_current;
6034} __ec_align2;
6035
6036/*
6037 * Control charger chip. Used to control charger chip on the slave.
6038 */
6039#define EC_CMD_CHARGER_CONTROL 0x0602
6040
6041/**
6042 * struct ec_params_charger_control - Charger control parameters
6043 * @max_current: Charger current (mA). Positive to allow base to draw up to
6044 * max_current and (possibly) charge battery, negative to request current
6045 * from base (OTG).
6046 * @otg_voltage: Voltage (mV) to use in OTG mode, ignored if max_current is
6047 * >= 0.
6048 * @allow_charging: Allow base battery charging (only makes sense if
6049 * max_current > 0).
6050 */
6051struct ec_params_charger_control {
6052 int16_t max_current;
6053 uint16_t otg_voltage;
6054 uint8_t allow_charging;
6055} __ec_align_size1;
6056
6057/*****************************************************************************/
6058/*
6059 * Reserve a range of host commands for board-specific, experimental, or
6060 * special purpose features. These can be (re)used without updating this file.
6061 *
6062 * CAUTION: Don't go nuts with this. Shipping products should document ALL
6063 * their EC commands for easier development, testing, debugging, and support.
6064 *
6065 * All commands MUST be #defined to be 4-digit UPPER CASE hex values
6066 * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work.
6067 *
6068 * In your experimental code, you may want to do something like this:
6069 *
6070 * #define EC_CMD_MAGIC_FOO 0x0000
6071 * #define EC_CMD_MAGIC_BAR 0x0001
6072 * #define EC_CMD_MAGIC_HEY 0x0002
6073 *
6074 * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_FOO, magic_foo_handler,
6075 * EC_VER_MASK(0);
6076 *
6077 * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_BAR, magic_bar_handler,
6078 * EC_VER_MASK(0);
6079 *
6080 * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_HEY, magic_hey_handler,
6081 * EC_VER_MASK(0);
6082 */
6083#define EC_CMD_BOARD_SPECIFIC_BASE 0x3E00
6084#define EC_CMD_BOARD_SPECIFIC_LAST 0x3FFF
6085
6086/*
6087 * Given the private host command offset, calculate the true private host
6088 * command value.
6089 */
6090#define EC_PRIVATE_HOST_COMMAND_VALUE(command) \
6091 (EC_CMD_BOARD_SPECIFIC_BASE + (command))
6092
6093/*****************************************************************************/
6094/*
6095 * Passthru commands
6096 *
6097 * Some platforms have sub-processors chained to each other. For example.
6098 *
6099 * AP <--> EC <--> PD MCU
6100 *
6101 * The top 2 bits of the command number are used to indicate which device the
6102 * command is intended for. Device 0 is always the device receiving the
6103 * command; other device mapping is board-specific.
6104 *
6105 * When a device receives a command to be passed to a sub-processor, it passes
6106 * it on with the device number set back to 0. This allows the sub-processor
6107 * to remain blissfully unaware of whether the command originated on the next
6108 * device up the chain, or was passed through from the AP.
6109 *
6110 * In the above example, if the AP wants to send command 0x0002 to the PD MCU,
6111 * AP sends command 0x4002 to the EC
6112 * EC sends command 0x0002 to the PD MCU
6113 * EC forwards PD MCU response back to the AP
6114 */
6115
6116/* Offset and max command number for sub-device n */
6117#define EC_CMD_PASSTHRU_OFFSET(n) (0x4000 * (n))
6118#define EC_CMD_PASSTHRU_MAX(n) (EC_CMD_PASSTHRU_OFFSET(n) + 0x3fff)
6119
6120/*****************************************************************************/
6121/*
6122 * Deprecated constants. These constants have been renamed for clarity. The
6123 * meaning and size has not changed. Programs that use the old names should
6124 * switch to the new names soon, as the old names may not be carried forward
6125 * forever.
6126 */
6127#define EC_HOST_PARAM_SIZE EC_PROTO2_MAX_PARAM_SIZE
6128#define EC_LPC_ADDR_OLD_PARAM EC_HOST_CMD_REGION1
6129#define EC_OLD_PARAM_SIZE EC_HOST_CMD_REGION_SIZE
6130
6131
6132
6133#endif /* __CROS_EC_COMMANDS_H */