Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
tjh.dev
kernel
os
linux
1/*
2 * Copyright (C) 2016 Broadcom
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation version 2.
7 *
8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9 * kind, whether express or implied; without even the implied warranty
10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13#include <linux/serial_reg.h>
14#include <asm/cputype.h>
15
16/* Physical register offset and virtual register offset */
17#define REG_PHYS_BASE 0xf0000000
18#define REG_PHYS_BASE_V7 0x08000000
19#define REG_VIRT_BASE 0xfc000000
20#define REG_PHYS_ADDR(x) ((x) + REG_PHYS_BASE)
21#define REG_PHYS_ADDR_V7(x) ((x) + REG_PHYS_BASE_V7)
22
23/* Product id can be read from here */
24#define SUN_TOP_CTRL_BASE REG_PHYS_ADDR(0x404000)
25#define SUN_TOP_CTRL_BASE_V7 REG_PHYS_ADDR_V7(0x404000)
26
27#define UARTA_3390 REG_PHYS_ADDR(0x40a900)
28#define UARTA_7250 REG_PHYS_ADDR(0x40b400)
29#define UARTA_7255 REG_PHYS_ADDR(0x40c000)
30#define UARTA_7260 UARTA_7255
31#define UARTA_7268 UARTA_7255
32#define UARTA_7271 UARTA_7268
33#define UARTA_7278 REG_PHYS_ADDR_V7(0x40c000)
34#define UARTA_7216 UARTA_7278
35#define UARTA_72164 UARTA_7278
36#define UARTA_72165 UARTA_7278
37#define UARTA_7364 REG_PHYS_ADDR(0x40b000)
38#define UARTA_7366 UARTA_7364
39#define UARTA_74371 REG_PHYS_ADDR(0x406b00)
40#define UARTA_7439 REG_PHYS_ADDR(0x40a900)
41#define UARTA_7445 REG_PHYS_ADDR(0x40ab00)
42
43#define UART_SHIFT 2
44
45#define checkuart(rp, rv, family_id, family) \
46 /* Load family id */ \
47 ldr rp, =family_id ; \
48 /* Compare SUN_TOP_CTRL value against it */ \
49 cmp rp, rv ; \
50 /* Passed test, load address */ \
51 ldreq rp, =UARTA_##family ; \
52 /* Jump to save UART address */ \
53 beq 91f
54
55 .macro addruart, rp, rv, tmp
56 adr \rp, 99f @ actual addr of 99f
57 ldr \rv, [\rp] @ linked addr is stored there
58 sub \rv, \rv, \rp @ offset between the two
59 ldr \rp, [\rp, #4] @ linked brcmstb_uart_config
60 sub \tmp, \rp, \rv @ actual brcmstb_uart_config
61 ldr \rp, [\tmp] @ Load brcmstb_uart_config
62 cmp \rp, #1 @ needs initialization?
63 bne 100f @ no; go load the addresses
64 mov \rv, #0 @ yes; record init is done
65 str \rv, [\tmp]
66
67 /* Check for V7 memory map if B53 */
68 mrc p15, 0, \rv, c0, c0, 0 @ get Main ID register
69 ldr \rp, =ARM_CPU_PART_MASK
70 and \rv, \rv, \rp
71 ldr \rp, =ARM_CPU_PART_BRAHMA_B53 @ check for B53 CPU
72 cmp \rv, \rp
73 bne 10f
74
75 /* if PERIPHBASE doesn't overlap REG_PHYS_BASE use V7 map */
76 mrc p15, 1, \rv, c15, c3, 0 @ get PERIPHBASE from CBAR
77 ands \rv, \rv, #REG_PHYS_BASE
78 ldreq \rp, =SUN_TOP_CTRL_BASE_V7
79
80 /* Check SUN_TOP_CTRL base */
8110: ldrne \rp, =SUN_TOP_CTRL_BASE @ load SUN_TOP_CTRL PA
82 ldr \rv, [\rp, #0] @ get register contents
83ARM_BE8( rev \rv, \rv )
84 and \rv, \rv, #0xffffff00 @ strip revision bits [7:0]
85
86 /* Chip specific detection starts here */
8720: checkuart(\rp, \rv, 0x33900000, 3390)
8821: checkuart(\rp, \rv, 0x72160000, 7216)
8922: checkuart(\rp, \rv, 0x07216400, 72164)
9023: checkuart(\rp, \rv, 0x07216500, 72165)
9124: checkuart(\rp, \rv, 0x72500000, 7250)
9225: checkuart(\rp, \rv, 0x72550000, 7255)
9326: checkuart(\rp, \rv, 0x72600000, 7260)
9427: checkuart(\rp, \rv, 0x72680000, 7268)
9528: checkuart(\rp, \rv, 0x72710000, 7271)
9629: checkuart(\rp, \rv, 0x72780000, 7278)
9730: checkuart(\rp, \rv, 0x73640000, 7364)
9831: checkuart(\rp, \rv, 0x73660000, 7366)
9932: checkuart(\rp, \rv, 0x07437100, 74371)
10033: checkuart(\rp, \rv, 0x74390000, 7439)
10134: checkuart(\rp, \rv, 0x74450000, 7445)
102
103 /* No valid UART found */
10490: mov \rp, #0
105 /* fall through */
106
107 /* Record whichever UART we chose */
10891: str \rp, [\tmp, #4] @ Store in brcmstb_uart_phys
109 cmp \rp, #0 @ Valid UART address?
110 bne 92f @ Yes, go process it
111 str \rp, [\tmp, #8] @ Store 0 in brcmstb_uart_virt
112 b 100f @ Done
11392: and \rv, \rp, #0xffffff @ offset within 16MB section
114 add \rv, \rv, #REG_VIRT_BASE
115 str \rv, [\tmp, #8] @ Store in brcmstb_uart_virt
116 b 100f
117
118 .align
11999: .word .
120 .word brcmstb_uart_config
121 .ltorg
122
123 /* Load previously selected UART address */
124100: ldr \rp, [\tmp, #4] @ Load brcmstb_uart_phys
125 ldr \rv, [\tmp, #8] @ Load brcmstb_uart_virt
126 .endm
127
128 .macro store, rd, rx:vararg
129ARM_BE8( rev \rd, \rd )
130 str \rd, \rx
131 .endm
132
133 .macro load, rd, rx:vararg
134 ldr \rd, \rx
135ARM_BE8( rev \rd, \rd )
136 .endm
137
138 .macro senduart,rd,rx
139 store \rd, [\rx, #UART_TX << UART_SHIFT]
140 .endm
141
142 .macro busyuart,rd,rx
1431002: load \rd, [\rx, #UART_LSR << UART_SHIFT]
144 and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
145 teq \rd, #UART_LSR_TEMT | UART_LSR_THRE
146 bne 1002b
147 .endm
148
149 .macro waituarttxrdy,rd,rx
150 .endm
151
152 .macro waituartcts,rd,rx
153 .endm
154
155/*
156 * Storage for the state maintained by the macros above.
157 *
158 * In the kernel proper, this data is located in arch/arm/mach-bcm/brcmstb.c.
159 * That's because this header is included from multiple files, and we only
160 * want a single copy of the data. In particular, the UART probing code above
161 * assumes it's running using physical addresses. This is true when this file
162 * is included from head.o, but not when included from debug.o. So we need
163 * to share the probe results between the two copies, rather than having
164 * to re-run the probing again later.
165 *
166 * In the decompressor, we put the symbol/storage right here, since common.c
167 * isn't included in the decompressor build. This symbol gets put in .text
168 * even though it's really data, since .data is discarded from the
169 * decompressor. Luckily, .text is writeable in the decompressor, unless
170 * CONFIG_ZBOOT_ROM. That dependency is handled in arch/arm/Kconfig.debug.
171 */
172#if defined(ZIMAGE)
173brcmstb_uart_config:
174 /* Debug UART initialization required */
175 .word 1
176 /* Debug UART physical address */
177 .word 0
178 /* Debug UART virtual address */
179 .word 0
180#endif