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1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * arch/arm/include/asm/pgtable.h
4 *
5 * Copyright (C) 1995-2002 Russell King
6 */
7#ifndef _ASMARM_PGTABLE_H
8#define _ASMARM_PGTABLE_H
9
10#include <linux/const.h>
11#include <asm/proc-fns.h>
12
13#ifndef CONFIG_MMU
14
15#include <asm-generic/pgtable-nopud.h>
16#include <asm/pgtable-nommu.h>
17
18#else
19
20#include <asm-generic/pgtable-nopud.h>
21#include <asm/memory.h>
22#include <asm/pgtable-hwdef.h>
23
24
25#include <asm/tlbflush.h>
26
27#ifdef CONFIG_ARM_LPAE
28#include <asm/pgtable-3level.h>
29#else
30#include <asm/pgtable-2level.h>
31#endif
32
33/*
34 * Just any arbitrary offset to the start of the vmalloc VM area: the
35 * current 8MB value just means that there will be a 8MB "hole" after the
36 * physical memory until the kernel virtual memory starts. That means that
37 * any out-of-bounds memory accesses will hopefully be caught.
38 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
39 * area for the same reason. ;)
40 */
41#define VMALLOC_OFFSET (8*1024*1024)
42#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
43#define VMALLOC_END 0xff800000UL
44
45#define LIBRARY_TEXT_START 0x0c000000
46
47#ifndef __ASSEMBLY__
48extern void __pte_error(const char *file, int line, pte_t);
49extern void __pmd_error(const char *file, int line, pmd_t);
50extern void __pgd_error(const char *file, int line, pgd_t);
51
52#define pte_ERROR(pte) __pte_error(__FILE__, __LINE__, pte)
53#define pmd_ERROR(pmd) __pmd_error(__FILE__, __LINE__, pmd)
54#define pgd_ERROR(pgd) __pgd_error(__FILE__, __LINE__, pgd)
55
56/*
57 * This is the lowest virtual address we can permit any user space
58 * mapping to be mapped at. This is particularly important for
59 * non-high vector CPUs.
60 */
61#define FIRST_USER_ADDRESS (PAGE_SIZE * 2)
62
63/*
64 * Use TASK_SIZE as the ceiling argument for free_pgtables() and
65 * free_pgd_range() to avoid freeing the modules pmd when LPAE is enabled (pmd
66 * page shared between user and kernel).
67 */
68#ifdef CONFIG_ARM_LPAE
69#define USER_PGTABLES_CEILING TASK_SIZE
70#endif
71
72/*
73 * The pgprot_* and protection_map entries will be fixed up in runtime
74 * to include the cachable and bufferable bits based on memory policy,
75 * as well as any architecture dependent bits like global/ASID and SMP
76 * shared mapping bits.
77 */
78#define _L_PTE_DEFAULT L_PTE_PRESENT | L_PTE_YOUNG
79
80extern pgprot_t pgprot_user;
81extern pgprot_t pgprot_kernel;
82
83#define _MOD_PROT(p, b) __pgprot(pgprot_val(p) | (b))
84
85#define PAGE_NONE _MOD_PROT(pgprot_user, L_PTE_XN | L_PTE_RDONLY | L_PTE_NONE)
86#define PAGE_SHARED _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_XN)
87#define PAGE_SHARED_EXEC _MOD_PROT(pgprot_user, L_PTE_USER)
88#define PAGE_COPY _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_RDONLY | L_PTE_XN)
89#define PAGE_COPY_EXEC _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_RDONLY)
90#define PAGE_READONLY _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_RDONLY | L_PTE_XN)
91#define PAGE_READONLY_EXEC _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_RDONLY)
92#define PAGE_KERNEL _MOD_PROT(pgprot_kernel, L_PTE_XN)
93#define PAGE_KERNEL_EXEC pgprot_kernel
94
95#define __PAGE_NONE __pgprot(_L_PTE_DEFAULT | L_PTE_RDONLY | L_PTE_XN | L_PTE_NONE)
96#define __PAGE_SHARED __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_XN)
97#define __PAGE_SHARED_EXEC __pgprot(_L_PTE_DEFAULT | L_PTE_USER)
98#define __PAGE_COPY __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_RDONLY | L_PTE_XN)
99#define __PAGE_COPY_EXEC __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_RDONLY)
100#define __PAGE_READONLY __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_RDONLY | L_PTE_XN)
101#define __PAGE_READONLY_EXEC __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_RDONLY)
102
103#define __pgprot_modify(prot,mask,bits) \
104 __pgprot((pgprot_val(prot) & ~(mask)) | (bits))
105
106#define pgprot_noncached(prot) \
107 __pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_UNCACHED)
108
109#define pgprot_writecombine(prot) \
110 __pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_BUFFERABLE)
111
112#define pgprot_stronglyordered(prot) \
113 __pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_UNCACHED)
114
115#define pgprot_device(prot) \
116 __pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_DEV_SHARED | L_PTE_SHARED | L_PTE_DIRTY | L_PTE_XN)
117
118#ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE
119#define pgprot_dmacoherent(prot) \
120 __pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_BUFFERABLE | L_PTE_XN)
121#define __HAVE_PHYS_MEM_ACCESS_PROT
122struct file;
123extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
124 unsigned long size, pgprot_t vma_prot);
125#else
126#define pgprot_dmacoherent(prot) \
127 __pgprot_modify(prot, L_PTE_MT_MASK, L_PTE_MT_UNCACHED | L_PTE_XN)
128#endif
129
130#endif /* __ASSEMBLY__ */
131
132/*
133 * The table below defines the page protection levels that we insert into our
134 * Linux page table version. These get translated into the best that the
135 * architecture can perform. Note that on most ARM hardware:
136 * 1) We cannot do execute protection
137 * 2) If we could do execute protection, then read is implied
138 * 3) write implies read permissions
139 */
140#define __P000 __PAGE_NONE
141#define __P001 __PAGE_READONLY
142#define __P010 __PAGE_COPY
143#define __P011 __PAGE_COPY
144#define __P100 __PAGE_READONLY_EXEC
145#define __P101 __PAGE_READONLY_EXEC
146#define __P110 __PAGE_COPY_EXEC
147#define __P111 __PAGE_COPY_EXEC
148
149#define __S000 __PAGE_NONE
150#define __S001 __PAGE_READONLY
151#define __S010 __PAGE_SHARED
152#define __S011 __PAGE_SHARED
153#define __S100 __PAGE_READONLY_EXEC
154#define __S101 __PAGE_READONLY_EXEC
155#define __S110 __PAGE_SHARED_EXEC
156#define __S111 __PAGE_SHARED_EXEC
157
158#ifndef __ASSEMBLY__
159/*
160 * ZERO_PAGE is a global shared page that is always zero: used
161 * for zero-mapped memory areas etc..
162 */
163extern struct page *empty_zero_page;
164#define ZERO_PAGE(vaddr) (empty_zero_page)
165
166
167extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
168
169#define pmd_none(pmd) (!pmd_val(pmd))
170
171static inline pte_t *pmd_page_vaddr(pmd_t pmd)
172{
173 return __va(pmd_val(pmd) & PHYS_MASK & (s32)PAGE_MASK);
174}
175
176#define pmd_page(pmd) pfn_to_page(__phys_to_pfn(pmd_val(pmd) & PHYS_MASK))
177
178#define pte_pfn(pte) ((pte_val(pte) & PHYS_MASK) >> PAGE_SHIFT)
179#define pfn_pte(pfn,prot) __pte(__pfn_to_phys(pfn) | pgprot_val(prot))
180
181#define pte_page(pte) pfn_to_page(pte_pfn(pte))
182#define mk_pte(page,prot) pfn_pte(page_to_pfn(page), prot)
183
184#define pte_clear(mm,addr,ptep) set_pte_ext(ptep, __pte(0), 0)
185
186#define pte_isset(pte, val) ((u32)(val) == (val) ? pte_val(pte) & (val) \
187 : !!(pte_val(pte) & (val)))
188#define pte_isclear(pte, val) (!(pte_val(pte) & (val)))
189
190#define pte_none(pte) (!pte_val(pte))
191#define pte_present(pte) (pte_isset((pte), L_PTE_PRESENT))
192#define pte_valid(pte) (pte_isset((pte), L_PTE_VALID))
193#define pte_accessible(mm, pte) (mm_tlb_flush_pending(mm) ? pte_present(pte) : pte_valid(pte))
194#define pte_write(pte) (pte_isclear((pte), L_PTE_RDONLY))
195#define pte_dirty(pte) (pte_isset((pte), L_PTE_DIRTY))
196#define pte_young(pte) (pte_isset((pte), L_PTE_YOUNG))
197#define pte_exec(pte) (pte_isclear((pte), L_PTE_XN))
198
199#define pte_valid_user(pte) \
200 (pte_valid(pte) && pte_isset((pte), L_PTE_USER) && pte_young(pte))
201
202static inline bool pte_access_permitted(pte_t pte, bool write)
203{
204 pteval_t mask = L_PTE_PRESENT | L_PTE_USER;
205 pteval_t needed = mask;
206
207 if (write)
208 mask |= L_PTE_RDONLY;
209
210 return (pte_val(pte) & mask) == needed;
211}
212#define pte_access_permitted pte_access_permitted
213
214#if __LINUX_ARM_ARCH__ < 6
215static inline void __sync_icache_dcache(pte_t pteval)
216{
217}
218#else
219extern void __sync_icache_dcache(pte_t pteval);
220#endif
221
222void set_pte_at(struct mm_struct *mm, unsigned long addr,
223 pte_t *ptep, pte_t pteval);
224
225static inline pte_t clear_pte_bit(pte_t pte, pgprot_t prot)
226{
227 pte_val(pte) &= ~pgprot_val(prot);
228 return pte;
229}
230
231static inline pte_t set_pte_bit(pte_t pte, pgprot_t prot)
232{
233 pte_val(pte) |= pgprot_val(prot);
234 return pte;
235}
236
237static inline pte_t pte_wrprotect(pte_t pte)
238{
239 return set_pte_bit(pte, __pgprot(L_PTE_RDONLY));
240}
241
242static inline pte_t pte_mkwrite(pte_t pte)
243{
244 return clear_pte_bit(pte, __pgprot(L_PTE_RDONLY));
245}
246
247static inline pte_t pte_mkclean(pte_t pte)
248{
249 return clear_pte_bit(pte, __pgprot(L_PTE_DIRTY));
250}
251
252static inline pte_t pte_mkdirty(pte_t pte)
253{
254 return set_pte_bit(pte, __pgprot(L_PTE_DIRTY));
255}
256
257static inline pte_t pte_mkold(pte_t pte)
258{
259 return clear_pte_bit(pte, __pgprot(L_PTE_YOUNG));
260}
261
262static inline pte_t pte_mkyoung(pte_t pte)
263{
264 return set_pte_bit(pte, __pgprot(L_PTE_YOUNG));
265}
266
267static inline pte_t pte_mkexec(pte_t pte)
268{
269 return clear_pte_bit(pte, __pgprot(L_PTE_XN));
270}
271
272static inline pte_t pte_mknexec(pte_t pte)
273{
274 return set_pte_bit(pte, __pgprot(L_PTE_XN));
275}
276
277static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
278{
279 const pteval_t mask = L_PTE_XN | L_PTE_RDONLY | L_PTE_USER |
280 L_PTE_NONE | L_PTE_VALID;
281 pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask);
282 return pte;
283}
284
285/*
286 * Encode and decode a swap entry. Swap entries are stored in the Linux
287 * page tables as follows:
288 *
289 * 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1
290 * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
291 * <--------------- offset ------------------------> < type -> 0 0
292 *
293 * This gives us up to 31 swap files and 128GB per swap file. Note that
294 * the offset field is always non-zero.
295 */
296#define __SWP_TYPE_SHIFT 2
297#define __SWP_TYPE_BITS 5
298#define __SWP_TYPE_MASK ((1 << __SWP_TYPE_BITS) - 1)
299#define __SWP_OFFSET_SHIFT (__SWP_TYPE_BITS + __SWP_TYPE_SHIFT)
300
301#define __swp_type(x) (((x).val >> __SWP_TYPE_SHIFT) & __SWP_TYPE_MASK)
302#define __swp_offset(x) ((x).val >> __SWP_OFFSET_SHIFT)
303#define __swp_entry(type,offset) ((swp_entry_t) { ((type) << __SWP_TYPE_SHIFT) | ((offset) << __SWP_OFFSET_SHIFT) })
304
305#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
306#define __swp_entry_to_pte(swp) ((pte_t) { (swp).val })
307
308/*
309 * It is an error for the kernel to have more swap files than we can
310 * encode in the PTEs. This ensures that we know when MAX_SWAPFILES
311 * is increased beyond what we presently support.
312 */
313#define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > __SWP_TYPE_BITS)
314
315/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
316/* FIXME: this is not correct */
317#define kern_addr_valid(addr) (1)
318
319/*
320 * We provide our own arch_get_unmapped_area to cope with VIPT caches.
321 */
322#define HAVE_ARCH_UNMAPPED_AREA
323#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
324
325#endif /* !__ASSEMBLY__ */
326
327#endif /* CONFIG_MMU */
328
329#endif /* _ASMARM_PGTABLE_H */