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1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2#ifndef __TARGET_CORE_USER_H 3#define __TARGET_CORE_USER_H 4 5/* This header will be used by application too */ 6 7#include <linux/types.h> 8#include <linux/uio.h> 9 10#define TCMU_VERSION "2.0" 11 12/** 13 * DOC: Ring Design 14 * Ring Design 15 * ----------- 16 * 17 * The mmaped area is divided into three parts: 18 * 1) The mailbox (struct tcmu_mailbox, below); 19 * 2) The command ring; 20 * 3) Everything beyond the command ring (data). 21 * 22 * The mailbox tells userspace the offset of the command ring from the 23 * start of the shared memory region, and how big the command ring is. 24 * 25 * The kernel passes SCSI commands to userspace by putting a struct 26 * tcmu_cmd_entry in the ring, updating mailbox->cmd_head, and poking 27 * userspace via UIO's interrupt mechanism. 28 * 29 * tcmu_cmd_entry contains a header. If the header type is PAD, 30 * userspace should skip hdr->length bytes (mod cmdr_size) to find the 31 * next cmd_entry. 32 * 33 * Otherwise, the entry will contain offsets into the mmaped area that 34 * contain the cdb and data buffers -- the latter accessible via the 35 * iov array. iov addresses are also offsets into the shared area. 36 * 37 * When userspace is completed handling the command, set 38 * entry->rsp.scsi_status, fill in rsp.sense_buffer if appropriate, 39 * and also set mailbox->cmd_tail equal to the old cmd_tail plus 40 * hdr->length, mod cmdr_size. If cmd_tail doesn't equal cmd_head, it 41 * should process the next packet the same way, and so on. 42 */ 43 44#define TCMU_MAILBOX_VERSION 2 45#define ALIGN_SIZE 64 /* Should be enough for most CPUs */ 46#define TCMU_MAILBOX_FLAG_CAP_OOOC (1 << 0) /* Out-of-order completions */ 47#define TCMU_MAILBOX_FLAG_CAP_READ_LEN (1 << 1) /* Read data length */ 48#define TCMU_MAILBOX_FLAG_CAP_TMR (1 << 2) /* TMR notifications */ 49 50struct tcmu_mailbox { 51 __u16 version; 52 __u16 flags; 53 __u32 cmdr_off; 54 __u32 cmdr_size; 55 56 __u32 cmd_head; 57 58 /* Updated by user. On its own cacheline */ 59 __u32 cmd_tail __attribute__((__aligned__(ALIGN_SIZE))); 60 61} __packed; 62 63enum tcmu_opcode { 64 TCMU_OP_PAD = 0, 65 TCMU_OP_CMD, 66 TCMU_OP_TMR, 67}; 68 69/* 70 * Only a few opcodes, and length is 8-byte aligned, so use low bits for opcode. 71 */ 72struct tcmu_cmd_entry_hdr { 73 __u32 len_op; 74 __u16 cmd_id; 75 __u8 kflags; 76#define TCMU_UFLAG_UNKNOWN_OP 0x1 77#define TCMU_UFLAG_READ_LEN 0x2 78 __u8 uflags; 79 80} __packed; 81 82#define TCMU_OP_MASK 0x7 83 84static inline enum tcmu_opcode tcmu_hdr_get_op(__u32 len_op) 85{ 86 return len_op & TCMU_OP_MASK; 87} 88 89static inline void tcmu_hdr_set_op(__u32 *len_op, enum tcmu_opcode op) 90{ 91 *len_op &= ~TCMU_OP_MASK; 92 *len_op |= (op & TCMU_OP_MASK); 93} 94 95static inline __u32 tcmu_hdr_get_len(__u32 len_op) 96{ 97 return len_op & ~TCMU_OP_MASK; 98} 99 100static inline void tcmu_hdr_set_len(__u32 *len_op, __u32 len) 101{ 102 *len_op &= TCMU_OP_MASK; 103 *len_op |= len; 104} 105 106/* Currently the same as SCSI_SENSE_BUFFERSIZE */ 107#define TCMU_SENSE_BUFFERSIZE 96 108 109struct tcmu_cmd_entry { 110 struct tcmu_cmd_entry_hdr hdr; 111 112 union { 113 struct { 114 __u32 iov_cnt; 115 __u32 iov_bidi_cnt; 116 __u32 iov_dif_cnt; 117 __u64 cdb_off; 118 __u64 __pad1; 119 __u64 __pad2; 120 struct iovec iov[0]; 121 } req; 122 struct { 123 __u8 scsi_status; 124 __u8 __pad1; 125 __u16 __pad2; 126 __u32 read_len; 127 char sense_buffer[TCMU_SENSE_BUFFERSIZE]; 128 } rsp; 129 }; 130 131} __packed; 132 133struct tcmu_tmr_entry { 134 struct tcmu_cmd_entry_hdr hdr; 135 136#define TCMU_TMR_UNKNOWN 0 137#define TCMU_TMR_ABORT_TASK 1 138#define TCMU_TMR_ABORT_TASK_SET 2 139#define TCMU_TMR_CLEAR_ACA 3 140#define TCMU_TMR_CLEAR_TASK_SET 4 141#define TCMU_TMR_LUN_RESET 5 142#define TCMU_TMR_TARGET_WARM_RESET 6 143#define TCMU_TMR_TARGET_COLD_RESET 7 144/* Pseudo reset due to received PR OUT */ 145#define TCMU_TMR_LUN_RESET_PRO 128 146 __u8 tmr_type; 147 148 __u8 __pad1; 149 __u16 __pad2; 150 __u32 cmd_cnt; 151 __u64 __pad3; 152 __u64 __pad4; 153 __u16 cmd_ids[0]; 154} __packed; 155 156#define TCMU_OP_ALIGN_SIZE sizeof(__u64) 157 158enum tcmu_genl_cmd { 159 TCMU_CMD_UNSPEC, 160 TCMU_CMD_ADDED_DEVICE, 161 TCMU_CMD_REMOVED_DEVICE, 162 TCMU_CMD_RECONFIG_DEVICE, 163 TCMU_CMD_ADDED_DEVICE_DONE, 164 TCMU_CMD_REMOVED_DEVICE_DONE, 165 TCMU_CMD_RECONFIG_DEVICE_DONE, 166 TCMU_CMD_SET_FEATURES, 167 __TCMU_CMD_MAX, 168}; 169#define TCMU_CMD_MAX (__TCMU_CMD_MAX - 1) 170 171enum tcmu_genl_attr { 172 TCMU_ATTR_UNSPEC, 173 TCMU_ATTR_DEVICE, 174 TCMU_ATTR_MINOR, 175 TCMU_ATTR_PAD, 176 TCMU_ATTR_DEV_CFG, 177 TCMU_ATTR_DEV_SIZE, 178 TCMU_ATTR_WRITECACHE, 179 TCMU_ATTR_CMD_STATUS, 180 TCMU_ATTR_DEVICE_ID, 181 TCMU_ATTR_SUPP_KERN_CMD_REPLY, 182 __TCMU_ATTR_MAX, 183}; 184#define TCMU_ATTR_MAX (__TCMU_ATTR_MAX - 1) 185 186#endif