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1/* SPDX-License-Identifier: GPL-2.0-or-later */
2/*
3 * Framework and drivers for configuring and reading different PHYs
4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c
5 *
6 * Author: Andy Fleming
7 *
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
9 */
10
11#ifndef __PHY_H
12#define __PHY_H
13
14#include <linux/compiler.h>
15#include <linux/spinlock.h>
16#include <linux/ethtool.h>
17#include <linux/linkmode.h>
18#include <linux/netlink.h>
19#include <linux/mdio.h>
20#include <linux/mii.h>
21#include <linux/mii_timestamper.h>
22#include <linux/module.h>
23#include <linux/timer.h>
24#include <linux/workqueue.h>
25#include <linux/mod_devicetable.h>
26#include <linux/u64_stats_sync.h>
27#include <linux/irqreturn.h>
28#include <linux/iopoll.h>
29#include <linux/refcount.h>
30
31#include <linux/atomic.h>
32
33#define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
34 SUPPORTED_TP | \
35 SUPPORTED_MII)
36
37#define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
38 SUPPORTED_10baseT_Full)
39
40#define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
41 SUPPORTED_100baseT_Full)
42
43#define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
44 SUPPORTED_1000baseT_Full)
45
46extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init;
47extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init;
48extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init;
49extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init;
50extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init;
51extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init;
52extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init;
53extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init;
54
55#define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features)
56#define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features)
57#define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features)
58#define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features)
59#define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features)
60#define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features)
61#define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features)
62#define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features)
63
64extern const int phy_basic_ports_array[3];
65extern const int phy_fibre_port_array[1];
66extern const int phy_all_ports_features_array[7];
67extern const int phy_10_100_features_array[4];
68extern const int phy_basic_t1_features_array[2];
69extern const int phy_gbit_features_array[2];
70extern const int phy_10gbit_features_array[1];
71
72/*
73 * Set phydev->irq to PHY_POLL if interrupts are not supported,
74 * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if
75 * the attached driver handles the interrupt
76 */
77#define PHY_POLL -1
78#define PHY_IGNORE_INTERRUPT -2
79
80#define PHY_IS_INTERNAL 0x00000001
81#define PHY_RST_AFTER_CLK_EN 0x00000002
82#define PHY_POLL_CABLE_TEST 0x00000004
83#define MDIO_DEVICE_IS_PHY 0x80000000
84
85/**
86 * enum phy_interface_t - Interface Mode definitions
87 *
88 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch
89 * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined
90 * @PHY_INTERFACE_MODE_MII: Median-independent interface
91 * @PHY_INTERFACE_MODE_GMII: Gigabit median-independent interface
92 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface
93 * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface
94 * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface
95 * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface
96 * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface
97 * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay
98 * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay
99 * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay
100 * @PHY_INTERFACE_MODE_RTBI: Reduced TBI
101 * @PHY_INTERFACE_MODE_SMII: ??? MII
102 * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface
103 * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface
104 * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax
105 * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII
106 * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII
107 * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX
108 * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX
109 * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI
110 * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface
111 * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR
112 * @PHY_INTERFACE_MODE_USXGMII: Universal Serial 10GE MII
113 * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN
114 * @PHY_INTERFACE_MODE_MAX: Book keeping
115 *
116 * Describes the interface between the MAC and PHY.
117 */
118typedef enum {
119 PHY_INTERFACE_MODE_NA,
120 PHY_INTERFACE_MODE_INTERNAL,
121 PHY_INTERFACE_MODE_MII,
122 PHY_INTERFACE_MODE_GMII,
123 PHY_INTERFACE_MODE_SGMII,
124 PHY_INTERFACE_MODE_TBI,
125 PHY_INTERFACE_MODE_REVMII,
126 PHY_INTERFACE_MODE_RMII,
127 PHY_INTERFACE_MODE_RGMII,
128 PHY_INTERFACE_MODE_RGMII_ID,
129 PHY_INTERFACE_MODE_RGMII_RXID,
130 PHY_INTERFACE_MODE_RGMII_TXID,
131 PHY_INTERFACE_MODE_RTBI,
132 PHY_INTERFACE_MODE_SMII,
133 PHY_INTERFACE_MODE_XGMII,
134 PHY_INTERFACE_MODE_XLGMII,
135 PHY_INTERFACE_MODE_MOCA,
136 PHY_INTERFACE_MODE_QSGMII,
137 PHY_INTERFACE_MODE_TRGMII,
138 PHY_INTERFACE_MODE_1000BASEX,
139 PHY_INTERFACE_MODE_2500BASEX,
140 PHY_INTERFACE_MODE_RXAUI,
141 PHY_INTERFACE_MODE_XAUI,
142 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */
143 PHY_INTERFACE_MODE_10GBASER,
144 PHY_INTERFACE_MODE_USXGMII,
145 /* 10GBASE-KR - with Clause 73 AN */
146 PHY_INTERFACE_MODE_10GKR,
147 PHY_INTERFACE_MODE_MAX,
148} phy_interface_t;
149
150/**
151 * phy_supported_speeds - return all speeds currently supported by a PHY device
152 * @phy: The PHY device to return supported speeds of.
153 * @speeds: buffer to store supported speeds in.
154 * @size: size of speeds buffer.
155 *
156 * Description: Returns the number of supported speeds, and fills
157 * the speeds buffer with the supported speeds. If speeds buffer is
158 * too small to contain all currently supported speeds, will return as
159 * many speeds as can fit.
160 */
161unsigned int phy_supported_speeds(struct phy_device *phy,
162 unsigned int *speeds,
163 unsigned int size);
164
165/**
166 * phy_modes - map phy_interface_t enum to device tree binding of phy-mode
167 * @interface: enum phy_interface_t value
168 *
169 * Description: maps enum &phy_interface_t defined in this file
170 * into the device tree binding of 'phy-mode', so that Ethernet
171 * device driver can get PHY interface from device tree.
172 */
173static inline const char *phy_modes(phy_interface_t interface)
174{
175 switch (interface) {
176 case PHY_INTERFACE_MODE_NA:
177 return "";
178 case PHY_INTERFACE_MODE_INTERNAL:
179 return "internal";
180 case PHY_INTERFACE_MODE_MII:
181 return "mii";
182 case PHY_INTERFACE_MODE_GMII:
183 return "gmii";
184 case PHY_INTERFACE_MODE_SGMII:
185 return "sgmii";
186 case PHY_INTERFACE_MODE_TBI:
187 return "tbi";
188 case PHY_INTERFACE_MODE_REVMII:
189 return "rev-mii";
190 case PHY_INTERFACE_MODE_RMII:
191 return "rmii";
192 case PHY_INTERFACE_MODE_RGMII:
193 return "rgmii";
194 case PHY_INTERFACE_MODE_RGMII_ID:
195 return "rgmii-id";
196 case PHY_INTERFACE_MODE_RGMII_RXID:
197 return "rgmii-rxid";
198 case PHY_INTERFACE_MODE_RGMII_TXID:
199 return "rgmii-txid";
200 case PHY_INTERFACE_MODE_RTBI:
201 return "rtbi";
202 case PHY_INTERFACE_MODE_SMII:
203 return "smii";
204 case PHY_INTERFACE_MODE_XGMII:
205 return "xgmii";
206 case PHY_INTERFACE_MODE_XLGMII:
207 return "xlgmii";
208 case PHY_INTERFACE_MODE_MOCA:
209 return "moca";
210 case PHY_INTERFACE_MODE_QSGMII:
211 return "qsgmii";
212 case PHY_INTERFACE_MODE_TRGMII:
213 return "trgmii";
214 case PHY_INTERFACE_MODE_1000BASEX:
215 return "1000base-x";
216 case PHY_INTERFACE_MODE_2500BASEX:
217 return "2500base-x";
218 case PHY_INTERFACE_MODE_RXAUI:
219 return "rxaui";
220 case PHY_INTERFACE_MODE_XAUI:
221 return "xaui";
222 case PHY_INTERFACE_MODE_10GBASER:
223 return "10gbase-r";
224 case PHY_INTERFACE_MODE_USXGMII:
225 return "usxgmii";
226 case PHY_INTERFACE_MODE_10GKR:
227 return "10gbase-kr";
228 default:
229 return "unknown";
230 }
231}
232
233
234#define PHY_INIT_TIMEOUT 100000
235#define PHY_FORCE_TIMEOUT 10
236
237#define PHY_MAX_ADDR 32
238
239/* Used when trying to connect to a specific phy (mii bus id:phy device id) */
240#define PHY_ID_FMT "%s:%02x"
241
242#define MII_BUS_ID_SIZE 61
243
244struct device;
245struct phylink;
246struct sfp_bus;
247struct sfp_upstream_ops;
248struct sk_buff;
249
250/**
251 * struct mdio_bus_stats - Statistics counters for MDIO busses
252 * @transfers: Total number of transfers, i.e. @writes + @reads
253 * @errors: Number of MDIO transfers that returned an error
254 * @writes: Number of write transfers
255 * @reads: Number of read transfers
256 * @syncp: Synchronisation for incrementing statistics
257 */
258struct mdio_bus_stats {
259 u64_stats_t transfers;
260 u64_stats_t errors;
261 u64_stats_t writes;
262 u64_stats_t reads;
263 /* Must be last, add new statistics above */
264 struct u64_stats_sync syncp;
265};
266
267/**
268 * struct phy_package_shared - Shared information in PHY packages
269 * @addr: Common PHY address used to combine PHYs in one package
270 * @refcnt: Number of PHYs connected to this shared data
271 * @flags: Initialization of PHY package
272 * @priv_size: Size of the shared private data @priv
273 * @priv: Driver private data shared across a PHY package
274 *
275 * Represents a shared structure between different phydev's in the same
276 * package, for example a quad PHY. See phy_package_join() and
277 * phy_package_leave().
278 */
279struct phy_package_shared {
280 int addr;
281 refcount_t refcnt;
282 unsigned long flags;
283 size_t priv_size;
284
285 /* private data pointer */
286 /* note that this pointer is shared between different phydevs and
287 * the user has to take care of appropriate locking. It is allocated
288 * and freed automatically by phy_package_join() and
289 * phy_package_leave().
290 */
291 void *priv;
292};
293
294/* used as bit number in atomic bitops */
295#define PHY_SHARED_F_INIT_DONE 0
296#define PHY_SHARED_F_PROBE_DONE 1
297
298/**
299 * struct mii_bus - Represents an MDIO bus
300 *
301 * @owner: Who owns this device
302 * @name: User friendly name for this MDIO device, or driver name
303 * @id: Unique identifier for this bus, typical from bus hierarchy
304 * @priv: Driver private data
305 *
306 * The Bus class for PHYs. Devices which provide access to
307 * PHYs should register using this structure
308 */
309struct mii_bus {
310 struct module *owner;
311 const char *name;
312 char id[MII_BUS_ID_SIZE];
313 void *priv;
314 /** @read: Perform a read transfer on the bus */
315 int (*read)(struct mii_bus *bus, int addr, int regnum);
316 /** @write: Perform a write transfer on the bus */
317 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
318 /** @reset: Perform a reset of the bus */
319 int (*reset)(struct mii_bus *bus);
320
321 /** @stats: Statistic counters per device on the bus */
322 struct mdio_bus_stats stats[PHY_MAX_ADDR];
323
324 /**
325 * @mdio_lock: A lock to ensure that only one thing can read/write
326 * the MDIO bus at a time
327 */
328 struct mutex mdio_lock;
329
330 /** @parent: Parent device of this bus */
331 struct device *parent;
332 /** @state: State of bus structure */
333 enum {
334 MDIOBUS_ALLOCATED = 1,
335 MDIOBUS_REGISTERED,
336 MDIOBUS_UNREGISTERED,
337 MDIOBUS_RELEASED,
338 } state;
339
340 /** @dev: Kernel device representation */
341 struct device dev;
342
343 /** @mdio_map: list of all MDIO devices on bus */
344 struct mdio_device *mdio_map[PHY_MAX_ADDR];
345
346 /** @phy_mask: PHY addresses to be ignored when probing */
347 u32 phy_mask;
348
349 /** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */
350 u32 phy_ignore_ta_mask;
351
352 /**
353 * @irq: An array of interrupts, each PHY's interrupt at the index
354 * matching its address
355 */
356 int irq[PHY_MAX_ADDR];
357
358 /** @reset_delay_us: GPIO reset pulse width in microseconds */
359 int reset_delay_us;
360 /** @reset_post_delay_us: GPIO reset deassert delay in microseconds */
361 int reset_post_delay_us;
362 /** @reset_gpiod: Reset GPIO descriptor pointer */
363 struct gpio_desc *reset_gpiod;
364
365 /** @probe_capabilities: bus capabilities, used for probing */
366 enum {
367 MDIOBUS_NO_CAP = 0,
368 MDIOBUS_C22,
369 MDIOBUS_C45,
370 MDIOBUS_C22_C45,
371 } probe_capabilities;
372
373 /** @shared_lock: protect access to the shared element */
374 struct mutex shared_lock;
375
376 /** @shared: shared state across different PHYs */
377 struct phy_package_shared *shared[PHY_MAX_ADDR];
378};
379#define to_mii_bus(d) container_of(d, struct mii_bus, dev)
380
381struct mii_bus *mdiobus_alloc_size(size_t size);
382
383/**
384 * mdiobus_alloc - Allocate an MDIO bus structure
385 *
386 * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready
387 * for the driver to register the bus.
388 */
389static inline struct mii_bus *mdiobus_alloc(void)
390{
391 return mdiobus_alloc_size(0);
392}
393
394int __mdiobus_register(struct mii_bus *bus, struct module *owner);
395int __devm_mdiobus_register(struct device *dev, struct mii_bus *bus,
396 struct module *owner);
397#define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
398#define devm_mdiobus_register(dev, bus) \
399 __devm_mdiobus_register(dev, bus, THIS_MODULE)
400
401void mdiobus_unregister(struct mii_bus *bus);
402void mdiobus_free(struct mii_bus *bus);
403struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
404static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
405{
406 return devm_mdiobus_alloc_size(dev, 0);
407}
408
409struct mii_bus *mdio_find_bus(const char *mdio_name);
410struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr);
411
412#define PHY_INTERRUPT_DISABLED false
413#define PHY_INTERRUPT_ENABLED true
414
415/**
416 * enum phy_state - PHY state machine states:
417 *
418 * @PHY_DOWN: PHY device and driver are not ready for anything. probe
419 * should be called if and only if the PHY is in this state,
420 * given that the PHY device exists.
421 * - PHY driver probe function will set the state to @PHY_READY
422 *
423 * @PHY_READY: PHY is ready to send and receive packets, but the
424 * controller is not. By default, PHYs which do not implement
425 * probe will be set to this state by phy_probe().
426 * - start will set the state to UP
427 *
428 * @PHY_UP: The PHY and attached device are ready to do work.
429 * Interrupts should be started here.
430 * - timer moves to @PHY_NOLINK or @PHY_RUNNING
431 *
432 * @PHY_NOLINK: PHY is up, but not currently plugged in.
433 * - irq or timer will set @PHY_RUNNING if link comes back
434 * - phy_stop moves to @PHY_HALTED
435 *
436 * @PHY_RUNNING: PHY is currently up, running, and possibly sending
437 * and/or receiving packets
438 * - irq or timer will set @PHY_NOLINK if link goes down
439 * - phy_stop moves to @PHY_HALTED
440 *
441 * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending
442 * is not expected to work, carrier will be indicated as down. PHY will be
443 * poll once per second, or on interrupt for it current state.
444 * Once complete, move to UP to restart the PHY.
445 * - phy_stop aborts the running test and moves to @PHY_HALTED
446 *
447 * @PHY_HALTED: PHY is up, but no polling or interrupts are done. Or
448 * PHY is in an error state.
449 * - phy_start moves to @PHY_UP
450 */
451enum phy_state {
452 PHY_DOWN = 0,
453 PHY_READY,
454 PHY_HALTED,
455 PHY_UP,
456 PHY_RUNNING,
457 PHY_NOLINK,
458 PHY_CABLETEST,
459};
460
461#define MDIO_MMD_NUM 32
462
463/**
464 * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
465 * @devices_in_package: IEEE 802.3 devices in package register value.
466 * @mmds_present: bit vector of MMDs present.
467 * @device_ids: The device identifer for each present device.
468 */
469struct phy_c45_device_ids {
470 u32 devices_in_package;
471 u32 mmds_present;
472 u32 device_ids[MDIO_MMD_NUM];
473};
474
475struct macsec_context;
476struct macsec_ops;
477
478/**
479 * struct phy_device - An instance of a PHY
480 *
481 * @mdio: MDIO bus this PHY is on
482 * @drv: Pointer to the driver for this PHY instance
483 * @phy_id: UID for this device found during discovery
484 * @c45_ids: 802.3-c45 Device Identifiers if is_c45.
485 * @is_c45: Set to true if this PHY uses clause 45 addressing.
486 * @is_internal: Set to true if this PHY is internal to a MAC.
487 * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc.
488 * @is_gigabit_capable: Set to true if PHY supports 1000Mbps
489 * @has_fixups: Set to true if this PHY has fixups/quirks.
490 * @suspended: Set to true if this PHY has been suspended successfully.
491 * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus.
492 * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal.
493 * @loopback_enabled: Set true if this PHY has been loopbacked successfully.
494 * @downshifted_rate: Set true if link speed has been downshifted.
495 * @state: State of the PHY for management purposes
496 * @dev_flags: Device-specific flags used by the PHY driver.
497 * @irq: IRQ number of the PHY's interrupt (-1 if none)
498 * @phy_timer: The timer for handling the state machine
499 * @phylink: Pointer to phylink instance for this PHY
500 * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached
501 * @sfp_bus: SFP bus attached to this PHY's fiber port
502 * @attached_dev: The attached enet driver's device instance ptr
503 * @adjust_link: Callback for the enet controller to respond to changes: in the
504 * link state.
505 * @phy_link_change: Callback for phylink for notification of link change
506 * @macsec_ops: MACsec offloading ops.
507 *
508 * @speed: Current link speed
509 * @duplex: Current duplex
510 * @pause: Current pause
511 * @asym_pause: Current asymmetric pause
512 * @supported: Combined MAC/PHY supported linkmodes
513 * @advertising: Currently advertised linkmodes
514 * @adv_old: Saved advertised while power saving for WoL
515 * @lp_advertising: Current link partner advertised linkmodes
516 * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited
517 * @autoneg: Flag autoneg being used
518 * @link: Current link state
519 * @autoneg_complete: Flag auto negotiation of the link has completed
520 * @mdix: Current crossover
521 * @mdix_ctrl: User setting of crossover
522 * @interrupts: Flag interrupts have been enabled
523 * @interface: enum phy_interface_t value
524 * @skb: Netlink message for cable diagnostics
525 * @nest: Netlink nest used for cable diagnostics
526 * @ehdr: nNtlink header for cable diagnostics
527 * @phy_led_triggers: Array of LED triggers
528 * @phy_num_led_triggers: Number of triggers in @phy_led_triggers
529 * @led_link_trigger: LED trigger for link up/down
530 * @last_triggered: last LED trigger for link speed
531 * @master_slave_set: User requested master/slave configuration
532 * @master_slave_get: Current master/slave advertisement
533 * @master_slave_state: Current master/slave configuration
534 * @mii_ts: Pointer to time stamper callbacks
535 * @lock: Mutex for serialization access to PHY
536 * @state_queue: Work queue for state machine
537 * @shared: Pointer to private data shared by phys in one package
538 * @priv: Pointer to driver private data
539 *
540 * interrupts currently only supports enabled or disabled,
541 * but could be changed in the future to support enabling
542 * and disabling specific interrupts
543 *
544 * Contains some infrastructure for polling and interrupt
545 * handling, as well as handling shifts in PHY hardware state
546 */
547struct phy_device {
548 struct mdio_device mdio;
549
550 /* Information about the PHY type */
551 /* And management functions */
552 struct phy_driver *drv;
553
554 u32 phy_id;
555
556 struct phy_c45_device_ids c45_ids;
557 unsigned is_c45:1;
558 unsigned is_internal:1;
559 unsigned is_pseudo_fixed_link:1;
560 unsigned is_gigabit_capable:1;
561 unsigned has_fixups:1;
562 unsigned suspended:1;
563 unsigned suspended_by_mdio_bus:1;
564 unsigned sysfs_links:1;
565 unsigned loopback_enabled:1;
566 unsigned downshifted_rate:1;
567
568 unsigned autoneg:1;
569 /* The most recently read link state */
570 unsigned link:1;
571 unsigned autoneg_complete:1;
572
573 /* Interrupts are enabled */
574 unsigned interrupts:1;
575
576 enum phy_state state;
577
578 u32 dev_flags;
579
580 phy_interface_t interface;
581
582 /*
583 * forced speed & duplex (no autoneg)
584 * partner speed & duplex & pause (autoneg)
585 */
586 int speed;
587 int duplex;
588 int pause;
589 int asym_pause;
590 u8 master_slave_get;
591 u8 master_slave_set;
592 u8 master_slave_state;
593
594 /* Union of PHY and Attached devices' supported link modes */
595 /* See ethtool.h for more info */
596 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
597 __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);
598 __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising);
599 /* used with phy_speed_down */
600 __ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old);
601
602 /* Energy efficient ethernet modes which should be prohibited */
603 u32 eee_broken_modes;
604
605#ifdef CONFIG_LED_TRIGGER_PHY
606 struct phy_led_trigger *phy_led_triggers;
607 unsigned int phy_num_led_triggers;
608 struct phy_led_trigger *last_triggered;
609
610 struct phy_led_trigger *led_link_trigger;
611#endif
612
613 /*
614 * Interrupt number for this PHY
615 * -1 means no interrupt
616 */
617 int irq;
618
619 /* private data pointer */
620 /* For use by PHYs to maintain extra state */
621 void *priv;
622
623 /* shared data pointer */
624 /* For use by PHYs inside the same package that need a shared state. */
625 struct phy_package_shared *shared;
626
627 /* Reporting cable test results */
628 struct sk_buff *skb;
629 void *ehdr;
630 struct nlattr *nest;
631
632 /* Interrupt and Polling infrastructure */
633 struct delayed_work state_queue;
634
635 struct mutex lock;
636
637 /* This may be modified under the rtnl lock */
638 bool sfp_bus_attached;
639 struct sfp_bus *sfp_bus;
640 struct phylink *phylink;
641 struct net_device *attached_dev;
642 struct mii_timestamper *mii_ts;
643
644 u8 mdix;
645 u8 mdix_ctrl;
646
647 void (*phy_link_change)(struct phy_device *phydev, bool up);
648 void (*adjust_link)(struct net_device *dev);
649
650#if IS_ENABLED(CONFIG_MACSEC)
651 /* MACsec management functions */
652 const struct macsec_ops *macsec_ops;
653#endif
654};
655#define to_phy_device(d) container_of(to_mdio_device(d), \
656 struct phy_device, mdio)
657
658/**
659 * struct phy_tdr_config - Configuration of a TDR raw test
660 *
661 * @first: Distance for first data collection point
662 * @last: Distance for last data collection point
663 * @step: Step between data collection points
664 * @pair: Bitmap of cable pairs to collect data for
665 *
666 * A structure containing possible configuration parameters
667 * for a TDR cable test. The driver does not need to implement
668 * all the parameters, but should report what is actually used.
669 * All distances are in centimeters.
670 */
671struct phy_tdr_config {
672 u32 first;
673 u32 last;
674 u32 step;
675 s8 pair;
676};
677#define PHY_PAIR_ALL -1
678
679/**
680 * struct phy_driver - Driver structure for a particular PHY type
681 *
682 * @mdiodrv: Data common to all MDIO devices
683 * @phy_id: The result of reading the UID registers of this PHY
684 * type, and ANDing them with the phy_id_mask. This driver
685 * only works for PHYs with IDs which match this field
686 * @name: The friendly name of this PHY type
687 * @phy_id_mask: Defines the important bits of the phy_id
688 * @features: A mandatory list of features (speed, duplex, etc)
689 * supported by this PHY
690 * @flags: A bitfield defining certain other features this PHY
691 * supports (like interrupts)
692 * @driver_data: Static driver data
693 *
694 * All functions are optional. If config_aneg or read_status
695 * are not implemented, the phy core uses the genphy versions.
696 * Note that none of these functions should be called from
697 * interrupt time. The goal is for the bus read/write functions
698 * to be able to block when the bus transaction is happening,
699 * and be freed up by an interrupt (The MPC85xx has this ability,
700 * though it is not currently supported in the driver).
701 */
702struct phy_driver {
703 struct mdio_driver_common mdiodrv;
704 u32 phy_id;
705 char *name;
706 u32 phy_id_mask;
707 const unsigned long * const features;
708 u32 flags;
709 const void *driver_data;
710
711 /**
712 * @soft_reset: Called to issue a PHY software reset
713 */
714 int (*soft_reset)(struct phy_device *phydev);
715
716 /**
717 * @config_init: Called to initialize the PHY,
718 * including after a reset
719 */
720 int (*config_init)(struct phy_device *phydev);
721
722 /**
723 * @probe: Called during discovery. Used to set
724 * up device-specific structures, if any
725 */
726 int (*probe)(struct phy_device *phydev);
727
728 /**
729 * @get_features: Probe the hardware to determine what
730 * abilities it has. Should only set phydev->supported.
731 */
732 int (*get_features)(struct phy_device *phydev);
733
734 /* PHY Power Management */
735 /** @suspend: Suspend the hardware, saving state if needed */
736 int (*suspend)(struct phy_device *phydev);
737 /** @resume: Resume the hardware, restoring state if needed */
738 int (*resume)(struct phy_device *phydev);
739
740 /**
741 * @config_aneg: Configures the advertisement and resets
742 * autonegotiation if phydev->autoneg is on,
743 * forces the speed to the current settings in phydev
744 * if phydev->autoneg is off
745 */
746 int (*config_aneg)(struct phy_device *phydev);
747
748 /** @aneg_done: Determines the auto negotiation result */
749 int (*aneg_done)(struct phy_device *phydev);
750
751 /** @read_status: Determines the negotiated speed and duplex */
752 int (*read_status)(struct phy_device *phydev);
753
754 /** @ack_interrupt: Clears any pending interrupts */
755 int (*ack_interrupt)(struct phy_device *phydev);
756
757 /** @config_intr: Enables or disables interrupts */
758 int (*config_intr)(struct phy_device *phydev);
759
760 /**
761 * @did_interrupt: Checks if the PHY generated an interrupt.
762 * For multi-PHY devices with shared PHY interrupt pin
763 * Set interrupt bits have to be cleared.
764 */
765 int (*did_interrupt)(struct phy_device *phydev);
766
767 /** @handle_interrupt: Override default interrupt handling */
768 irqreturn_t (*handle_interrupt)(struct phy_device *phydev);
769
770 /** @remove: Clears up any memory if needed */
771 void (*remove)(struct phy_device *phydev);
772
773 /**
774 * @match_phy_device: Returns true if this is a suitable
775 * driver for the given phydev. If NULL, matching is based on
776 * phy_id and phy_id_mask.
777 */
778 int (*match_phy_device)(struct phy_device *phydev);
779
780 /**
781 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY
782 * register changes to enable Wake on LAN, so set_wol is
783 * provided to be called in the ethernet driver's set_wol
784 * function.
785 */
786 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
787
788 /**
789 * @get_wol: See set_wol, but for checking whether Wake on LAN
790 * is enabled.
791 */
792 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
793
794 /**
795 * @link_change_notify: Called to inform a PHY device driver
796 * when the core is about to change the link state. This
797 * callback is supposed to be used as fixup hook for drivers
798 * that need to take action when the link state
799 * changes. Drivers are by no means allowed to mess with the
800 * PHY device structure in their implementations.
801 */
802 void (*link_change_notify)(struct phy_device *dev);
803
804 /**
805 * @read_mmd: PHY specific driver override for reading a MMD
806 * register. This function is optional for PHY specific
807 * drivers. When not provided, the default MMD read function
808 * will be used by phy_read_mmd(), which will use either a
809 * direct read for Clause 45 PHYs or an indirect read for
810 * Clause 22 PHYs. devnum is the MMD device number within the
811 * PHY device, regnum is the register within the selected MMD
812 * device.
813 */
814 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);
815
816 /**
817 * @write_mmd: PHY specific driver override for writing a MMD
818 * register. This function is optional for PHY specific
819 * drivers. When not provided, the default MMD write function
820 * will be used by phy_write_mmd(), which will use either a
821 * direct write for Clause 45 PHYs, or an indirect write for
822 * Clause 22 PHYs. devnum is the MMD device number within the
823 * PHY device, regnum is the register within the selected MMD
824 * device. val is the value to be written.
825 */
826 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
827 u16 val);
828
829 /** @read_page: Return the current PHY register page number */
830 int (*read_page)(struct phy_device *dev);
831 /** @write_page: Set the current PHY register page number */
832 int (*write_page)(struct phy_device *dev, int page);
833
834 /**
835 * @module_info: Get the size and type of the eeprom contained
836 * within a plug-in module
837 */
838 int (*module_info)(struct phy_device *dev,
839 struct ethtool_modinfo *modinfo);
840
841 /**
842 * @module_eeprom: Get the eeprom information from the plug-in
843 * module
844 */
845 int (*module_eeprom)(struct phy_device *dev,
846 struct ethtool_eeprom *ee, u8 *data);
847
848 /** @cable_test_start: Start a cable test */
849 int (*cable_test_start)(struct phy_device *dev);
850
851 /** @cable_test_tdr_start: Start a raw TDR cable test */
852 int (*cable_test_tdr_start)(struct phy_device *dev,
853 const struct phy_tdr_config *config);
854
855 /**
856 * @cable_test_get_status: Once per second, or on interrupt,
857 * request the status of the test.
858 */
859 int (*cable_test_get_status)(struct phy_device *dev, bool *finished);
860
861 /* Get statistics from the PHY using ethtool */
862 /** @get_sset_count: Number of statistic counters */
863 int (*get_sset_count)(struct phy_device *dev);
864 /** @get_strings: Names of the statistic counters */
865 void (*get_strings)(struct phy_device *dev, u8 *data);
866 /** @get_stats: Return the statistic counter values */
867 void (*get_stats)(struct phy_device *dev,
868 struct ethtool_stats *stats, u64 *data);
869
870 /* Get and Set PHY tunables */
871 /** @get_tunable: Return the value of a tunable */
872 int (*get_tunable)(struct phy_device *dev,
873 struct ethtool_tunable *tuna, void *data);
874 /** @set_tunable: Set the value of a tunable */
875 int (*set_tunable)(struct phy_device *dev,
876 struct ethtool_tunable *tuna,
877 const void *data);
878 /** @set_loopback: Set the loopback mood of the PHY */
879 int (*set_loopback)(struct phy_device *dev, bool enable);
880 /** @get_sqi: Get the signal quality indication */
881 int (*get_sqi)(struct phy_device *dev);
882 /** @get_sqi_max: Get the maximum signal quality indication */
883 int (*get_sqi_max)(struct phy_device *dev);
884};
885#define to_phy_driver(d) container_of(to_mdio_common_driver(d), \
886 struct phy_driver, mdiodrv)
887
888#define PHY_ANY_ID "MATCH ANY PHY"
889#define PHY_ANY_UID 0xffffffff
890
891#define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0)
892#define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4)
893#define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10)
894
895/* A Structure for boards to register fixups with the PHY Lib */
896struct phy_fixup {
897 struct list_head list;
898 char bus_id[MII_BUS_ID_SIZE + 3];
899 u32 phy_uid;
900 u32 phy_uid_mask;
901 int (*run)(struct phy_device *phydev);
902};
903
904const char *phy_speed_to_str(int speed);
905const char *phy_duplex_to_str(unsigned int duplex);
906
907/* A structure for mapping a particular speed and duplex
908 * combination to a particular SUPPORTED and ADVERTISED value
909 */
910struct phy_setting {
911 u32 speed;
912 u8 duplex;
913 u8 bit;
914};
915
916const struct phy_setting *
917phy_lookup_setting(int speed, int duplex, const unsigned long *mask,
918 bool exact);
919size_t phy_speeds(unsigned int *speeds, size_t size,
920 unsigned long *mask);
921void of_set_phy_supported(struct phy_device *phydev);
922void of_set_phy_eee_broken(struct phy_device *phydev);
923int phy_speed_down_core(struct phy_device *phydev);
924
925/**
926 * phy_is_started - Convenience function to check whether PHY is started
927 * @phydev: The phy_device struct
928 */
929static inline bool phy_is_started(struct phy_device *phydev)
930{
931 return phydev->state >= PHY_UP;
932}
933
934void phy_resolve_aneg_pause(struct phy_device *phydev);
935void phy_resolve_aneg_linkmode(struct phy_device *phydev);
936void phy_check_downshift(struct phy_device *phydev);
937
938/**
939 * phy_read - Convenience function for reading a given PHY register
940 * @phydev: the phy_device struct
941 * @regnum: register number to read
942 *
943 * NOTE: MUST NOT be called from interrupt context,
944 * because the bus read/write functions may wait for an interrupt
945 * to conclude the operation.
946 */
947static inline int phy_read(struct phy_device *phydev, u32 regnum)
948{
949 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
950}
951
952#define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \
953 timeout_us, sleep_before_read) \
954({ \
955 int __ret = read_poll_timeout(phy_read, val, (cond) || val < 0, \
956 sleep_us, timeout_us, sleep_before_read, phydev, regnum); \
957 if (val < 0) \
958 __ret = val; \
959 if (__ret) \
960 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
961 __ret; \
962})
963
964
965/**
966 * __phy_read - convenience function for reading a given PHY register
967 * @phydev: the phy_device struct
968 * @regnum: register number to read
969 *
970 * The caller must have taken the MDIO bus lock.
971 */
972static inline int __phy_read(struct phy_device *phydev, u32 regnum)
973{
974 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
975}
976
977/**
978 * phy_write - Convenience function for writing a given PHY register
979 * @phydev: the phy_device struct
980 * @regnum: register number to write
981 * @val: value to write to @regnum
982 *
983 * NOTE: MUST NOT be called from interrupt context,
984 * because the bus read/write functions may wait for an interrupt
985 * to conclude the operation.
986 */
987static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
988{
989 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
990}
991
992/**
993 * __phy_write - Convenience function for writing a given PHY register
994 * @phydev: the phy_device struct
995 * @regnum: register number to write
996 * @val: value to write to @regnum
997 *
998 * The caller must have taken the MDIO bus lock.
999 */
1000static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val)
1001{
1002 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum,
1003 val);
1004}
1005
1006/**
1007 * __phy_modify_changed() - Convenience function for modifying a PHY register
1008 * @phydev: a pointer to a &struct phy_device
1009 * @regnum: register number
1010 * @mask: bit mask of bits to clear
1011 * @set: bit mask of bits to set
1012 *
1013 * Unlocked helper function which allows a PHY register to be modified as
1014 * new register value = (old register value & ~mask) | set
1015 *
1016 * Returns negative errno, 0 if there was no change, and 1 in case of change
1017 */
1018static inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum,
1019 u16 mask, u16 set)
1020{
1021 return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr,
1022 regnum, mask, set);
1023}
1024
1025/**
1026 * phy_read_mmd - Convenience function for reading a register
1027 * from an MMD on a given PHY.
1028 * @phydev: The phy_device struct
1029 * @devad: The MMD to read from
1030 * @regnum: The register on the MMD to read
1031 *
1032 * Same rules as for phy_read();
1033 */
1034int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
1035
1036/**
1037 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a
1038 * condition is met or a timeout occurs
1039 *
1040 * @phydev: The phy_device struct
1041 * @devaddr: The MMD to read from
1042 * @regnum: The register on the MMD to read
1043 * @val: Variable to read the register into
1044 * @cond: Break condition (usually involving @val)
1045 * @sleep_us: Maximum time to sleep between reads in us (0
1046 * tight-loops). Should be less than ~20ms since usleep_range
1047 * is used (see Documentation/timers/timers-howto.rst).
1048 * @timeout_us: Timeout in us, 0 means never timeout
1049 * @sleep_before_read: if it is true, sleep @sleep_us before read.
1050 * Returns 0 on success and -ETIMEDOUT upon a timeout. In either
1051 * case, the last read value at @args is stored in @val. Must not
1052 * be called from atomic context if sleep_us or timeout_us are used.
1053 */
1054#define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \
1055 sleep_us, timeout_us, sleep_before_read) \
1056({ \
1057 int __ret = read_poll_timeout(phy_read_mmd, val, (cond) || val < 0, \
1058 sleep_us, timeout_us, sleep_before_read, \
1059 phydev, devaddr, regnum); \
1060 if (val < 0) \
1061 __ret = val; \
1062 if (__ret) \
1063 phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
1064 __ret; \
1065})
1066
1067/**
1068 * __phy_read_mmd - Convenience function for reading a register
1069 * from an MMD on a given PHY.
1070 * @phydev: The phy_device struct
1071 * @devad: The MMD to read from
1072 * @regnum: The register on the MMD to read
1073 *
1074 * Same rules as for __phy_read();
1075 */
1076int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
1077
1078/**
1079 * phy_write_mmd - Convenience function for writing a register
1080 * on an MMD on a given PHY.
1081 * @phydev: The phy_device struct
1082 * @devad: The MMD to write to
1083 * @regnum: The register on the MMD to read
1084 * @val: value to write to @regnum
1085 *
1086 * Same rules as for phy_write();
1087 */
1088int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
1089
1090/**
1091 * __phy_write_mmd - Convenience function for writing a register
1092 * on an MMD on a given PHY.
1093 * @phydev: The phy_device struct
1094 * @devad: The MMD to write to
1095 * @regnum: The register on the MMD to read
1096 * @val: value to write to @regnum
1097 *
1098 * Same rules as for __phy_write();
1099 */
1100int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
1101
1102int __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
1103 u16 set);
1104int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
1105 u16 set);
1106int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
1107int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
1108
1109int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
1110 u16 mask, u16 set);
1111int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
1112 u16 mask, u16 set);
1113int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
1114 u16 mask, u16 set);
1115int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
1116 u16 mask, u16 set);
1117
1118/**
1119 * __phy_set_bits - Convenience function for setting bits in a PHY register
1120 * @phydev: the phy_device struct
1121 * @regnum: register number to write
1122 * @val: bits to set
1123 *
1124 * The caller must have taken the MDIO bus lock.
1125 */
1126static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
1127{
1128 return __phy_modify(phydev, regnum, 0, val);
1129}
1130
1131/**
1132 * __phy_clear_bits - Convenience function for clearing bits in a PHY register
1133 * @phydev: the phy_device struct
1134 * @regnum: register number to write
1135 * @val: bits to clear
1136 *
1137 * The caller must have taken the MDIO bus lock.
1138 */
1139static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum,
1140 u16 val)
1141{
1142 return __phy_modify(phydev, regnum, val, 0);
1143}
1144
1145/**
1146 * phy_set_bits - Convenience function for setting bits in a PHY register
1147 * @phydev: the phy_device struct
1148 * @regnum: register number to write
1149 * @val: bits to set
1150 */
1151static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
1152{
1153 return phy_modify(phydev, regnum, 0, val);
1154}
1155
1156/**
1157 * phy_clear_bits - Convenience function for clearing bits in a PHY register
1158 * @phydev: the phy_device struct
1159 * @regnum: register number to write
1160 * @val: bits to clear
1161 */
1162static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val)
1163{
1164 return phy_modify(phydev, regnum, val, 0);
1165}
1166
1167/**
1168 * __phy_set_bits_mmd - Convenience function for setting bits in a register
1169 * on MMD
1170 * @phydev: the phy_device struct
1171 * @devad: the MMD containing register to modify
1172 * @regnum: register number to modify
1173 * @val: bits to set
1174 *
1175 * The caller must have taken the MDIO bus lock.
1176 */
1177static inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad,
1178 u32 regnum, u16 val)
1179{
1180 return __phy_modify_mmd(phydev, devad, regnum, 0, val);
1181}
1182
1183/**
1184 * __phy_clear_bits_mmd - Convenience function for clearing bits in a register
1185 * on MMD
1186 * @phydev: the phy_device struct
1187 * @devad: the MMD containing register to modify
1188 * @regnum: register number to modify
1189 * @val: bits to clear
1190 *
1191 * The caller must have taken the MDIO bus lock.
1192 */
1193static inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad,
1194 u32 regnum, u16 val)
1195{
1196 return __phy_modify_mmd(phydev, devad, regnum, val, 0);
1197}
1198
1199/**
1200 * phy_set_bits_mmd - Convenience function for setting bits in a register
1201 * on MMD
1202 * @phydev: the phy_device struct
1203 * @devad: the MMD containing register to modify
1204 * @regnum: register number to modify
1205 * @val: bits to set
1206 */
1207static inline int phy_set_bits_mmd(struct phy_device *phydev, int devad,
1208 u32 regnum, u16 val)
1209{
1210 return phy_modify_mmd(phydev, devad, regnum, 0, val);
1211}
1212
1213/**
1214 * phy_clear_bits_mmd - Convenience function for clearing bits in a register
1215 * on MMD
1216 * @phydev: the phy_device struct
1217 * @devad: the MMD containing register to modify
1218 * @regnum: register number to modify
1219 * @val: bits to clear
1220 */
1221static inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
1222 u32 regnum, u16 val)
1223{
1224 return phy_modify_mmd(phydev, devad, regnum, val, 0);
1225}
1226
1227/**
1228 * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
1229 * @phydev: the phy_device struct
1230 *
1231 * NOTE: must be kept in sync with addition/removal of PHY_POLL and
1232 * PHY_IGNORE_INTERRUPT
1233 */
1234static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
1235{
1236 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT;
1237}
1238
1239/**
1240 * phy_polling_mode - Convenience function for testing whether polling is
1241 * used to detect PHY status changes
1242 * @phydev: the phy_device struct
1243 */
1244static inline bool phy_polling_mode(struct phy_device *phydev)
1245{
1246 if (phydev->state == PHY_CABLETEST)
1247 if (phydev->drv->flags & PHY_POLL_CABLE_TEST)
1248 return true;
1249
1250 return phydev->irq == PHY_POLL;
1251}
1252
1253/**
1254 * phy_has_hwtstamp - Tests whether a PHY time stamp configuration.
1255 * @phydev: the phy_device struct
1256 */
1257static inline bool phy_has_hwtstamp(struct phy_device *phydev)
1258{
1259 return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp;
1260}
1261
1262/**
1263 * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping.
1264 * @phydev: the phy_device struct
1265 */
1266static inline bool phy_has_rxtstamp(struct phy_device *phydev)
1267{
1268 return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp;
1269}
1270
1271/**
1272 * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or
1273 * PTP hardware clock capabilities.
1274 * @phydev: the phy_device struct
1275 */
1276static inline bool phy_has_tsinfo(struct phy_device *phydev)
1277{
1278 return phydev && phydev->mii_ts && phydev->mii_ts->ts_info;
1279}
1280
1281/**
1282 * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping.
1283 * @phydev: the phy_device struct
1284 */
1285static inline bool phy_has_txtstamp(struct phy_device *phydev)
1286{
1287 return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp;
1288}
1289
1290static inline int phy_hwtstamp(struct phy_device *phydev, struct ifreq *ifr)
1291{
1292 return phydev->mii_ts->hwtstamp(phydev->mii_ts, ifr);
1293}
1294
1295static inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb,
1296 int type)
1297{
1298 return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type);
1299}
1300
1301static inline int phy_ts_info(struct phy_device *phydev,
1302 struct ethtool_ts_info *tsinfo)
1303{
1304 return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo);
1305}
1306
1307static inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb,
1308 int type)
1309{
1310 phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type);
1311}
1312
1313/**
1314 * phy_is_internal - Convenience function for testing if a PHY is internal
1315 * @phydev: the phy_device struct
1316 */
1317static inline bool phy_is_internal(struct phy_device *phydev)
1318{
1319 return phydev->is_internal;
1320}
1321
1322/**
1323 * phy_interface_mode_is_rgmii - Convenience function for testing if a
1324 * PHY interface mode is RGMII (all variants)
1325 * @mode: the &phy_interface_t enum
1326 */
1327static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
1328{
1329 return mode >= PHY_INTERFACE_MODE_RGMII &&
1330 mode <= PHY_INTERFACE_MODE_RGMII_TXID;
1331};
1332
1333/**
1334 * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z
1335 * negotiation
1336 * @mode: one of &enum phy_interface_t
1337 *
1338 * Returns true if the PHY interface mode uses the 16-bit negotiation
1339 * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding)
1340 */
1341static inline bool phy_interface_mode_is_8023z(phy_interface_t mode)
1342{
1343 return mode == PHY_INTERFACE_MODE_1000BASEX ||
1344 mode == PHY_INTERFACE_MODE_2500BASEX;
1345}
1346
1347/**
1348 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
1349 * is RGMII (all variants)
1350 * @phydev: the phy_device struct
1351 */
1352static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
1353{
1354 return phy_interface_mode_is_rgmii(phydev->interface);
1355};
1356
1357/**
1358 * phy_is_pseudo_fixed_link - Convenience function for testing if this
1359 * PHY is the CPU port facing side of an Ethernet switch, or similar.
1360 * @phydev: the phy_device struct
1361 */
1362static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
1363{
1364 return phydev->is_pseudo_fixed_link;
1365}
1366
1367int phy_save_page(struct phy_device *phydev);
1368int phy_select_page(struct phy_device *phydev, int page);
1369int phy_restore_page(struct phy_device *phydev, int oldpage, int ret);
1370int phy_read_paged(struct phy_device *phydev, int page, u32 regnum);
1371int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val);
1372int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum,
1373 u16 mask, u16 set);
1374int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
1375 u16 mask, u16 set);
1376
1377struct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id,
1378 bool is_c45,
1379 struct phy_c45_device_ids *c45_ids);
1380#if IS_ENABLED(CONFIG_PHYLIB)
1381struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
1382int phy_device_register(struct phy_device *phy);
1383void phy_device_free(struct phy_device *phydev);
1384#else
1385static inline
1386struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
1387{
1388 return NULL;
1389}
1390
1391static inline int phy_device_register(struct phy_device *phy)
1392{
1393 return 0;
1394}
1395
1396static inline void phy_device_free(struct phy_device *phydev) { }
1397#endif /* CONFIG_PHYLIB */
1398void phy_device_remove(struct phy_device *phydev);
1399int phy_init_hw(struct phy_device *phydev);
1400int phy_suspend(struct phy_device *phydev);
1401int phy_resume(struct phy_device *phydev);
1402int __phy_resume(struct phy_device *phydev);
1403int phy_loopback(struct phy_device *phydev, bool enable);
1404void phy_sfp_attach(void *upstream, struct sfp_bus *bus);
1405void phy_sfp_detach(void *upstream, struct sfp_bus *bus);
1406int phy_sfp_probe(struct phy_device *phydev,
1407 const struct sfp_upstream_ops *ops);
1408struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
1409 phy_interface_t interface);
1410struct phy_device *phy_find_first(struct mii_bus *bus);
1411int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
1412 u32 flags, phy_interface_t interface);
1413int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
1414 void (*handler)(struct net_device *),
1415 phy_interface_t interface);
1416struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
1417 void (*handler)(struct net_device *),
1418 phy_interface_t interface);
1419void phy_disconnect(struct phy_device *phydev);
1420void phy_detach(struct phy_device *phydev);
1421void phy_start(struct phy_device *phydev);
1422void phy_stop(struct phy_device *phydev);
1423int phy_start_aneg(struct phy_device *phydev);
1424int phy_aneg_done(struct phy_device *phydev);
1425int phy_speed_down(struct phy_device *phydev, bool sync);
1426int phy_speed_up(struct phy_device *phydev);
1427
1428int phy_restart_aneg(struct phy_device *phydev);
1429int phy_reset_after_clk_enable(struct phy_device *phydev);
1430
1431#if IS_ENABLED(CONFIG_PHYLIB)
1432int phy_start_cable_test(struct phy_device *phydev,
1433 struct netlink_ext_ack *extack);
1434int phy_start_cable_test_tdr(struct phy_device *phydev,
1435 struct netlink_ext_ack *extack,
1436 const struct phy_tdr_config *config);
1437#else
1438static inline
1439int phy_start_cable_test(struct phy_device *phydev,
1440 struct netlink_ext_ack *extack)
1441{
1442 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support");
1443 return -EOPNOTSUPP;
1444}
1445static inline
1446int phy_start_cable_test_tdr(struct phy_device *phydev,
1447 struct netlink_ext_ack *extack,
1448 const struct phy_tdr_config *config)
1449{
1450 NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support");
1451 return -EOPNOTSUPP;
1452}
1453#endif
1454
1455int phy_cable_test_result(struct phy_device *phydev, u8 pair, u16 result);
1456int phy_cable_test_fault_length(struct phy_device *phydev, u8 pair,
1457 u16 cm);
1458
1459static inline void phy_device_reset(struct phy_device *phydev, int value)
1460{
1461 mdio_device_reset(&phydev->mdio, value);
1462}
1463
1464#define phydev_err(_phydev, format, args...) \
1465 dev_err(&_phydev->mdio.dev, format, ##args)
1466
1467#define phydev_info(_phydev, format, args...) \
1468 dev_info(&_phydev->mdio.dev, format, ##args)
1469
1470#define phydev_warn(_phydev, format, args...) \
1471 dev_warn(&_phydev->mdio.dev, format, ##args)
1472
1473#define phydev_dbg(_phydev, format, args...) \
1474 dev_dbg(&_phydev->mdio.dev, format, ##args)
1475
1476static inline const char *phydev_name(const struct phy_device *phydev)
1477{
1478 return dev_name(&phydev->mdio.dev);
1479}
1480
1481static inline void phy_lock_mdio_bus(struct phy_device *phydev)
1482{
1483 mutex_lock(&phydev->mdio.bus->mdio_lock);
1484}
1485
1486static inline void phy_unlock_mdio_bus(struct phy_device *phydev)
1487{
1488 mutex_unlock(&phydev->mdio.bus->mdio_lock);
1489}
1490
1491void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
1492 __printf(2, 3);
1493char *phy_attached_info_irq(struct phy_device *phydev)
1494 __malloc;
1495void phy_attached_info(struct phy_device *phydev);
1496
1497/* Clause 22 PHY */
1498int genphy_read_abilities(struct phy_device *phydev);
1499int genphy_setup_forced(struct phy_device *phydev);
1500int genphy_restart_aneg(struct phy_device *phydev);
1501int genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart);
1502int genphy_config_eee_advert(struct phy_device *phydev);
1503int __genphy_config_aneg(struct phy_device *phydev, bool changed);
1504int genphy_aneg_done(struct phy_device *phydev);
1505int genphy_update_link(struct phy_device *phydev);
1506int genphy_read_lpa(struct phy_device *phydev);
1507int genphy_read_status_fixed(struct phy_device *phydev);
1508int genphy_read_status(struct phy_device *phydev);
1509int genphy_suspend(struct phy_device *phydev);
1510int genphy_resume(struct phy_device *phydev);
1511int genphy_loopback(struct phy_device *phydev, bool enable);
1512int genphy_soft_reset(struct phy_device *phydev);
1513
1514static inline int genphy_config_aneg(struct phy_device *phydev)
1515{
1516 return __genphy_config_aneg(phydev, false);
1517}
1518
1519static inline int genphy_no_ack_interrupt(struct phy_device *phydev)
1520{
1521 return 0;
1522}
1523static inline int genphy_no_config_intr(struct phy_device *phydev)
1524{
1525 return 0;
1526}
1527int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad,
1528 u16 regnum);
1529int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum,
1530 u16 regnum, u16 val);
1531
1532/* Clause 37 */
1533int genphy_c37_config_aneg(struct phy_device *phydev);
1534int genphy_c37_read_status(struct phy_device *phydev);
1535
1536/* Clause 45 PHY */
1537int genphy_c45_restart_aneg(struct phy_device *phydev);
1538int genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart);
1539int genphy_c45_aneg_done(struct phy_device *phydev);
1540int genphy_c45_read_link(struct phy_device *phydev);
1541int genphy_c45_read_lpa(struct phy_device *phydev);
1542int genphy_c45_read_pma(struct phy_device *phydev);
1543int genphy_c45_pma_setup_forced(struct phy_device *phydev);
1544int genphy_c45_an_config_aneg(struct phy_device *phydev);
1545int genphy_c45_an_disable_aneg(struct phy_device *phydev);
1546int genphy_c45_read_mdix(struct phy_device *phydev);
1547int genphy_c45_pma_read_abilities(struct phy_device *phydev);
1548int genphy_c45_read_status(struct phy_device *phydev);
1549int genphy_c45_config_aneg(struct phy_device *phydev);
1550
1551/* Generic C45 PHY driver */
1552extern struct phy_driver genphy_c45_driver;
1553
1554/* The gen10g_* functions are the old Clause 45 stub */
1555int gen10g_config_aneg(struct phy_device *phydev);
1556
1557static inline int phy_read_status(struct phy_device *phydev)
1558{
1559 if (!phydev->drv)
1560 return -EIO;
1561
1562 if (phydev->drv->read_status)
1563 return phydev->drv->read_status(phydev);
1564 else
1565 return genphy_read_status(phydev);
1566}
1567
1568void phy_driver_unregister(struct phy_driver *drv);
1569void phy_drivers_unregister(struct phy_driver *drv, int n);
1570int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
1571int phy_drivers_register(struct phy_driver *new_driver, int n,
1572 struct module *owner);
1573void phy_state_machine(struct work_struct *work);
1574void phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies);
1575void phy_mac_interrupt(struct phy_device *phydev);
1576void phy_start_machine(struct phy_device *phydev);
1577void phy_stop_machine(struct phy_device *phydev);
1578void phy_ethtool_ksettings_get(struct phy_device *phydev,
1579 struct ethtool_link_ksettings *cmd);
1580int phy_ethtool_ksettings_set(struct phy_device *phydev,
1581 const struct ethtool_link_ksettings *cmd);
1582int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
1583int phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
1584int phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd);
1585int phy_disable_interrupts(struct phy_device *phydev);
1586void phy_request_interrupt(struct phy_device *phydev);
1587void phy_free_interrupt(struct phy_device *phydev);
1588void phy_print_status(struct phy_device *phydev);
1589int phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
1590void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode);
1591void phy_advertise_supported(struct phy_device *phydev);
1592void phy_support_sym_pause(struct phy_device *phydev);
1593void phy_support_asym_pause(struct phy_device *phydev);
1594void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx,
1595 bool autoneg);
1596void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx);
1597bool phy_validate_pause(struct phy_device *phydev,
1598 struct ethtool_pauseparam *pp);
1599void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause);
1600
1601s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev,
1602 const int *delay_values, int size, bool is_rx);
1603
1604void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv,
1605 bool *tx_pause, bool *rx_pause);
1606
1607int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
1608 int (*run)(struct phy_device *));
1609int phy_register_fixup_for_id(const char *bus_id,
1610 int (*run)(struct phy_device *));
1611int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
1612 int (*run)(struct phy_device *));
1613
1614int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
1615int phy_unregister_fixup_for_id(const char *bus_id);
1616int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
1617
1618int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
1619int phy_get_eee_err(struct phy_device *phydev);
1620int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
1621int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
1622int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
1623void phy_ethtool_get_wol(struct phy_device *phydev,
1624 struct ethtool_wolinfo *wol);
1625int phy_ethtool_get_link_ksettings(struct net_device *ndev,
1626 struct ethtool_link_ksettings *cmd);
1627int phy_ethtool_set_link_ksettings(struct net_device *ndev,
1628 const struct ethtool_link_ksettings *cmd);
1629int phy_ethtool_nway_reset(struct net_device *ndev);
1630int phy_package_join(struct phy_device *phydev, int addr, size_t priv_size);
1631void phy_package_leave(struct phy_device *phydev);
1632int devm_phy_package_join(struct device *dev, struct phy_device *phydev,
1633 int addr, size_t priv_size);
1634
1635#if IS_ENABLED(CONFIG_PHYLIB)
1636int __init mdio_bus_init(void);
1637void mdio_bus_exit(void);
1638#endif
1639
1640int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data);
1641int phy_ethtool_get_sset_count(struct phy_device *phydev);
1642int phy_ethtool_get_stats(struct phy_device *phydev,
1643 struct ethtool_stats *stats, u64 *data);
1644
1645static inline int phy_package_read(struct phy_device *phydev, u32 regnum)
1646{
1647 struct phy_package_shared *shared = phydev->shared;
1648
1649 if (!shared)
1650 return -EIO;
1651
1652 return mdiobus_read(phydev->mdio.bus, shared->addr, regnum);
1653}
1654
1655static inline int __phy_package_read(struct phy_device *phydev, u32 regnum)
1656{
1657 struct phy_package_shared *shared = phydev->shared;
1658
1659 if (!shared)
1660 return -EIO;
1661
1662 return __mdiobus_read(phydev->mdio.bus, shared->addr, regnum);
1663}
1664
1665static inline int phy_package_write(struct phy_device *phydev,
1666 u32 regnum, u16 val)
1667{
1668 struct phy_package_shared *shared = phydev->shared;
1669
1670 if (!shared)
1671 return -EIO;
1672
1673 return mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val);
1674}
1675
1676static inline int __phy_package_write(struct phy_device *phydev,
1677 u32 regnum, u16 val)
1678{
1679 struct phy_package_shared *shared = phydev->shared;
1680
1681 if (!shared)
1682 return -EIO;
1683
1684 return __mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val);
1685}
1686
1687static inline bool __phy_package_set_once(struct phy_device *phydev,
1688 unsigned int b)
1689{
1690 struct phy_package_shared *shared = phydev->shared;
1691
1692 if (!shared)
1693 return false;
1694
1695 return !test_and_set_bit(b, &shared->flags);
1696}
1697
1698static inline bool phy_package_init_once(struct phy_device *phydev)
1699{
1700 return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE);
1701}
1702
1703static inline bool phy_package_probe_once(struct phy_device *phydev)
1704{
1705 return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE);
1706}
1707
1708extern struct bus_type mdio_bus_type;
1709
1710struct mdio_board_info {
1711 const char *bus_id;
1712 char modalias[MDIO_NAME_SIZE];
1713 int mdio_addr;
1714 const void *platform_data;
1715};
1716
1717#if IS_ENABLED(CONFIG_MDIO_DEVICE)
1718int mdiobus_register_board_info(const struct mdio_board_info *info,
1719 unsigned int n);
1720#else
1721static inline int mdiobus_register_board_info(const struct mdio_board_info *i,
1722 unsigned int n)
1723{
1724 return 0;
1725}
1726#endif
1727
1728
1729/**
1730 * phy_module_driver() - Helper macro for registering PHY drivers
1731 * @__phy_drivers: array of PHY drivers to register
1732 * @__count: Numbers of members in array
1733 *
1734 * Helper macro for PHY drivers which do not do anything special in module
1735 * init/exit. Each module may only use this macro once, and calling it
1736 * replaces module_init() and module_exit().
1737 */
1738#define phy_module_driver(__phy_drivers, __count) \
1739static int __init phy_module_init(void) \
1740{ \
1741 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
1742} \
1743module_init(phy_module_init); \
1744static void __exit phy_module_exit(void) \
1745{ \
1746 phy_drivers_unregister(__phy_drivers, __count); \
1747} \
1748module_exit(phy_module_exit)
1749
1750#define module_phy_driver(__phy_drivers) \
1751 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
1752
1753bool phy_driver_is_genphy(struct phy_device *phydev);
1754bool phy_driver_is_genphy_10g(struct phy_device *phydev);
1755
1756#endif /* __PHY_H */