tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/*
2 * ad525x_dpot: Driver for the Analog Devices digital potentiometers
3 * Copyright (c) 2009-2010 Analog Devices, Inc.
4 * Author: Michael Hennerich <michael.hennerich@analog.com>
5 *
6 * DEVID #Wipers #Positions Resistor Options (kOhm)
7 * AD5258 1 64 1, 10, 50, 100
8 * AD5259 1 256 5, 10, 50, 100
9 * AD5251 2 64 1, 10, 50, 100
10 * AD5252 2 256 1, 10, 50, 100
11 * AD5255 3 512 25, 250
12 * AD5253 4 64 1, 10, 50, 100
13 * AD5254 4 256 1, 10, 50, 100
14 * AD5160 1 256 5, 10, 50, 100
15 * AD5161 1 256 5, 10, 50, 100
16 * AD5162 2 256 2.5, 10, 50, 100
17 * AD5165 1 256 100
18 * AD5200 1 256 10, 50
19 * AD5201 1 33 10, 50
20 * AD5203 4 64 10, 100
21 * AD5204 4 256 10, 50, 100
22 * AD5206 6 256 10, 50, 100
23 * AD5207 2 256 10, 50, 100
24 * AD5231 1 1024 10, 50, 100
25 * AD5232 2 256 10, 50, 100
26 * AD5233 4 64 10, 50, 100
27 * AD5235 2 1024 25, 250
28 * AD5260 1 256 20, 50, 200
29 * AD5262 2 256 20, 50, 200
30 * AD5263 4 256 20, 50, 200
31 * AD5290 1 256 10, 50, 100
32 * AD5291 1 256 20, 50, 100 (20-TP)
33 * AD5292 1 1024 20, 50, 100 (20-TP)
34 * AD5293 1 1024 20, 50, 100
35 * AD7376 1 128 10, 50, 100, 1M
36 * AD8400 1 256 1, 10, 50, 100
37 * AD8402 2 256 1, 10, 50, 100
38 * AD8403 4 256 1, 10, 50, 100
39 * ADN2850 3 512 25, 250
40 * AD5241 1 256 10, 100, 1M
41 * AD5246 1 128 5, 10, 50, 100
42 * AD5247 1 128 5, 10, 50, 100
43 * AD5245 1 256 5, 10, 50, 100
44 * AD5243 2 256 2.5, 10, 50, 100
45 * AD5248 2 256 2.5, 10, 50, 100
46 * AD5242 2 256 20, 50, 200
47 * AD5280 1 256 20, 50, 200
48 * AD5282 2 256 20, 50, 200
49 * ADN2860 3 512 25, 250
50 * AD5273 1 64 1, 10, 50, 100 (OTP)
51 * AD5171 1 64 5, 10, 50, 100 (OTP)
52 * AD5170 1 256 2.5, 10, 50, 100 (OTP)
53 * AD5172 2 256 2.5, 10, 50, 100 (OTP)
54 * AD5173 2 256 2.5, 10, 50, 100 (OTP)
55 * AD5270 1 1024 20, 50, 100 (50-TP)
56 * AD5271 1 256 20, 50, 100 (50-TP)
57 * AD5272 1 1024 20, 50, 100 (50-TP)
58 * AD5274 1 256 20, 50, 100 (50-TP)
59 *
60 * See Documentation/misc-devices/ad525x_dpot.txt for more info.
61 *
62 * derived from ad5258.c
63 * Copyright (c) 2009 Cyber Switching, Inc.
64 * Author: Chris Verges <chrisv@cyberswitching.com>
65 *
66 * derived from ad5252.c
67 * Copyright (c) 2006-2011 Michael Hennerich <michael.hennerich@analog.com>
68 *
69 * Licensed under the GPL-2 or later.
70 */
71
72#include <linux/module.h>
73#include <linux/device.h>
74#include <linux/kernel.h>
75#include <linux/delay.h>
76#include <linux/slab.h>
77
78#include "ad525x_dpot.h"
79
80/*
81 * Client data (each client gets its own)
82 */
83
84struct dpot_data {
85 struct ad_dpot_bus_data bdata;
86 struct mutex update_lock;
87 unsigned int rdac_mask;
88 unsigned int max_pos;
89 unsigned long devid;
90 unsigned int uid;
91 unsigned int feat;
92 unsigned int wipers;
93 u16 rdac_cache[MAX_RDACS];
94 DECLARE_BITMAP(otp_en_mask, MAX_RDACS);
95};
96
97static inline int dpot_read_d8(struct dpot_data *dpot)
98{
99 return dpot->bdata.bops->read_d8(dpot->bdata.client);
100}
101
102static inline int dpot_read_r8d8(struct dpot_data *dpot, u8 reg)
103{
104 return dpot->bdata.bops->read_r8d8(dpot->bdata.client, reg);
105}
106
107static inline int dpot_read_r8d16(struct dpot_data *dpot, u8 reg)
108{
109 return dpot->bdata.bops->read_r8d16(dpot->bdata.client, reg);
110}
111
112static inline int dpot_write_d8(struct dpot_data *dpot, u8 val)
113{
114 return dpot->bdata.bops->write_d8(dpot->bdata.client, val);
115}
116
117static inline int dpot_write_r8d8(struct dpot_data *dpot, u8 reg, u16 val)
118{
119 return dpot->bdata.bops->write_r8d8(dpot->bdata.client, reg, val);
120}
121
122static inline int dpot_write_r8d16(struct dpot_data *dpot, u8 reg, u16 val)
123{
124 return dpot->bdata.bops->write_r8d16(dpot->bdata.client, reg, val);
125}
126
127static s32 dpot_read_spi(struct dpot_data *dpot, u8 reg)
128{
129 unsigned int ctrl = 0;
130 int value;
131
132 if (!(reg & (DPOT_ADDR_EEPROM | DPOT_ADDR_CMD))) {
133
134 if (dpot->feat & F_RDACS_WONLY)
135 return dpot->rdac_cache[reg & DPOT_RDAC_MASK];
136 if (dpot->uid == DPOT_UID(AD5291_ID) ||
137 dpot->uid == DPOT_UID(AD5292_ID) ||
138 dpot->uid == DPOT_UID(AD5293_ID)) {
139
140 value = dpot_read_r8d8(dpot,
141 DPOT_AD5291_READ_RDAC << 2);
142
143 if (dpot->uid == DPOT_UID(AD5291_ID))
144 value = value >> 2;
145
146 return value;
147 } else if (dpot->uid == DPOT_UID(AD5270_ID) ||
148 dpot->uid == DPOT_UID(AD5271_ID)) {
149
150 value = dpot_read_r8d8(dpot,
151 DPOT_AD5270_1_2_4_READ_RDAC << 2);
152
153 if (value < 0)
154 return value;
155
156 if (dpot->uid == DPOT_UID(AD5271_ID))
157 value = value >> 2;
158
159 return value;
160 }
161
162 ctrl = DPOT_SPI_READ_RDAC;
163 } else if (reg & DPOT_ADDR_EEPROM) {
164 ctrl = DPOT_SPI_READ_EEPROM;
165 }
166
167 if (dpot->feat & F_SPI_16BIT)
168 return dpot_read_r8d8(dpot, ctrl);
169 else if (dpot->feat & F_SPI_24BIT)
170 return dpot_read_r8d16(dpot, ctrl);
171
172 return -EFAULT;
173}
174
175static s32 dpot_read_i2c(struct dpot_data *dpot, u8 reg)
176{
177 int value;
178 unsigned int ctrl = 0;
179
180 switch (dpot->uid) {
181 case DPOT_UID(AD5246_ID):
182 case DPOT_UID(AD5247_ID):
183 return dpot_read_d8(dpot);
184 case DPOT_UID(AD5245_ID):
185 case DPOT_UID(AD5241_ID):
186 case DPOT_UID(AD5242_ID):
187 case DPOT_UID(AD5243_ID):
188 case DPOT_UID(AD5248_ID):
189 case DPOT_UID(AD5280_ID):
190 case DPOT_UID(AD5282_ID):
191 ctrl = ((reg & DPOT_RDAC_MASK) == DPOT_RDAC0) ?
192 0 : DPOT_AD5282_RDAC_AB;
193 return dpot_read_r8d8(dpot, ctrl);
194 case DPOT_UID(AD5170_ID):
195 case DPOT_UID(AD5171_ID):
196 case DPOT_UID(AD5273_ID):
197 return dpot_read_d8(dpot);
198 case DPOT_UID(AD5172_ID):
199 case DPOT_UID(AD5173_ID):
200 ctrl = ((reg & DPOT_RDAC_MASK) == DPOT_RDAC0) ?
201 0 : DPOT_AD5172_3_A0;
202 return dpot_read_r8d8(dpot, ctrl);
203 case DPOT_UID(AD5272_ID):
204 case DPOT_UID(AD5274_ID):
205 dpot_write_r8d8(dpot,
206 (DPOT_AD5270_1_2_4_READ_RDAC << 2), 0);
207
208 value = dpot_read_r8d16(dpot, DPOT_AD5270_1_2_4_RDAC << 2);
209 if (value < 0)
210 return value;
211 /*
212 * AD5272/AD5274 returns high byte first, however
213 * underling smbus expects low byte first.
214 */
215 value = swab16(value);
216
217 if (dpot->uid == DPOT_UID(AD5274_ID))
218 value = value >> 2;
219 return value;
220 default:
221 if ((reg & DPOT_REG_TOL) || (dpot->max_pos > 256))
222 return dpot_read_r8d16(dpot, (reg & 0xF8) |
223 ((reg & 0x7) << 1));
224 else
225 return dpot_read_r8d8(dpot, reg);
226 }
227}
228
229static s32 dpot_read(struct dpot_data *dpot, u8 reg)
230{
231 if (dpot->feat & F_SPI)
232 return dpot_read_spi(dpot, reg);
233 else
234 return dpot_read_i2c(dpot, reg);
235}
236
237static s32 dpot_write_spi(struct dpot_data *dpot, u8 reg, u16 value)
238{
239 unsigned int val = 0;
240
241 if (!(reg & (DPOT_ADDR_EEPROM | DPOT_ADDR_CMD | DPOT_ADDR_OTP))) {
242 if (dpot->feat & F_RDACS_WONLY)
243 dpot->rdac_cache[reg & DPOT_RDAC_MASK] = value;
244
245 if (dpot->feat & F_AD_APPDATA) {
246 if (dpot->feat & F_SPI_8BIT) {
247 val = ((reg & DPOT_RDAC_MASK) <<
248 DPOT_MAX_POS(dpot->devid)) |
249 value;
250 return dpot_write_d8(dpot, val);
251 } else if (dpot->feat & F_SPI_16BIT) {
252 val = ((reg & DPOT_RDAC_MASK) <<
253 DPOT_MAX_POS(dpot->devid)) |
254 value;
255 return dpot_write_r8d8(dpot, val >> 8,
256 val & 0xFF);
257 } else
258 BUG();
259 } else {
260 if (dpot->uid == DPOT_UID(AD5291_ID) ||
261 dpot->uid == DPOT_UID(AD5292_ID) ||
262 dpot->uid == DPOT_UID(AD5293_ID)) {
263
264 dpot_write_r8d8(dpot, DPOT_AD5291_CTRLREG << 2,
265 DPOT_AD5291_UNLOCK_CMD);
266
267 if (dpot->uid == DPOT_UID(AD5291_ID))
268 value = value << 2;
269
270 return dpot_write_r8d8(dpot,
271 (DPOT_AD5291_RDAC << 2) |
272 (value >> 8), value & 0xFF);
273 } else if (dpot->uid == DPOT_UID(AD5270_ID) ||
274 dpot->uid == DPOT_UID(AD5271_ID)) {
275 dpot_write_r8d8(dpot,
276 DPOT_AD5270_1_2_4_CTRLREG << 2,
277 DPOT_AD5270_1_2_4_UNLOCK_CMD);
278
279 if (dpot->uid == DPOT_UID(AD5271_ID))
280 value = value << 2;
281
282 return dpot_write_r8d8(dpot,
283 (DPOT_AD5270_1_2_4_RDAC << 2) |
284 (value >> 8), value & 0xFF);
285 }
286 val = DPOT_SPI_RDAC | (reg & DPOT_RDAC_MASK);
287 }
288 } else if (reg & DPOT_ADDR_EEPROM) {
289 val = DPOT_SPI_EEPROM | (reg & DPOT_RDAC_MASK);
290 } else if (reg & DPOT_ADDR_CMD) {
291 switch (reg) {
292 case DPOT_DEC_ALL_6DB:
293 val = DPOT_SPI_DEC_ALL_6DB;
294 break;
295 case DPOT_INC_ALL_6DB:
296 val = DPOT_SPI_INC_ALL_6DB;
297 break;
298 case DPOT_DEC_ALL:
299 val = DPOT_SPI_DEC_ALL;
300 break;
301 case DPOT_INC_ALL:
302 val = DPOT_SPI_INC_ALL;
303 break;
304 }
305 } else if (reg & DPOT_ADDR_OTP) {
306 if (dpot->uid == DPOT_UID(AD5291_ID) ||
307 dpot->uid == DPOT_UID(AD5292_ID)) {
308 return dpot_write_r8d8(dpot,
309 DPOT_AD5291_STORE_XTPM << 2, 0);
310 } else if (dpot->uid == DPOT_UID(AD5270_ID) ||
311 dpot->uid == DPOT_UID(AD5271_ID)) {
312 return dpot_write_r8d8(dpot,
313 DPOT_AD5270_1_2_4_STORE_XTPM << 2, 0);
314 }
315 } else
316 BUG();
317
318 if (dpot->feat & F_SPI_16BIT)
319 return dpot_write_r8d8(dpot, val, value);
320 else if (dpot->feat & F_SPI_24BIT)
321 return dpot_write_r8d16(dpot, val, value);
322
323 return -EFAULT;
324}
325
326static s32 dpot_write_i2c(struct dpot_data *dpot, u8 reg, u16 value)
327{
328 /* Only write the instruction byte for certain commands */
329 unsigned int tmp = 0, ctrl = 0;
330
331 switch (dpot->uid) {
332 case DPOT_UID(AD5246_ID):
333 case DPOT_UID(AD5247_ID):
334 return dpot_write_d8(dpot, value);
335
336 case DPOT_UID(AD5245_ID):
337 case DPOT_UID(AD5241_ID):
338 case DPOT_UID(AD5242_ID):
339 case DPOT_UID(AD5243_ID):
340 case DPOT_UID(AD5248_ID):
341 case DPOT_UID(AD5280_ID):
342 case DPOT_UID(AD5282_ID):
343 ctrl = ((reg & DPOT_RDAC_MASK) == DPOT_RDAC0) ?
344 0 : DPOT_AD5282_RDAC_AB;
345 return dpot_write_r8d8(dpot, ctrl, value);
346 case DPOT_UID(AD5171_ID):
347 case DPOT_UID(AD5273_ID):
348 if (reg & DPOT_ADDR_OTP) {
349 tmp = dpot_read_d8(dpot);
350 if (tmp >> 6) /* Ready to Program? */
351 return -EFAULT;
352 ctrl = DPOT_AD5273_FUSE;
353 }
354 return dpot_write_r8d8(dpot, ctrl, value);
355 case DPOT_UID(AD5172_ID):
356 case DPOT_UID(AD5173_ID):
357 ctrl = ((reg & DPOT_RDAC_MASK) == DPOT_RDAC0) ?
358 0 : DPOT_AD5172_3_A0;
359 if (reg & DPOT_ADDR_OTP) {
360 tmp = dpot_read_r8d16(dpot, ctrl);
361 if (tmp >> 14) /* Ready to Program? */
362 return -EFAULT;
363 ctrl |= DPOT_AD5170_2_3_FUSE;
364 }
365 return dpot_write_r8d8(dpot, ctrl, value);
366 case DPOT_UID(AD5170_ID):
367 if (reg & DPOT_ADDR_OTP) {
368 tmp = dpot_read_r8d16(dpot, tmp);
369 if (tmp >> 14) /* Ready to Program? */
370 return -EFAULT;
371 ctrl = DPOT_AD5170_2_3_FUSE;
372 }
373 return dpot_write_r8d8(dpot, ctrl, value);
374 case DPOT_UID(AD5272_ID):
375 case DPOT_UID(AD5274_ID):
376 dpot_write_r8d8(dpot, DPOT_AD5270_1_2_4_CTRLREG << 2,
377 DPOT_AD5270_1_2_4_UNLOCK_CMD);
378
379 if (reg & DPOT_ADDR_OTP)
380 return dpot_write_r8d8(dpot,
381 DPOT_AD5270_1_2_4_STORE_XTPM << 2, 0);
382
383 if (dpot->uid == DPOT_UID(AD5274_ID))
384 value = value << 2;
385
386 return dpot_write_r8d8(dpot, (DPOT_AD5270_1_2_4_RDAC << 2) |
387 (value >> 8), value & 0xFF);
388 default:
389 if (reg & DPOT_ADDR_CMD)
390 return dpot_write_d8(dpot, reg);
391
392 if (dpot->max_pos > 256)
393 return dpot_write_r8d16(dpot, (reg & 0xF8) |
394 ((reg & 0x7) << 1), value);
395 else
396 /* All other registers require instruction + data bytes */
397 return dpot_write_r8d8(dpot, reg, value);
398 }
399}
400
401static s32 dpot_write(struct dpot_data *dpot, u8 reg, u16 value)
402{
403 if (dpot->feat & F_SPI)
404 return dpot_write_spi(dpot, reg, value);
405 else
406 return dpot_write_i2c(dpot, reg, value);
407}
408
409/* sysfs functions */
410
411static ssize_t sysfs_show_reg(struct device *dev,
412 struct device_attribute *attr,
413 char *buf, u32 reg)
414{
415 struct dpot_data *data = dev_get_drvdata(dev);
416 s32 value;
417
418 if (reg & DPOT_ADDR_OTP_EN)
419 return sprintf(buf, "%s\n",
420 test_bit(DPOT_RDAC_MASK & reg, data->otp_en_mask) ?
421 "enabled" : "disabled");
422
423
424 mutex_lock(&data->update_lock);
425 value = dpot_read(data, reg);
426 mutex_unlock(&data->update_lock);
427
428 if (value < 0)
429 return -EINVAL;
430 /*
431 * Let someone else deal with converting this ...
432 * the tolerance is a two-byte value where the MSB
433 * is a sign + integer value, and the LSB is a
434 * decimal value. See page 18 of the AD5258
435 * datasheet (Rev. A) for more details.
436 */
437
438 if (reg & DPOT_REG_TOL)
439 return sprintf(buf, "0x%04x\n", value & 0xFFFF);
440 else
441 return sprintf(buf, "%u\n", value & data->rdac_mask);
442}
443
444static ssize_t sysfs_set_reg(struct device *dev,
445 struct device_attribute *attr,
446 const char *buf, size_t count, u32 reg)
447{
448 struct dpot_data *data = dev_get_drvdata(dev);
449 unsigned long value;
450 int err;
451
452 if (reg & DPOT_ADDR_OTP_EN) {
453 if (sysfs_streq(buf, "enabled"))
454 set_bit(DPOT_RDAC_MASK & reg, data->otp_en_mask);
455 else
456 clear_bit(DPOT_RDAC_MASK & reg, data->otp_en_mask);
457
458 return count;
459 }
460
461 if ((reg & DPOT_ADDR_OTP) &&
462 !test_bit(DPOT_RDAC_MASK & reg, data->otp_en_mask))
463 return -EPERM;
464
465 err = kstrtoul(buf, 10, &value);
466 if (err)
467 return err;
468
469 if (value > data->rdac_mask)
470 value = data->rdac_mask;
471
472 mutex_lock(&data->update_lock);
473 dpot_write(data, reg, value);
474 if (reg & DPOT_ADDR_EEPROM)
475 msleep(26); /* Sleep while the EEPROM updates */
476 else if (reg & DPOT_ADDR_OTP)
477 msleep(400); /* Sleep while the OTP updates */
478 mutex_unlock(&data->update_lock);
479
480 return count;
481}
482
483static ssize_t sysfs_do_cmd(struct device *dev,
484 struct device_attribute *attr,
485 const char *buf, size_t count, u32 reg)
486{
487 struct dpot_data *data = dev_get_drvdata(dev);
488
489 mutex_lock(&data->update_lock);
490 dpot_write(data, reg, 0);
491 mutex_unlock(&data->update_lock);
492
493 return count;
494}
495
496/* ------------------------------------------------------------------------- */
497
498#define DPOT_DEVICE_SHOW(_name, _reg) static ssize_t \
499show_##_name(struct device *dev, \
500 struct device_attribute *attr, char *buf) \
501{ \
502 return sysfs_show_reg(dev, attr, buf, _reg); \
503}
504
505#define DPOT_DEVICE_SET(_name, _reg) static ssize_t \
506set_##_name(struct device *dev, \
507 struct device_attribute *attr, \
508 const char *buf, size_t count) \
509{ \
510 return sysfs_set_reg(dev, attr, buf, count, _reg); \
511}
512
513#define DPOT_DEVICE_SHOW_SET(name, reg) \
514DPOT_DEVICE_SHOW(name, reg) \
515DPOT_DEVICE_SET(name, reg) \
516static DEVICE_ATTR(name, S_IWUSR | S_IRUGO, show_##name, set_##name)
517
518#define DPOT_DEVICE_SHOW_ONLY(name, reg) \
519DPOT_DEVICE_SHOW(name, reg) \
520static DEVICE_ATTR(name, S_IWUSR | S_IRUGO, show_##name, NULL)
521
522DPOT_DEVICE_SHOW_SET(rdac0, DPOT_ADDR_RDAC | DPOT_RDAC0);
523DPOT_DEVICE_SHOW_SET(eeprom0, DPOT_ADDR_EEPROM | DPOT_RDAC0);
524DPOT_DEVICE_SHOW_ONLY(tolerance0, DPOT_ADDR_EEPROM | DPOT_TOL_RDAC0);
525DPOT_DEVICE_SHOW_SET(otp0, DPOT_ADDR_OTP | DPOT_RDAC0);
526DPOT_DEVICE_SHOW_SET(otp0en, DPOT_ADDR_OTP_EN | DPOT_RDAC0);
527
528DPOT_DEVICE_SHOW_SET(rdac1, DPOT_ADDR_RDAC | DPOT_RDAC1);
529DPOT_DEVICE_SHOW_SET(eeprom1, DPOT_ADDR_EEPROM | DPOT_RDAC1);
530DPOT_DEVICE_SHOW_ONLY(tolerance1, DPOT_ADDR_EEPROM | DPOT_TOL_RDAC1);
531DPOT_DEVICE_SHOW_SET(otp1, DPOT_ADDR_OTP | DPOT_RDAC1);
532DPOT_DEVICE_SHOW_SET(otp1en, DPOT_ADDR_OTP_EN | DPOT_RDAC1);
533
534DPOT_DEVICE_SHOW_SET(rdac2, DPOT_ADDR_RDAC | DPOT_RDAC2);
535DPOT_DEVICE_SHOW_SET(eeprom2, DPOT_ADDR_EEPROM | DPOT_RDAC2);
536DPOT_DEVICE_SHOW_ONLY(tolerance2, DPOT_ADDR_EEPROM | DPOT_TOL_RDAC2);
537DPOT_DEVICE_SHOW_SET(otp2, DPOT_ADDR_OTP | DPOT_RDAC2);
538DPOT_DEVICE_SHOW_SET(otp2en, DPOT_ADDR_OTP_EN | DPOT_RDAC2);
539
540DPOT_DEVICE_SHOW_SET(rdac3, DPOT_ADDR_RDAC | DPOT_RDAC3);
541DPOT_DEVICE_SHOW_SET(eeprom3, DPOT_ADDR_EEPROM | DPOT_RDAC3);
542DPOT_DEVICE_SHOW_ONLY(tolerance3, DPOT_ADDR_EEPROM | DPOT_TOL_RDAC3);
543DPOT_DEVICE_SHOW_SET(otp3, DPOT_ADDR_OTP | DPOT_RDAC3);
544DPOT_DEVICE_SHOW_SET(otp3en, DPOT_ADDR_OTP_EN | DPOT_RDAC3);
545
546DPOT_DEVICE_SHOW_SET(rdac4, DPOT_ADDR_RDAC | DPOT_RDAC4);
547DPOT_DEVICE_SHOW_SET(eeprom4, DPOT_ADDR_EEPROM | DPOT_RDAC4);
548DPOT_DEVICE_SHOW_ONLY(tolerance4, DPOT_ADDR_EEPROM | DPOT_TOL_RDAC4);
549DPOT_DEVICE_SHOW_SET(otp4, DPOT_ADDR_OTP | DPOT_RDAC4);
550DPOT_DEVICE_SHOW_SET(otp4en, DPOT_ADDR_OTP_EN | DPOT_RDAC4);
551
552DPOT_DEVICE_SHOW_SET(rdac5, DPOT_ADDR_RDAC | DPOT_RDAC5);
553DPOT_DEVICE_SHOW_SET(eeprom5, DPOT_ADDR_EEPROM | DPOT_RDAC5);
554DPOT_DEVICE_SHOW_ONLY(tolerance5, DPOT_ADDR_EEPROM | DPOT_TOL_RDAC5);
555DPOT_DEVICE_SHOW_SET(otp5, DPOT_ADDR_OTP | DPOT_RDAC5);
556DPOT_DEVICE_SHOW_SET(otp5en, DPOT_ADDR_OTP_EN | DPOT_RDAC5);
557
558static const struct attribute *dpot_attrib_wipers[] = {
559 &dev_attr_rdac0.attr,
560 &dev_attr_rdac1.attr,
561 &dev_attr_rdac2.attr,
562 &dev_attr_rdac3.attr,
563 &dev_attr_rdac4.attr,
564 &dev_attr_rdac5.attr,
565 NULL
566};
567
568static const struct attribute *dpot_attrib_eeprom[] = {
569 &dev_attr_eeprom0.attr,
570 &dev_attr_eeprom1.attr,
571 &dev_attr_eeprom2.attr,
572 &dev_attr_eeprom3.attr,
573 &dev_attr_eeprom4.attr,
574 &dev_attr_eeprom5.attr,
575 NULL
576};
577
578static const struct attribute *dpot_attrib_otp[] = {
579 &dev_attr_otp0.attr,
580 &dev_attr_otp1.attr,
581 &dev_attr_otp2.attr,
582 &dev_attr_otp3.attr,
583 &dev_attr_otp4.attr,
584 &dev_attr_otp5.attr,
585 NULL
586};
587
588static const struct attribute *dpot_attrib_otp_en[] = {
589 &dev_attr_otp0en.attr,
590 &dev_attr_otp1en.attr,
591 &dev_attr_otp2en.attr,
592 &dev_attr_otp3en.attr,
593 &dev_attr_otp4en.attr,
594 &dev_attr_otp5en.attr,
595 NULL
596};
597
598static const struct attribute *dpot_attrib_tolerance[] = {
599 &dev_attr_tolerance0.attr,
600 &dev_attr_tolerance1.attr,
601 &dev_attr_tolerance2.attr,
602 &dev_attr_tolerance3.attr,
603 &dev_attr_tolerance4.attr,
604 &dev_attr_tolerance5.attr,
605 NULL
606};
607
608/* ------------------------------------------------------------------------- */
609
610#define DPOT_DEVICE_DO_CMD(_name, _cmd) static ssize_t \
611set_##_name(struct device *dev, \
612 struct device_attribute *attr, \
613 const char *buf, size_t count) \
614{ \
615 return sysfs_do_cmd(dev, attr, buf, count, _cmd); \
616} \
617static DEVICE_ATTR(_name, S_IWUSR | S_IRUGO, NULL, set_##_name)
618
619DPOT_DEVICE_DO_CMD(inc_all, DPOT_INC_ALL);
620DPOT_DEVICE_DO_CMD(dec_all, DPOT_DEC_ALL);
621DPOT_DEVICE_DO_CMD(inc_all_6db, DPOT_INC_ALL_6DB);
622DPOT_DEVICE_DO_CMD(dec_all_6db, DPOT_DEC_ALL_6DB);
623
624static struct attribute *ad525x_attributes_commands[] = {
625 &dev_attr_inc_all.attr,
626 &dev_attr_dec_all.attr,
627 &dev_attr_inc_all_6db.attr,
628 &dev_attr_dec_all_6db.attr,
629 NULL
630};
631
632static const struct attribute_group ad525x_group_commands = {
633 .attrs = ad525x_attributes_commands,
634};
635
636static int ad_dpot_add_files(struct device *dev,
637 unsigned int features, unsigned int rdac)
638{
639 int err = sysfs_create_file(&dev->kobj,
640 dpot_attrib_wipers[rdac]);
641 if (features & F_CMD_EEP)
642 err |= sysfs_create_file(&dev->kobj,
643 dpot_attrib_eeprom[rdac]);
644 if (features & F_CMD_TOL)
645 err |= sysfs_create_file(&dev->kobj,
646 dpot_attrib_tolerance[rdac]);
647 if (features & F_CMD_OTP) {
648 err |= sysfs_create_file(&dev->kobj,
649 dpot_attrib_otp_en[rdac]);
650 err |= sysfs_create_file(&dev->kobj,
651 dpot_attrib_otp[rdac]);
652 }
653
654 if (err)
655 dev_err(dev, "failed to register sysfs hooks for RDAC%d\n",
656 rdac);
657
658 return err;
659}
660
661static inline void ad_dpot_remove_files(struct device *dev,
662 unsigned int features, unsigned int rdac)
663{
664 sysfs_remove_file(&dev->kobj,
665 dpot_attrib_wipers[rdac]);
666 if (features & F_CMD_EEP)
667 sysfs_remove_file(&dev->kobj,
668 dpot_attrib_eeprom[rdac]);
669 if (features & F_CMD_TOL)
670 sysfs_remove_file(&dev->kobj,
671 dpot_attrib_tolerance[rdac]);
672 if (features & F_CMD_OTP) {
673 sysfs_remove_file(&dev->kobj,
674 dpot_attrib_otp_en[rdac]);
675 sysfs_remove_file(&dev->kobj,
676 dpot_attrib_otp[rdac]);
677 }
678}
679
680int ad_dpot_probe(struct device *dev,
681 struct ad_dpot_bus_data *bdata, unsigned long devid,
682 const char *name)
683{
684
685 struct dpot_data *data;
686 int i, err = 0;
687
688 data = kzalloc(sizeof(struct dpot_data), GFP_KERNEL);
689 if (!data) {
690 err = -ENOMEM;
691 goto exit;
692 }
693
694 dev_set_drvdata(dev, data);
695 mutex_init(&data->update_lock);
696
697 data->bdata = *bdata;
698 data->devid = devid;
699
700 data->max_pos = 1 << DPOT_MAX_POS(devid);
701 data->rdac_mask = data->max_pos - 1;
702 data->feat = DPOT_FEAT(devid);
703 data->uid = DPOT_UID(devid);
704 data->wipers = DPOT_WIPERS(devid);
705
706 for (i = DPOT_RDAC0; i < MAX_RDACS; i++)
707 if (data->wipers & (1 << i)) {
708 err = ad_dpot_add_files(dev, data->feat, i);
709 if (err)
710 goto exit_remove_files;
711 /* power-up midscale */
712 if (data->feat & F_RDACS_WONLY)
713 data->rdac_cache[i] = data->max_pos / 2;
714 }
715
716 if (data->feat & F_CMD_INC)
717 err = sysfs_create_group(&dev->kobj, &ad525x_group_commands);
718
719 if (err) {
720 dev_err(dev, "failed to register sysfs hooks\n");
721 goto exit_free;
722 }
723
724 dev_info(dev, "%s %d-Position Digital Potentiometer registered\n",
725 name, data->max_pos);
726
727 return 0;
728
729exit_remove_files:
730 for (i = DPOT_RDAC0; i < MAX_RDACS; i++)
731 if (data->wipers & (1 << i))
732 ad_dpot_remove_files(dev, data->feat, i);
733
734exit_free:
735 kfree(data);
736 dev_set_drvdata(dev, NULL);
737exit:
738 dev_err(dev, "failed to create client for %s ID 0x%lX\n",
739 name, devid);
740 return err;
741}
742EXPORT_SYMBOL(ad_dpot_probe);
743
744int ad_dpot_remove(struct device *dev)
745{
746 struct dpot_data *data = dev_get_drvdata(dev);
747 int i;
748
749 for (i = DPOT_RDAC0; i < MAX_RDACS; i++)
750 if (data->wipers & (1 << i))
751 ad_dpot_remove_files(dev, data->feat, i);
752
753 kfree(data);
754
755 return 0;
756}
757EXPORT_SYMBOL(ad_dpot_remove);
758
759
760MODULE_AUTHOR("Chris Verges <chrisv@cyberswitching.com>, "
761 "Michael Hennerich <michael.hennerich@analog.com>");
762MODULE_DESCRIPTION("Digital potentiometer driver");
763MODULE_LICENSE("GPL");