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1/*
2 * Copyright 2015 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26/**
27 * This file defines external dependencies of Display Core.
28 */
29
30#ifndef __DM_SERVICES_H__
31
32#define __DM_SERVICES_H__
33
34#include "amdgpu_dm_trace.h"
35
36/* TODO: remove when DC is complete. */
37#include "dm_services_types.h"
38#include "logger_interface.h"
39#include "link_service_types.h"
40
41#undef DEPRECATED
42
43irq_handler_idx dm_register_interrupt(
44 struct dc_context *ctx,
45 struct dc_interrupt_params *int_params,
46 interrupt_handler ih,
47 void *handler_args);
48
49
50/*
51 *
52 * GPU registers access
53 *
54 */
55
56/* enable for debugging new code, this adds 50k to the driver size. */
57/* #define DM_CHECK_ADDR_0 */
58
59#define dm_read_reg(ctx, address) \
60 dm_read_reg_func(ctx, address, __func__)
61
62static inline uint32_t dm_read_reg_func(
63 const struct dc_context *ctx,
64 uint32_t address,
65 const char *func_name)
66{
67 uint32_t value;
68#ifdef DM_CHECK_ADDR_0
69 if (address == 0) {
70 DC_ERR("invalid register read; address = 0\n");
71 return 0;
72 }
73#endif
74 value = cgs_read_register(ctx->cgs_device, address);
75 trace_amdgpu_dc_rreg(&ctx->perf_trace->read_count, address, value);
76
77 return value;
78}
79
80#define dm_write_reg(ctx, address, value) \
81 dm_write_reg_func(ctx, address, value, __func__)
82
83static inline void dm_write_reg_func(
84 const struct dc_context *ctx,
85 uint32_t address,
86 uint32_t value,
87 const char *func_name)
88{
89#ifdef DM_CHECK_ADDR_0
90 if (address == 0) {
91 DC_ERR("invalid register write. address = 0");
92 return;
93 }
94#endif
95 cgs_write_register(ctx->cgs_device, address, value);
96 trace_amdgpu_dc_wreg(&ctx->perf_trace->write_count, address, value);
97}
98
99static inline uint32_t dm_read_index_reg(
100 const struct dc_context *ctx,
101 enum cgs_ind_reg addr_space,
102 uint32_t index)
103{
104 return cgs_read_ind_register(ctx->cgs_device, addr_space, index);
105}
106
107static inline void dm_write_index_reg(
108 const struct dc_context *ctx,
109 enum cgs_ind_reg addr_space,
110 uint32_t index,
111 uint32_t value)
112{
113 cgs_write_ind_register(ctx->cgs_device, addr_space, index, value);
114}
115
116static inline uint32_t get_reg_field_value_ex(
117 uint32_t reg_value,
118 uint32_t mask,
119 uint8_t shift)
120{
121 return (mask & reg_value) >> shift;
122}
123
124#define get_reg_field_value(reg_value, reg_name, reg_field)\
125 get_reg_field_value_ex(\
126 (reg_value),\
127 reg_name ## __ ## reg_field ## _MASK,\
128 reg_name ## __ ## reg_field ## __SHIFT)
129
130static inline uint32_t set_reg_field_value_ex(
131 uint32_t reg_value,
132 uint32_t value,
133 uint32_t mask,
134 uint8_t shift)
135{
136 ASSERT(mask != 0);
137 return (reg_value & ~mask) | (mask & (value << shift));
138}
139
140#define set_reg_field_value(reg_value, value, reg_name, reg_field)\
141 (reg_value) = set_reg_field_value_ex(\
142 (reg_value),\
143 (value),\
144 reg_name ## __ ## reg_field ## _MASK,\
145 reg_name ## __ ## reg_field ## __SHIFT)
146
147uint32_t generic_reg_update_ex(const struct dc_context *ctx,
148 uint32_t addr, uint32_t reg_val, int n,
149 uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...);
150
151#define FD(reg_field) reg_field ## __SHIFT, \
152 reg_field ## _MASK
153
154/*
155 * return number of poll before condition is met
156 * return 0 if condition is not meet after specified time out tries
157 */
158unsigned int generic_reg_wait(const struct dc_context *ctx,
159 uint32_t addr, uint32_t mask, uint32_t shift, uint32_t condition_value,
160 unsigned int delay_between_poll_us, unsigned int time_out_num_tries,
161 const char *func_name, int line);
162
163
164/* These macros need to be used with soc15 registers in order to retrieve
165 * the actual offset.
166 */
167#define dm_write_reg_soc15(ctx, reg, inst_offset, value) \
168 dm_write_reg_func(ctx, reg + DCE_BASE.instance[0].segment[reg##_BASE_IDX] + inst_offset, value, __func__)
169
170#define dm_read_reg_soc15(ctx, reg, inst_offset) \
171 dm_read_reg_func(ctx, reg + DCE_BASE.instance[0].segment[reg##_BASE_IDX] + inst_offset, __func__)
172
173#define generic_reg_update_soc15(ctx, inst_offset, reg_name, n, ...)\
174 generic_reg_update_ex(ctx, DCE_BASE.instance[0].segment[mm##reg_name##_BASE_IDX] + mm##reg_name + inst_offset, \
175 dm_read_reg_func(ctx, mm##reg_name + DCE_BASE.instance[0].segment[mm##reg_name##_BASE_IDX] + inst_offset, __func__), \
176 n, __VA_ARGS__)
177
178#define generic_reg_set_soc15(ctx, inst_offset, reg_name, n, ...)\
179 generic_reg_update_ex(ctx, DCE_BASE.instance[0].segment[mm##reg_name##_BASE_IDX] + mm##reg_name + inst_offset, 0, \
180 n, __VA_ARGS__)
181
182#define get_reg_field_value_soc15(reg_value, block, reg_num, reg_name, reg_field)\
183 get_reg_field_value_ex(\
184 (reg_value),\
185 block ## reg_num ## _ ## reg_name ## __ ## reg_field ## _MASK,\
186 block ## reg_num ## _ ## reg_name ## __ ## reg_field ## __SHIFT)
187
188#define set_reg_field_value_soc15(reg_value, value, block, reg_num, reg_name, reg_field)\
189 (reg_value) = set_reg_field_value_ex(\
190 (reg_value),\
191 (value),\
192 block ## reg_num ## _ ## reg_name ## __ ## reg_field ## _MASK,\
193 block ## reg_num ## _ ## reg_name ## __ ## reg_field ## __SHIFT)
194
195/**************************************
196 * Power Play (PP) interfaces
197 **************************************/
198
199/* Gets valid clocks levels from pplib
200 *
201 * input: clk_type - display clk / sclk / mem clk
202 *
203 * output: array of valid clock levels for given type in ascending order,
204 * with invalid levels filtered out
205 *
206 */
207bool dm_pp_get_clock_levels_by_type(
208 const struct dc_context *ctx,
209 enum dm_pp_clock_type clk_type,
210 struct dm_pp_clock_levels *clk_level_info);
211
212bool dm_pp_get_clock_levels_by_type_with_latency(
213 const struct dc_context *ctx,
214 enum dm_pp_clock_type clk_type,
215 struct dm_pp_clock_levels_with_latency *clk_level_info);
216
217bool dm_pp_get_clock_levels_by_type_with_voltage(
218 const struct dc_context *ctx,
219 enum dm_pp_clock_type clk_type,
220 struct dm_pp_clock_levels_with_voltage *clk_level_info);
221
222bool dm_pp_notify_wm_clock_changes(
223 const struct dc_context *ctx,
224 struct dm_pp_wm_sets_with_clock_ranges *wm_with_clock_ranges);
225
226void dm_pp_get_funcs_rv(struct dc_context *ctx,
227 struct pp_smu_funcs_rv *funcs);
228
229/* DAL calls this function to notify PP about completion of Mode Set.
230 * For PP it means that current DCE clocks are those which were returned
231 * by dc_service_pp_pre_dce_clock_change(), in the 'output' parameter.
232 *
233 * If the clocks are higher than before, then PP does nothing.
234 *
235 * If the clocks are lower than before, then PP reduces the voltage.
236 *
237 * \returns true - call is successful
238 * false - call failed
239 */
240bool dm_pp_apply_display_requirements(
241 const struct dc_context *ctx,
242 const struct dm_pp_display_configuration *pp_display_cfg);
243
244bool dm_pp_apply_power_level_change_request(
245 const struct dc_context *ctx,
246 struct dm_pp_power_level_change_request *level_change_req);
247
248bool dm_pp_apply_clock_for_voltage_request(
249 const struct dc_context *ctx,
250 struct dm_pp_clock_for_voltage_req *clock_for_voltage_req);
251
252bool dm_pp_get_static_clocks(
253 const struct dc_context *ctx,
254 struct dm_pp_static_clock_info *static_clk_info);
255
256/****** end of PP interfaces ******/
257
258struct persistent_data_flag {
259 bool save_per_link;
260 bool save_per_edid;
261};
262
263/* Call to write data in registry editor for persistent data storage.
264 *
265 * \inputs sink - identify edid/link for registry folder creation
266 * module name - identify folders for registry
267 * key name - identify keys within folders for registry
268 * params - value to write in defined folder/key
269 * size - size of the input params
270 * flag - determine whether to save by link or edid
271 *
272 * \returns true - call is successful
273 * false - call failed
274 *
275 * sink module key
276 * -----------------------------------------------------------------------------
277 * NULL NULL NULL - failure
278 * NULL NULL - - create key with param value
279 * under base folder
280 * NULL - NULL - create module folder under base folder
281 * - NULL NULL - failure
282 * NULL - - - create key under module folder
283 * with no edid/link identification
284 * - NULL - - create key with param value
285 * under base folder
286 * - - NULL - create module folder under base folder
287 * - - - - create key under module folder
288 * with edid/link identification
289 */
290bool dm_write_persistent_data(struct dc_context *ctx,
291 const struct dc_sink *sink,
292 const char *module_name,
293 const char *key_name,
294 void *params,
295 unsigned int size,
296 struct persistent_data_flag *flag);
297
298
299/* Call to read data in registry editor for persistent data storage.
300 *
301 * \inputs sink - identify edid/link for registry folder creation
302 * module name - identify folders for registry
303 * key name - identify keys within folders for registry
304 * size - size of the output params
305 * flag - determine whether it was save by link or edid
306 *
307 * \returns params - value read from defined folder/key
308 * true - call is successful
309 * false - call failed
310 *
311 * sink module key
312 * -----------------------------------------------------------------------------
313 * NULL NULL NULL - failure
314 * NULL NULL - - read key under base folder
315 * NULL - NULL - failure
316 * - NULL NULL - failure
317 * NULL - - - read key under module folder
318 * with no edid/link identification
319 * - NULL - - read key under base folder
320 * - - NULL - failure
321 * - - - - read key under module folder
322 * with edid/link identification
323 */
324bool dm_read_persistent_data(struct dc_context *ctx,
325 const struct dc_sink *sink,
326 const char *module_name,
327 const char *key_name,
328 void *params,
329 unsigned int size,
330 struct persistent_data_flag *flag);
331
332bool dm_query_extended_brightness_caps
333 (struct dc_context *ctx, enum dm_acpi_display_type display,
334 struct dm_acpi_atif_backlight_caps *pCaps);
335
336bool dm_dmcu_set_pipe(struct dc_context *ctx, unsigned int controller_id);
337
338/*
339 *
340 * print-out services
341 *
342 */
343#define dm_log_to_buffer(buffer, size, fmt, args)\
344 vsnprintf(buffer, size, fmt, args)
345
346static inline unsigned long long dm_get_timestamp(struct dc_context *ctx)
347{
348 return ktime_get_raw_ns();
349}
350
351unsigned long long dm_get_elapse_time_in_ns(struct dc_context *ctx,
352 unsigned long long current_time_stamp,
353 unsigned long long last_time_stamp);
354
355/*
356 * performance tracing
357 */
358#define PERF_TRACE() trace_amdgpu_dc_performance(CTX->perf_trace->read_count,\
359 CTX->perf_trace->write_count, &CTX->perf_trace->last_entry_read,\
360 &CTX->perf_trace->last_entry_write, __func__, __LINE__)
361#define PERF_TRACE_CTX(__CTX) trace_amdgpu_dc_performance(__CTX->perf_trace->read_count,\
362 __CTX->perf_trace->write_count, &__CTX->perf_trace->last_entry_read,\
363 &__CTX->perf_trace->last_entry_write, __func__, __LINE__)
364
365
366/*
367 * Debug and verification hooks
368 */
369
370void dm_dtn_log_begin(struct dc_context *ctx,
371 struct dc_log_buffer_ctx *log_ctx);
372void dm_dtn_log_append_v(struct dc_context *ctx,
373 struct dc_log_buffer_ctx *log_ctx,
374 const char *msg, ...);
375void dm_dtn_log_end(struct dc_context *ctx,
376 struct dc_log_buffer_ctx *log_ctx);
377
378#endif /* __DM_SERVICES_H__ */