Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
at v5.1-rc4 1383 lines 35 kB view raw
1/* 2 * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms of the GNU General Public License as published by the Free 6 * Software Foundation; either version 2 of the License, or (at your option) 7 * any later version. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * The full GNU General Public License is included in this distribution in the 15 * file called COPYING. 16 */ 17 18/* 19 * This code implements the DMA subsystem. It provides a HW-neutral interface 20 * for other kernel code to use asynchronous memory copy capabilities, 21 * if present, and allows different HW DMA drivers to register as providing 22 * this capability. 23 * 24 * Due to the fact we are accelerating what is already a relatively fast 25 * operation, the code goes to great lengths to avoid additional overhead, 26 * such as locking. 27 * 28 * LOCKING: 29 * 30 * The subsystem keeps a global list of dma_device structs it is protected by a 31 * mutex, dma_list_mutex. 32 * 33 * A subsystem can get access to a channel by calling dmaengine_get() followed 34 * by dma_find_channel(), or if it has need for an exclusive channel it can call 35 * dma_request_channel(). Once a channel is allocated a reference is taken 36 * against its corresponding driver to disable removal. 37 * 38 * Each device has a channels list, which runs unlocked but is never modified 39 * once the device is registered, it's just setup by the driver. 40 * 41 * See Documentation/driver-api/dmaengine for more details 42 */ 43 44#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 45 46#include <linux/platform_device.h> 47#include <linux/dma-mapping.h> 48#include <linux/init.h> 49#include <linux/module.h> 50#include <linux/mm.h> 51#include <linux/device.h> 52#include <linux/dmaengine.h> 53#include <linux/hardirq.h> 54#include <linux/spinlock.h> 55#include <linux/percpu.h> 56#include <linux/rcupdate.h> 57#include <linux/mutex.h> 58#include <linux/jiffies.h> 59#include <linux/rculist.h> 60#include <linux/idr.h> 61#include <linux/slab.h> 62#include <linux/acpi.h> 63#include <linux/acpi_dma.h> 64#include <linux/of_dma.h> 65#include <linux/mempool.h> 66#include <linux/numa.h> 67 68static DEFINE_MUTEX(dma_list_mutex); 69static DEFINE_IDA(dma_ida); 70static LIST_HEAD(dma_device_list); 71static long dmaengine_ref_count; 72 73/* --- sysfs implementation --- */ 74 75/** 76 * dev_to_dma_chan - convert a device pointer to the its sysfs container object 77 * @dev - device node 78 * 79 * Must be called under dma_list_mutex 80 */ 81static struct dma_chan *dev_to_dma_chan(struct device *dev) 82{ 83 struct dma_chan_dev *chan_dev; 84 85 chan_dev = container_of(dev, typeof(*chan_dev), device); 86 return chan_dev->chan; 87} 88 89static ssize_t memcpy_count_show(struct device *dev, 90 struct device_attribute *attr, char *buf) 91{ 92 struct dma_chan *chan; 93 unsigned long count = 0; 94 int i; 95 int err; 96 97 mutex_lock(&dma_list_mutex); 98 chan = dev_to_dma_chan(dev); 99 if (chan) { 100 for_each_possible_cpu(i) 101 count += per_cpu_ptr(chan->local, i)->memcpy_count; 102 err = sprintf(buf, "%lu\n", count); 103 } else 104 err = -ENODEV; 105 mutex_unlock(&dma_list_mutex); 106 107 return err; 108} 109static DEVICE_ATTR_RO(memcpy_count); 110 111static ssize_t bytes_transferred_show(struct device *dev, 112 struct device_attribute *attr, char *buf) 113{ 114 struct dma_chan *chan; 115 unsigned long count = 0; 116 int i; 117 int err; 118 119 mutex_lock(&dma_list_mutex); 120 chan = dev_to_dma_chan(dev); 121 if (chan) { 122 for_each_possible_cpu(i) 123 count += per_cpu_ptr(chan->local, i)->bytes_transferred; 124 err = sprintf(buf, "%lu\n", count); 125 } else 126 err = -ENODEV; 127 mutex_unlock(&dma_list_mutex); 128 129 return err; 130} 131static DEVICE_ATTR_RO(bytes_transferred); 132 133static ssize_t in_use_show(struct device *dev, struct device_attribute *attr, 134 char *buf) 135{ 136 struct dma_chan *chan; 137 int err; 138 139 mutex_lock(&dma_list_mutex); 140 chan = dev_to_dma_chan(dev); 141 if (chan) 142 err = sprintf(buf, "%d\n", chan->client_count); 143 else 144 err = -ENODEV; 145 mutex_unlock(&dma_list_mutex); 146 147 return err; 148} 149static DEVICE_ATTR_RO(in_use); 150 151static struct attribute *dma_dev_attrs[] = { 152 &dev_attr_memcpy_count.attr, 153 &dev_attr_bytes_transferred.attr, 154 &dev_attr_in_use.attr, 155 NULL, 156}; 157ATTRIBUTE_GROUPS(dma_dev); 158 159static void chan_dev_release(struct device *dev) 160{ 161 struct dma_chan_dev *chan_dev; 162 163 chan_dev = container_of(dev, typeof(*chan_dev), device); 164 if (atomic_dec_and_test(chan_dev->idr_ref)) { 165 ida_free(&dma_ida, chan_dev->dev_id); 166 kfree(chan_dev->idr_ref); 167 } 168 kfree(chan_dev); 169} 170 171static struct class dma_devclass = { 172 .name = "dma", 173 .dev_groups = dma_dev_groups, 174 .dev_release = chan_dev_release, 175}; 176 177/* --- client and device registration --- */ 178 179#define dma_device_satisfies_mask(device, mask) \ 180 __dma_device_satisfies_mask((device), &(mask)) 181static int 182__dma_device_satisfies_mask(struct dma_device *device, 183 const dma_cap_mask_t *want) 184{ 185 dma_cap_mask_t has; 186 187 bitmap_and(has.bits, want->bits, device->cap_mask.bits, 188 DMA_TX_TYPE_END); 189 return bitmap_equal(want->bits, has.bits, DMA_TX_TYPE_END); 190} 191 192static struct module *dma_chan_to_owner(struct dma_chan *chan) 193{ 194 return chan->device->dev->driver->owner; 195} 196 197/** 198 * balance_ref_count - catch up the channel reference count 199 * @chan - channel to balance ->client_count versus dmaengine_ref_count 200 * 201 * balance_ref_count must be called under dma_list_mutex 202 */ 203static void balance_ref_count(struct dma_chan *chan) 204{ 205 struct module *owner = dma_chan_to_owner(chan); 206 207 while (chan->client_count < dmaengine_ref_count) { 208 __module_get(owner); 209 chan->client_count++; 210 } 211} 212 213/** 214 * dma_chan_get - try to grab a dma channel's parent driver module 215 * @chan - channel to grab 216 * 217 * Must be called under dma_list_mutex 218 */ 219static int dma_chan_get(struct dma_chan *chan) 220{ 221 struct module *owner = dma_chan_to_owner(chan); 222 int ret; 223 224 /* The channel is already in use, update client count */ 225 if (chan->client_count) { 226 __module_get(owner); 227 goto out; 228 } 229 230 if (!try_module_get(owner)) 231 return -ENODEV; 232 233 /* allocate upon first client reference */ 234 if (chan->device->device_alloc_chan_resources) { 235 ret = chan->device->device_alloc_chan_resources(chan); 236 if (ret < 0) 237 goto err_out; 238 } 239 240 if (!dma_has_cap(DMA_PRIVATE, chan->device->cap_mask)) 241 balance_ref_count(chan); 242 243out: 244 chan->client_count++; 245 return 0; 246 247err_out: 248 module_put(owner); 249 return ret; 250} 251 252/** 253 * dma_chan_put - drop a reference to a dma channel's parent driver module 254 * @chan - channel to release 255 * 256 * Must be called under dma_list_mutex 257 */ 258static void dma_chan_put(struct dma_chan *chan) 259{ 260 /* This channel is not in use, bail out */ 261 if (!chan->client_count) 262 return; 263 264 chan->client_count--; 265 module_put(dma_chan_to_owner(chan)); 266 267 /* This channel is not in use anymore, free it */ 268 if (!chan->client_count && chan->device->device_free_chan_resources) { 269 /* Make sure all operations have completed */ 270 dmaengine_synchronize(chan); 271 chan->device->device_free_chan_resources(chan); 272 } 273 274 /* If the channel is used via a DMA request router, free the mapping */ 275 if (chan->router && chan->router->route_free) { 276 chan->router->route_free(chan->router->dev, chan->route_data); 277 chan->router = NULL; 278 chan->route_data = NULL; 279 } 280} 281 282enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie) 283{ 284 enum dma_status status; 285 unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000); 286 287 dma_async_issue_pending(chan); 288 do { 289 status = dma_async_is_tx_complete(chan, cookie, NULL, NULL); 290 if (time_after_eq(jiffies, dma_sync_wait_timeout)) { 291 dev_err(chan->device->dev, "%s: timeout!\n", __func__); 292 return DMA_ERROR; 293 } 294 if (status != DMA_IN_PROGRESS) 295 break; 296 cpu_relax(); 297 } while (1); 298 299 return status; 300} 301EXPORT_SYMBOL(dma_sync_wait); 302 303/** 304 * dma_cap_mask_all - enable iteration over all operation types 305 */ 306static dma_cap_mask_t dma_cap_mask_all; 307 308/** 309 * dma_chan_tbl_ent - tracks channel allocations per core/operation 310 * @chan - associated channel for this entry 311 */ 312struct dma_chan_tbl_ent { 313 struct dma_chan *chan; 314}; 315 316/** 317 * channel_table - percpu lookup table for memory-to-memory offload providers 318 */ 319static struct dma_chan_tbl_ent __percpu *channel_table[DMA_TX_TYPE_END]; 320 321static int __init dma_channel_table_init(void) 322{ 323 enum dma_transaction_type cap; 324 int err = 0; 325 326 bitmap_fill(dma_cap_mask_all.bits, DMA_TX_TYPE_END); 327 328 /* 'interrupt', 'private', and 'slave' are channel capabilities, 329 * but are not associated with an operation so they do not need 330 * an entry in the channel_table 331 */ 332 clear_bit(DMA_INTERRUPT, dma_cap_mask_all.bits); 333 clear_bit(DMA_PRIVATE, dma_cap_mask_all.bits); 334 clear_bit(DMA_SLAVE, dma_cap_mask_all.bits); 335 336 for_each_dma_cap_mask(cap, dma_cap_mask_all) { 337 channel_table[cap] = alloc_percpu(struct dma_chan_tbl_ent); 338 if (!channel_table[cap]) { 339 err = -ENOMEM; 340 break; 341 } 342 } 343 344 if (err) { 345 pr_err("initialization failure\n"); 346 for_each_dma_cap_mask(cap, dma_cap_mask_all) 347 free_percpu(channel_table[cap]); 348 } 349 350 return err; 351} 352arch_initcall(dma_channel_table_init); 353 354/** 355 * dma_find_channel - find a channel to carry out the operation 356 * @tx_type: transaction type 357 */ 358struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type) 359{ 360 return this_cpu_read(channel_table[tx_type]->chan); 361} 362EXPORT_SYMBOL(dma_find_channel); 363 364/** 365 * dma_issue_pending_all - flush all pending operations across all channels 366 */ 367void dma_issue_pending_all(void) 368{ 369 struct dma_device *device; 370 struct dma_chan *chan; 371 372 rcu_read_lock(); 373 list_for_each_entry_rcu(device, &dma_device_list, global_node) { 374 if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) 375 continue; 376 list_for_each_entry(chan, &device->channels, device_node) 377 if (chan->client_count) 378 device->device_issue_pending(chan); 379 } 380 rcu_read_unlock(); 381} 382EXPORT_SYMBOL(dma_issue_pending_all); 383 384/** 385 * dma_chan_is_local - returns true if the channel is in the same numa-node as the cpu 386 */ 387static bool dma_chan_is_local(struct dma_chan *chan, int cpu) 388{ 389 int node = dev_to_node(chan->device->dev); 390 return node == NUMA_NO_NODE || 391 cpumask_test_cpu(cpu, cpumask_of_node(node)); 392} 393 394/** 395 * min_chan - returns the channel with min count and in the same numa-node as the cpu 396 * @cap: capability to match 397 * @cpu: cpu index which the channel should be close to 398 * 399 * If some channels are close to the given cpu, the one with the lowest 400 * reference count is returned. Otherwise, cpu is ignored and only the 401 * reference count is taken into account. 402 * Must be called under dma_list_mutex. 403 */ 404static struct dma_chan *min_chan(enum dma_transaction_type cap, int cpu) 405{ 406 struct dma_device *device; 407 struct dma_chan *chan; 408 struct dma_chan *min = NULL; 409 struct dma_chan *localmin = NULL; 410 411 list_for_each_entry(device, &dma_device_list, global_node) { 412 if (!dma_has_cap(cap, device->cap_mask) || 413 dma_has_cap(DMA_PRIVATE, device->cap_mask)) 414 continue; 415 list_for_each_entry(chan, &device->channels, device_node) { 416 if (!chan->client_count) 417 continue; 418 if (!min || chan->table_count < min->table_count) 419 min = chan; 420 421 if (dma_chan_is_local(chan, cpu)) 422 if (!localmin || 423 chan->table_count < localmin->table_count) 424 localmin = chan; 425 } 426 } 427 428 chan = localmin ? localmin : min; 429 430 if (chan) 431 chan->table_count++; 432 433 return chan; 434} 435 436/** 437 * dma_channel_rebalance - redistribute the available channels 438 * 439 * Optimize for cpu isolation (each cpu gets a dedicated channel for an 440 * operation type) in the SMP case, and operation isolation (avoid 441 * multi-tasking channels) in the non-SMP case. Must be called under 442 * dma_list_mutex. 443 */ 444static void dma_channel_rebalance(void) 445{ 446 struct dma_chan *chan; 447 struct dma_device *device; 448 int cpu; 449 int cap; 450 451 /* undo the last distribution */ 452 for_each_dma_cap_mask(cap, dma_cap_mask_all) 453 for_each_possible_cpu(cpu) 454 per_cpu_ptr(channel_table[cap], cpu)->chan = NULL; 455 456 list_for_each_entry(device, &dma_device_list, global_node) { 457 if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) 458 continue; 459 list_for_each_entry(chan, &device->channels, device_node) 460 chan->table_count = 0; 461 } 462 463 /* don't populate the channel_table if no clients are available */ 464 if (!dmaengine_ref_count) 465 return; 466 467 /* redistribute available channels */ 468 for_each_dma_cap_mask(cap, dma_cap_mask_all) 469 for_each_online_cpu(cpu) { 470 chan = min_chan(cap, cpu); 471 per_cpu_ptr(channel_table[cap], cpu)->chan = chan; 472 } 473} 474 475int dma_get_slave_caps(struct dma_chan *chan, struct dma_slave_caps *caps) 476{ 477 struct dma_device *device; 478 479 if (!chan || !caps) 480 return -EINVAL; 481 482 device = chan->device; 483 484 /* check if the channel supports slave transactions */ 485 if (!(test_bit(DMA_SLAVE, device->cap_mask.bits) || 486 test_bit(DMA_CYCLIC, device->cap_mask.bits))) 487 return -ENXIO; 488 489 /* 490 * Check whether it reports it uses the generic slave 491 * capabilities, if not, that means it doesn't support any 492 * kind of slave capabilities reporting. 493 */ 494 if (!device->directions) 495 return -ENXIO; 496 497 caps->src_addr_widths = device->src_addr_widths; 498 caps->dst_addr_widths = device->dst_addr_widths; 499 caps->directions = device->directions; 500 caps->max_burst = device->max_burst; 501 caps->residue_granularity = device->residue_granularity; 502 caps->descriptor_reuse = device->descriptor_reuse; 503 caps->cmd_pause = !!device->device_pause; 504 caps->cmd_resume = !!device->device_resume; 505 caps->cmd_terminate = !!device->device_terminate_all; 506 507 return 0; 508} 509EXPORT_SYMBOL_GPL(dma_get_slave_caps); 510 511static struct dma_chan *private_candidate(const dma_cap_mask_t *mask, 512 struct dma_device *dev, 513 dma_filter_fn fn, void *fn_param) 514{ 515 struct dma_chan *chan; 516 517 if (mask && !__dma_device_satisfies_mask(dev, mask)) { 518 dev_dbg(dev->dev, "%s: wrong capabilities\n", __func__); 519 return NULL; 520 } 521 /* devices with multiple channels need special handling as we need to 522 * ensure that all channels are either private or public. 523 */ 524 if (dev->chancnt > 1 && !dma_has_cap(DMA_PRIVATE, dev->cap_mask)) 525 list_for_each_entry(chan, &dev->channels, device_node) { 526 /* some channels are already publicly allocated */ 527 if (chan->client_count) 528 return NULL; 529 } 530 531 list_for_each_entry(chan, &dev->channels, device_node) { 532 if (chan->client_count) { 533 dev_dbg(dev->dev, "%s: %s busy\n", 534 __func__, dma_chan_name(chan)); 535 continue; 536 } 537 if (fn && !fn(chan, fn_param)) { 538 dev_dbg(dev->dev, "%s: %s filter said false\n", 539 __func__, dma_chan_name(chan)); 540 continue; 541 } 542 return chan; 543 } 544 545 return NULL; 546} 547 548static struct dma_chan *find_candidate(struct dma_device *device, 549 const dma_cap_mask_t *mask, 550 dma_filter_fn fn, void *fn_param) 551{ 552 struct dma_chan *chan = private_candidate(mask, device, fn, fn_param); 553 int err; 554 555 if (chan) { 556 /* Found a suitable channel, try to grab, prep, and return it. 557 * We first set DMA_PRIVATE to disable balance_ref_count as this 558 * channel will not be published in the general-purpose 559 * allocator 560 */ 561 dma_cap_set(DMA_PRIVATE, device->cap_mask); 562 device->privatecnt++; 563 err = dma_chan_get(chan); 564 565 if (err) { 566 if (err == -ENODEV) { 567 dev_dbg(device->dev, "%s: %s module removed\n", 568 __func__, dma_chan_name(chan)); 569 list_del_rcu(&device->global_node); 570 } else 571 dev_dbg(device->dev, 572 "%s: failed to get %s: (%d)\n", 573 __func__, dma_chan_name(chan), err); 574 575 if (--device->privatecnt == 0) 576 dma_cap_clear(DMA_PRIVATE, device->cap_mask); 577 578 chan = ERR_PTR(err); 579 } 580 } 581 582 return chan ? chan : ERR_PTR(-EPROBE_DEFER); 583} 584 585/** 586 * dma_get_slave_channel - try to get specific channel exclusively 587 * @chan: target channel 588 */ 589struct dma_chan *dma_get_slave_channel(struct dma_chan *chan) 590{ 591 int err = -EBUSY; 592 593 /* lock against __dma_request_channel */ 594 mutex_lock(&dma_list_mutex); 595 596 if (chan->client_count == 0) { 597 struct dma_device *device = chan->device; 598 599 dma_cap_set(DMA_PRIVATE, device->cap_mask); 600 device->privatecnt++; 601 err = dma_chan_get(chan); 602 if (err) { 603 dev_dbg(chan->device->dev, 604 "%s: failed to get %s: (%d)\n", 605 __func__, dma_chan_name(chan), err); 606 chan = NULL; 607 if (--device->privatecnt == 0) 608 dma_cap_clear(DMA_PRIVATE, device->cap_mask); 609 } 610 } else 611 chan = NULL; 612 613 mutex_unlock(&dma_list_mutex); 614 615 616 return chan; 617} 618EXPORT_SYMBOL_GPL(dma_get_slave_channel); 619 620struct dma_chan *dma_get_any_slave_channel(struct dma_device *device) 621{ 622 dma_cap_mask_t mask; 623 struct dma_chan *chan; 624 625 dma_cap_zero(mask); 626 dma_cap_set(DMA_SLAVE, mask); 627 628 /* lock against __dma_request_channel */ 629 mutex_lock(&dma_list_mutex); 630 631 chan = find_candidate(device, &mask, NULL, NULL); 632 633 mutex_unlock(&dma_list_mutex); 634 635 return IS_ERR(chan) ? NULL : chan; 636} 637EXPORT_SYMBOL_GPL(dma_get_any_slave_channel); 638 639/** 640 * __dma_request_channel - try to allocate an exclusive channel 641 * @mask: capabilities that the channel must satisfy 642 * @fn: optional callback to disposition available channels 643 * @fn_param: opaque parameter to pass to dma_filter_fn 644 * 645 * Returns pointer to appropriate DMA channel on success or NULL. 646 */ 647struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask, 648 dma_filter_fn fn, void *fn_param) 649{ 650 struct dma_device *device, *_d; 651 struct dma_chan *chan = NULL; 652 653 /* Find a channel */ 654 mutex_lock(&dma_list_mutex); 655 list_for_each_entry_safe(device, _d, &dma_device_list, global_node) { 656 chan = find_candidate(device, mask, fn, fn_param); 657 if (!IS_ERR(chan)) 658 break; 659 660 chan = NULL; 661 } 662 mutex_unlock(&dma_list_mutex); 663 664 pr_debug("%s: %s (%s)\n", 665 __func__, 666 chan ? "success" : "fail", 667 chan ? dma_chan_name(chan) : NULL); 668 669 return chan; 670} 671EXPORT_SYMBOL_GPL(__dma_request_channel); 672 673static const struct dma_slave_map *dma_filter_match(struct dma_device *device, 674 const char *name, 675 struct device *dev) 676{ 677 int i; 678 679 if (!device->filter.mapcnt) 680 return NULL; 681 682 for (i = 0; i < device->filter.mapcnt; i++) { 683 const struct dma_slave_map *map = &device->filter.map[i]; 684 685 if (!strcmp(map->devname, dev_name(dev)) && 686 !strcmp(map->slave, name)) 687 return map; 688 } 689 690 return NULL; 691} 692 693/** 694 * dma_request_chan - try to allocate an exclusive slave channel 695 * @dev: pointer to client device structure 696 * @name: slave channel name 697 * 698 * Returns pointer to appropriate DMA channel on success or an error pointer. 699 */ 700struct dma_chan *dma_request_chan(struct device *dev, const char *name) 701{ 702 struct dma_device *d, *_d; 703 struct dma_chan *chan = NULL; 704 705 /* If device-tree is present get slave info from here */ 706 if (dev->of_node) 707 chan = of_dma_request_slave_channel(dev->of_node, name); 708 709 /* If device was enumerated by ACPI get slave info from here */ 710 if (has_acpi_companion(dev) && !chan) 711 chan = acpi_dma_request_slave_chan_by_name(dev, name); 712 713 if (chan) { 714 /* Valid channel found or requester need to be deferred */ 715 if (!IS_ERR(chan) || PTR_ERR(chan) == -EPROBE_DEFER) 716 return chan; 717 } 718 719 /* Try to find the channel via the DMA filter map(s) */ 720 mutex_lock(&dma_list_mutex); 721 list_for_each_entry_safe(d, _d, &dma_device_list, global_node) { 722 dma_cap_mask_t mask; 723 const struct dma_slave_map *map = dma_filter_match(d, name, dev); 724 725 if (!map) 726 continue; 727 728 dma_cap_zero(mask); 729 dma_cap_set(DMA_SLAVE, mask); 730 731 chan = find_candidate(d, &mask, d->filter.fn, map->param); 732 if (!IS_ERR(chan)) 733 break; 734 } 735 mutex_unlock(&dma_list_mutex); 736 737 return chan ? chan : ERR_PTR(-EPROBE_DEFER); 738} 739EXPORT_SYMBOL_GPL(dma_request_chan); 740 741/** 742 * dma_request_slave_channel - try to allocate an exclusive slave channel 743 * @dev: pointer to client device structure 744 * @name: slave channel name 745 * 746 * Returns pointer to appropriate DMA channel on success or NULL. 747 */ 748struct dma_chan *dma_request_slave_channel(struct device *dev, 749 const char *name) 750{ 751 struct dma_chan *ch = dma_request_chan(dev, name); 752 if (IS_ERR(ch)) 753 return NULL; 754 755 return ch; 756} 757EXPORT_SYMBOL_GPL(dma_request_slave_channel); 758 759/** 760 * dma_request_chan_by_mask - allocate a channel satisfying certain capabilities 761 * @mask: capabilities that the channel must satisfy 762 * 763 * Returns pointer to appropriate DMA channel on success or an error pointer. 764 */ 765struct dma_chan *dma_request_chan_by_mask(const dma_cap_mask_t *mask) 766{ 767 struct dma_chan *chan; 768 769 if (!mask) 770 return ERR_PTR(-ENODEV); 771 772 chan = __dma_request_channel(mask, NULL, NULL); 773 if (!chan) { 774 mutex_lock(&dma_list_mutex); 775 if (list_empty(&dma_device_list)) 776 chan = ERR_PTR(-EPROBE_DEFER); 777 else 778 chan = ERR_PTR(-ENODEV); 779 mutex_unlock(&dma_list_mutex); 780 } 781 782 return chan; 783} 784EXPORT_SYMBOL_GPL(dma_request_chan_by_mask); 785 786void dma_release_channel(struct dma_chan *chan) 787{ 788 mutex_lock(&dma_list_mutex); 789 WARN_ONCE(chan->client_count != 1, 790 "chan reference count %d != 1\n", chan->client_count); 791 dma_chan_put(chan); 792 /* drop PRIVATE cap enabled by __dma_request_channel() */ 793 if (--chan->device->privatecnt == 0) 794 dma_cap_clear(DMA_PRIVATE, chan->device->cap_mask); 795 mutex_unlock(&dma_list_mutex); 796} 797EXPORT_SYMBOL_GPL(dma_release_channel); 798 799/** 800 * dmaengine_get - register interest in dma_channels 801 */ 802void dmaengine_get(void) 803{ 804 struct dma_device *device, *_d; 805 struct dma_chan *chan; 806 int err; 807 808 mutex_lock(&dma_list_mutex); 809 dmaengine_ref_count++; 810 811 /* try to grab channels */ 812 list_for_each_entry_safe(device, _d, &dma_device_list, global_node) { 813 if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) 814 continue; 815 list_for_each_entry(chan, &device->channels, device_node) { 816 err = dma_chan_get(chan); 817 if (err == -ENODEV) { 818 /* module removed before we could use it */ 819 list_del_rcu(&device->global_node); 820 break; 821 } else if (err) 822 dev_dbg(chan->device->dev, 823 "%s: failed to get %s: (%d)\n", 824 __func__, dma_chan_name(chan), err); 825 } 826 } 827 828 /* if this is the first reference and there were channels 829 * waiting we need to rebalance to get those channels 830 * incorporated into the channel table 831 */ 832 if (dmaengine_ref_count == 1) 833 dma_channel_rebalance(); 834 mutex_unlock(&dma_list_mutex); 835} 836EXPORT_SYMBOL(dmaengine_get); 837 838/** 839 * dmaengine_put - let dma drivers be removed when ref_count == 0 840 */ 841void dmaengine_put(void) 842{ 843 struct dma_device *device; 844 struct dma_chan *chan; 845 846 mutex_lock(&dma_list_mutex); 847 dmaengine_ref_count--; 848 BUG_ON(dmaengine_ref_count < 0); 849 /* drop channel references */ 850 list_for_each_entry(device, &dma_device_list, global_node) { 851 if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) 852 continue; 853 list_for_each_entry(chan, &device->channels, device_node) 854 dma_chan_put(chan); 855 } 856 mutex_unlock(&dma_list_mutex); 857} 858EXPORT_SYMBOL(dmaengine_put); 859 860static bool device_has_all_tx_types(struct dma_device *device) 861{ 862 /* A device that satisfies this test has channels that will never cause 863 * an async_tx channel switch event as all possible operation types can 864 * be handled. 865 */ 866 #ifdef CONFIG_ASYNC_TX_DMA 867 if (!dma_has_cap(DMA_INTERRUPT, device->cap_mask)) 868 return false; 869 #endif 870 871 #if IS_ENABLED(CONFIG_ASYNC_MEMCPY) 872 if (!dma_has_cap(DMA_MEMCPY, device->cap_mask)) 873 return false; 874 #endif 875 876 #if IS_ENABLED(CONFIG_ASYNC_XOR) 877 if (!dma_has_cap(DMA_XOR, device->cap_mask)) 878 return false; 879 880 #ifndef CONFIG_ASYNC_TX_DISABLE_XOR_VAL_DMA 881 if (!dma_has_cap(DMA_XOR_VAL, device->cap_mask)) 882 return false; 883 #endif 884 #endif 885 886 #if IS_ENABLED(CONFIG_ASYNC_PQ) 887 if (!dma_has_cap(DMA_PQ, device->cap_mask)) 888 return false; 889 890 #ifndef CONFIG_ASYNC_TX_DISABLE_PQ_VAL_DMA 891 if (!dma_has_cap(DMA_PQ_VAL, device->cap_mask)) 892 return false; 893 #endif 894 #endif 895 896 return true; 897} 898 899static int get_dma_id(struct dma_device *device) 900{ 901 int rc = ida_alloc(&dma_ida, GFP_KERNEL); 902 903 if (rc < 0) 904 return rc; 905 device->dev_id = rc; 906 return 0; 907} 908 909/** 910 * dma_async_device_register - registers DMA devices found 911 * @device: &dma_device 912 */ 913int dma_async_device_register(struct dma_device *device) 914{ 915 int chancnt = 0, rc; 916 struct dma_chan* chan; 917 atomic_t *idr_ref; 918 919 if (!device) 920 return -ENODEV; 921 922 /* validate device routines */ 923 if (!device->dev) { 924 pr_err("DMAdevice must have dev\n"); 925 return -EIO; 926 } 927 928 if (dma_has_cap(DMA_MEMCPY, device->cap_mask) && !device->device_prep_dma_memcpy) { 929 dev_err(device->dev, 930 "Device claims capability %s, but op is not defined\n", 931 "DMA_MEMCPY"); 932 return -EIO; 933 } 934 935 if (dma_has_cap(DMA_XOR, device->cap_mask) && !device->device_prep_dma_xor) { 936 dev_err(device->dev, 937 "Device claims capability %s, but op is not defined\n", 938 "DMA_XOR"); 939 return -EIO; 940 } 941 942 if (dma_has_cap(DMA_XOR_VAL, device->cap_mask) && !device->device_prep_dma_xor_val) { 943 dev_err(device->dev, 944 "Device claims capability %s, but op is not defined\n", 945 "DMA_XOR_VAL"); 946 return -EIO; 947 } 948 949 if (dma_has_cap(DMA_PQ, device->cap_mask) && !device->device_prep_dma_pq) { 950 dev_err(device->dev, 951 "Device claims capability %s, but op is not defined\n", 952 "DMA_PQ"); 953 return -EIO; 954 } 955 956 if (dma_has_cap(DMA_PQ_VAL, device->cap_mask) && !device->device_prep_dma_pq_val) { 957 dev_err(device->dev, 958 "Device claims capability %s, but op is not defined\n", 959 "DMA_PQ_VAL"); 960 return -EIO; 961 } 962 963 if (dma_has_cap(DMA_MEMSET, device->cap_mask) && !device->device_prep_dma_memset) { 964 dev_err(device->dev, 965 "Device claims capability %s, but op is not defined\n", 966 "DMA_MEMSET"); 967 return -EIO; 968 } 969 970 if (dma_has_cap(DMA_INTERRUPT, device->cap_mask) && !device->device_prep_dma_interrupt) { 971 dev_err(device->dev, 972 "Device claims capability %s, but op is not defined\n", 973 "DMA_INTERRUPT"); 974 return -EIO; 975 } 976 977 if (dma_has_cap(DMA_CYCLIC, device->cap_mask) && !device->device_prep_dma_cyclic) { 978 dev_err(device->dev, 979 "Device claims capability %s, but op is not defined\n", 980 "DMA_CYCLIC"); 981 return -EIO; 982 } 983 984 if (dma_has_cap(DMA_INTERLEAVE, device->cap_mask) && !device->device_prep_interleaved_dma) { 985 dev_err(device->dev, 986 "Device claims capability %s, but op is not defined\n", 987 "DMA_INTERLEAVE"); 988 return -EIO; 989 } 990 991 992 if (!device->device_tx_status) { 993 dev_err(device->dev, "Device tx_status is not defined\n"); 994 return -EIO; 995 } 996 997 998 if (!device->device_issue_pending) { 999 dev_err(device->dev, "Device issue_pending is not defined\n"); 1000 return -EIO; 1001 } 1002 1003 /* note: this only matters in the 1004 * CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=n case 1005 */ 1006 if (device_has_all_tx_types(device)) 1007 dma_cap_set(DMA_ASYNC_TX, device->cap_mask); 1008 1009 idr_ref = kmalloc(sizeof(*idr_ref), GFP_KERNEL); 1010 if (!idr_ref) 1011 return -ENOMEM; 1012 rc = get_dma_id(device); 1013 if (rc != 0) { 1014 kfree(idr_ref); 1015 return rc; 1016 } 1017 1018 atomic_set(idr_ref, 0); 1019 1020 /* represent channels in sysfs. Probably want devs too */ 1021 list_for_each_entry(chan, &device->channels, device_node) { 1022 rc = -ENOMEM; 1023 chan->local = alloc_percpu(typeof(*chan->local)); 1024 if (chan->local == NULL) 1025 goto err_out; 1026 chan->dev = kzalloc(sizeof(*chan->dev), GFP_KERNEL); 1027 if (chan->dev == NULL) { 1028 free_percpu(chan->local); 1029 chan->local = NULL; 1030 goto err_out; 1031 } 1032 1033 chan->chan_id = chancnt++; 1034 chan->dev->device.class = &dma_devclass; 1035 chan->dev->device.parent = device->dev; 1036 chan->dev->chan = chan; 1037 chan->dev->idr_ref = idr_ref; 1038 chan->dev->dev_id = device->dev_id; 1039 atomic_inc(idr_ref); 1040 dev_set_name(&chan->dev->device, "dma%dchan%d", 1041 device->dev_id, chan->chan_id); 1042 1043 rc = device_register(&chan->dev->device); 1044 if (rc) { 1045 free_percpu(chan->local); 1046 chan->local = NULL; 1047 kfree(chan->dev); 1048 atomic_dec(idr_ref); 1049 goto err_out; 1050 } 1051 chan->client_count = 0; 1052 } 1053 1054 if (!chancnt) { 1055 dev_err(device->dev, "%s: device has no channels!\n", __func__); 1056 rc = -ENODEV; 1057 goto err_out; 1058 } 1059 1060 device->chancnt = chancnt; 1061 1062 mutex_lock(&dma_list_mutex); 1063 /* take references on public channels */ 1064 if (dmaengine_ref_count && !dma_has_cap(DMA_PRIVATE, device->cap_mask)) 1065 list_for_each_entry(chan, &device->channels, device_node) { 1066 /* if clients are already waiting for channels we need 1067 * to take references on their behalf 1068 */ 1069 if (dma_chan_get(chan) == -ENODEV) { 1070 /* note we can only get here for the first 1071 * channel as the remaining channels are 1072 * guaranteed to get a reference 1073 */ 1074 rc = -ENODEV; 1075 mutex_unlock(&dma_list_mutex); 1076 goto err_out; 1077 } 1078 } 1079 list_add_tail_rcu(&device->global_node, &dma_device_list); 1080 if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) 1081 device->privatecnt++; /* Always private */ 1082 dma_channel_rebalance(); 1083 mutex_unlock(&dma_list_mutex); 1084 1085 return 0; 1086 1087err_out: 1088 /* if we never registered a channel just release the idr */ 1089 if (atomic_read(idr_ref) == 0) { 1090 ida_free(&dma_ida, device->dev_id); 1091 kfree(idr_ref); 1092 return rc; 1093 } 1094 1095 list_for_each_entry(chan, &device->channels, device_node) { 1096 if (chan->local == NULL) 1097 continue; 1098 mutex_lock(&dma_list_mutex); 1099 chan->dev->chan = NULL; 1100 mutex_unlock(&dma_list_mutex); 1101 device_unregister(&chan->dev->device); 1102 free_percpu(chan->local); 1103 } 1104 return rc; 1105} 1106EXPORT_SYMBOL(dma_async_device_register); 1107 1108/** 1109 * dma_async_device_unregister - unregister a DMA device 1110 * @device: &dma_device 1111 * 1112 * This routine is called by dma driver exit routines, dmaengine holds module 1113 * references to prevent it being called while channels are in use. 1114 */ 1115void dma_async_device_unregister(struct dma_device *device) 1116{ 1117 struct dma_chan *chan; 1118 1119 mutex_lock(&dma_list_mutex); 1120 list_del_rcu(&device->global_node); 1121 dma_channel_rebalance(); 1122 mutex_unlock(&dma_list_mutex); 1123 1124 list_for_each_entry(chan, &device->channels, device_node) { 1125 WARN_ONCE(chan->client_count, 1126 "%s called while %d clients hold a reference\n", 1127 __func__, chan->client_count); 1128 mutex_lock(&dma_list_mutex); 1129 chan->dev->chan = NULL; 1130 mutex_unlock(&dma_list_mutex); 1131 device_unregister(&chan->dev->device); 1132 free_percpu(chan->local); 1133 } 1134} 1135EXPORT_SYMBOL(dma_async_device_unregister); 1136 1137static void dmam_device_release(struct device *dev, void *res) 1138{ 1139 struct dma_device *device; 1140 1141 device = *(struct dma_device **)res; 1142 dma_async_device_unregister(device); 1143} 1144 1145/** 1146 * dmaenginem_async_device_register - registers DMA devices found 1147 * @device: &dma_device 1148 * 1149 * The operation is managed and will be undone on driver detach. 1150 */ 1151int dmaenginem_async_device_register(struct dma_device *device) 1152{ 1153 void *p; 1154 int ret; 1155 1156 p = devres_alloc(dmam_device_release, sizeof(void *), GFP_KERNEL); 1157 if (!p) 1158 return -ENOMEM; 1159 1160 ret = dma_async_device_register(device); 1161 if (!ret) { 1162 *(struct dma_device **)p = device; 1163 devres_add(device->dev, p); 1164 } else { 1165 devres_free(p); 1166 } 1167 1168 return ret; 1169} 1170EXPORT_SYMBOL(dmaenginem_async_device_register); 1171 1172struct dmaengine_unmap_pool { 1173 struct kmem_cache *cache; 1174 const char *name; 1175 mempool_t *pool; 1176 size_t size; 1177}; 1178 1179#define __UNMAP_POOL(x) { .size = x, .name = "dmaengine-unmap-" __stringify(x) } 1180static struct dmaengine_unmap_pool unmap_pool[] = { 1181 __UNMAP_POOL(2), 1182 #if IS_ENABLED(CONFIG_DMA_ENGINE_RAID) 1183 __UNMAP_POOL(16), 1184 __UNMAP_POOL(128), 1185 __UNMAP_POOL(256), 1186 #endif 1187}; 1188 1189static struct dmaengine_unmap_pool *__get_unmap_pool(int nr) 1190{ 1191 int order = get_count_order(nr); 1192 1193 switch (order) { 1194 case 0 ... 1: 1195 return &unmap_pool[0]; 1196#if IS_ENABLED(CONFIG_DMA_ENGINE_RAID) 1197 case 2 ... 4: 1198 return &unmap_pool[1]; 1199 case 5 ... 7: 1200 return &unmap_pool[2]; 1201 case 8: 1202 return &unmap_pool[3]; 1203#endif 1204 default: 1205 BUG(); 1206 return NULL; 1207 } 1208} 1209 1210static void dmaengine_unmap(struct kref *kref) 1211{ 1212 struct dmaengine_unmap_data *unmap = container_of(kref, typeof(*unmap), kref); 1213 struct device *dev = unmap->dev; 1214 int cnt, i; 1215 1216 cnt = unmap->to_cnt; 1217 for (i = 0; i < cnt; i++) 1218 dma_unmap_page(dev, unmap->addr[i], unmap->len, 1219 DMA_TO_DEVICE); 1220 cnt += unmap->from_cnt; 1221 for (; i < cnt; i++) 1222 dma_unmap_page(dev, unmap->addr[i], unmap->len, 1223 DMA_FROM_DEVICE); 1224 cnt += unmap->bidi_cnt; 1225 for (; i < cnt; i++) { 1226 if (unmap->addr[i] == 0) 1227 continue; 1228 dma_unmap_page(dev, unmap->addr[i], unmap->len, 1229 DMA_BIDIRECTIONAL); 1230 } 1231 cnt = unmap->map_cnt; 1232 mempool_free(unmap, __get_unmap_pool(cnt)->pool); 1233} 1234 1235void dmaengine_unmap_put(struct dmaengine_unmap_data *unmap) 1236{ 1237 if (unmap) 1238 kref_put(&unmap->kref, dmaengine_unmap); 1239} 1240EXPORT_SYMBOL_GPL(dmaengine_unmap_put); 1241 1242static void dmaengine_destroy_unmap_pool(void) 1243{ 1244 int i; 1245 1246 for (i = 0; i < ARRAY_SIZE(unmap_pool); i++) { 1247 struct dmaengine_unmap_pool *p = &unmap_pool[i]; 1248 1249 mempool_destroy(p->pool); 1250 p->pool = NULL; 1251 kmem_cache_destroy(p->cache); 1252 p->cache = NULL; 1253 } 1254} 1255 1256static int __init dmaengine_init_unmap_pool(void) 1257{ 1258 int i; 1259 1260 for (i = 0; i < ARRAY_SIZE(unmap_pool); i++) { 1261 struct dmaengine_unmap_pool *p = &unmap_pool[i]; 1262 size_t size; 1263 1264 size = sizeof(struct dmaengine_unmap_data) + 1265 sizeof(dma_addr_t) * p->size; 1266 1267 p->cache = kmem_cache_create(p->name, size, 0, 1268 SLAB_HWCACHE_ALIGN, NULL); 1269 if (!p->cache) 1270 break; 1271 p->pool = mempool_create_slab_pool(1, p->cache); 1272 if (!p->pool) 1273 break; 1274 } 1275 1276 if (i == ARRAY_SIZE(unmap_pool)) 1277 return 0; 1278 1279 dmaengine_destroy_unmap_pool(); 1280 return -ENOMEM; 1281} 1282 1283struct dmaengine_unmap_data * 1284dmaengine_get_unmap_data(struct device *dev, int nr, gfp_t flags) 1285{ 1286 struct dmaengine_unmap_data *unmap; 1287 1288 unmap = mempool_alloc(__get_unmap_pool(nr)->pool, flags); 1289 if (!unmap) 1290 return NULL; 1291 1292 memset(unmap, 0, sizeof(*unmap)); 1293 kref_init(&unmap->kref); 1294 unmap->dev = dev; 1295 unmap->map_cnt = nr; 1296 1297 return unmap; 1298} 1299EXPORT_SYMBOL(dmaengine_get_unmap_data); 1300 1301void dma_async_tx_descriptor_init(struct dma_async_tx_descriptor *tx, 1302 struct dma_chan *chan) 1303{ 1304 tx->chan = chan; 1305 #ifdef CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH 1306 spin_lock_init(&tx->lock); 1307 #endif 1308} 1309EXPORT_SYMBOL(dma_async_tx_descriptor_init); 1310 1311/* dma_wait_for_async_tx - spin wait for a transaction to complete 1312 * @tx: in-flight transaction to wait on 1313 */ 1314enum dma_status 1315dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx) 1316{ 1317 unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000); 1318 1319 if (!tx) 1320 return DMA_COMPLETE; 1321 1322 while (tx->cookie == -EBUSY) { 1323 if (time_after_eq(jiffies, dma_sync_wait_timeout)) { 1324 dev_err(tx->chan->device->dev, 1325 "%s timeout waiting for descriptor submission\n", 1326 __func__); 1327 return DMA_ERROR; 1328 } 1329 cpu_relax(); 1330 } 1331 return dma_sync_wait(tx->chan, tx->cookie); 1332} 1333EXPORT_SYMBOL_GPL(dma_wait_for_async_tx); 1334 1335/* dma_run_dependencies - helper routine for dma drivers to process 1336 * (start) dependent operations on their target channel 1337 * @tx: transaction with dependencies 1338 */ 1339void dma_run_dependencies(struct dma_async_tx_descriptor *tx) 1340{ 1341 struct dma_async_tx_descriptor *dep = txd_next(tx); 1342 struct dma_async_tx_descriptor *dep_next; 1343 struct dma_chan *chan; 1344 1345 if (!dep) 1346 return; 1347 1348 /* we'll submit tx->next now, so clear the link */ 1349 txd_clear_next(tx); 1350 chan = dep->chan; 1351 1352 /* keep submitting up until a channel switch is detected 1353 * in that case we will be called again as a result of 1354 * processing the interrupt from async_tx_channel_switch 1355 */ 1356 for (; dep; dep = dep_next) { 1357 txd_lock(dep); 1358 txd_clear_parent(dep); 1359 dep_next = txd_next(dep); 1360 if (dep_next && dep_next->chan == chan) 1361 txd_clear_next(dep); /* ->next will be submitted */ 1362 else 1363 dep_next = NULL; /* submit current dep and terminate */ 1364 txd_unlock(dep); 1365 1366 dep->tx_submit(dep); 1367 } 1368 1369 chan->device->device_issue_pending(chan); 1370} 1371EXPORT_SYMBOL_GPL(dma_run_dependencies); 1372 1373static int __init dma_bus_init(void) 1374{ 1375 int err = dmaengine_init_unmap_pool(); 1376 1377 if (err) 1378 return err; 1379 return class_register(&dma_devclass); 1380} 1381arch_initcall(dma_bus_init); 1382 1383