tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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linux
1Ingenic jz47xx pin controller
2
3Please refer to pinctrl-bindings.txt in this directory for details of the
4common pinctrl bindings used by client devices, including the meaning of the
5phrase "pin configuration node".
6
7For the jz47xx SoCs, pin control is tightly bound with GPIO ports. All pins may
8be used as GPIOs, multiplexed device functions are configured within the
9GPIO port configuration registers and it is typical to refer to pins using the
10naming scheme "PxN" where x is a character identifying the GPIO port with
11which the pin is associated and N is an integer from 0 to 31 identifying the
12pin within that GPIO port. For example PA0 is the first pin in GPIO port A, and
13PB31 is the last pin in GPIO port B. The jz4740 contains 4 GPIO ports, PA to
14PD, for a total of 128 pins. The jz4780 contains 6 GPIO ports, PA to PF, for a
15total of 192 pins.
16
17
18Required properties:
19--------------------
20
21 - compatible: One of:
22 - "ingenic,jz4740-pinctrl"
23 - "ingenic,jz4725b-pinctrl"
24 - "ingenic,jz4770-pinctrl"
25 - "ingenic,jz4780-pinctrl"
26 - reg: Address range of the pinctrl registers.
27
28
29Required properties for sub-nodes (GPIO chips):
30-----------------------------------------------
31
32 - compatible: Must contain one of:
33 - "ingenic,jz4740-gpio"
34 - "ingenic,jz4770-gpio"
35 - "ingenic,jz4780-gpio"
36 - reg: The GPIO bank number.
37 - interrupt-controller: Marks the device node as an interrupt controller.
38 - interrupts: Interrupt specifier for the controllers interrupt.
39 - #interrupt-cells: Should be 2. Refer to
40 ../interrupt-controller/interrupts.txt for more details.
41 - gpio-controller: Marks the device node as a GPIO controller.
42 - #gpio-cells: Should be 2. The first cell is the GPIO number and the second
43 cell specifies GPIO flags, as defined in <dt-bindings/gpio/gpio.h>. Only the
44 GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported.
45 - gpio-ranges: Range of pins managed by the GPIO controller. Refer to
46 ../gpio/gpio.txt for more details.
47
48
49Example:
50--------
51
52pinctrl: pin-controller@10010000 {
53 compatible = "ingenic,jz4740-pinctrl";
54 reg = <0x10010000 0x400>;
55 #address-cells = <1>;
56 #size-cells = <0>;
57
58 gpa: gpio@0 {
59 compatible = "ingenic,jz4740-gpio";
60 reg = <0>;
61
62 gpio-controller;
63 gpio-ranges = <&pinctrl 0 0 32>;
64 #gpio-cells = <2>;
65
66 interrupt-controller;
67 #interrupt-cells = <2>;
68
69 interrupt-parent = <&intc>;
70 interrupts = <28>;
71 };
72};