Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/*
2 * Copyright 2016 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26#include "dm_services.h"
27#include "dc.h"
28#include "mod_freesync.h"
29#include "core_types.h"
30
31#define MOD_FREESYNC_MAX_CONCURRENT_STREAMS 32
32
33#define MIN_REFRESH_RANGE_IN_US 10000000
34/* Refresh rate ramp at a fixed rate of 65 Hz/second */
35#define STATIC_SCREEN_RAMP_DELTA_REFRESH_RATE_PER_FRAME ((1000 / 60) * 65)
36/* Number of elements in the render times cache array */
37#define RENDER_TIMES_MAX_COUNT 10
38/* Threshold to exit BTR (to avoid frequent enter-exits at the lower limit) */
39#define BTR_EXIT_MARGIN 2000
40/*Threshold to exit fixed refresh rate*/
41#define FIXED_REFRESH_EXIT_MARGIN_IN_HZ 4
42/* Number of consecutive frames to check before entering/exiting fixed refresh*/
43#define FIXED_REFRESH_ENTER_FRAME_COUNT 5
44#define FIXED_REFRESH_EXIT_FRAME_COUNT 5
45
46struct core_freesync {
47 struct mod_freesync public;
48 struct dc *dc;
49};
50
51#define MOD_FREESYNC_TO_CORE(mod_freesync)\
52 container_of(mod_freesync, struct core_freesync, public)
53
54struct mod_freesync *mod_freesync_create(struct dc *dc)
55{
56 struct core_freesync *core_freesync =
57 kzalloc(sizeof(struct core_freesync), GFP_KERNEL);
58
59 if (core_freesync == NULL)
60 goto fail_alloc_context;
61
62 if (dc == NULL)
63 goto fail_construct;
64
65 core_freesync->dc = dc;
66 return &core_freesync->public;
67
68fail_construct:
69 kfree(core_freesync);
70
71fail_alloc_context:
72 return NULL;
73}
74
75void mod_freesync_destroy(struct mod_freesync *mod_freesync)
76{
77 struct core_freesync *core_freesync = NULL;
78 if (mod_freesync == NULL)
79 return;
80 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync);
81 kfree(core_freesync);
82}
83
84#if 0 /* unused currently */
85static unsigned int calc_refresh_in_uhz_from_duration(
86 unsigned int duration_in_ns)
87{
88 unsigned int refresh_in_uhz =
89 ((unsigned int)(div64_u64((1000000000ULL * 1000000),
90 duration_in_ns)));
91 return refresh_in_uhz;
92}
93#endif
94
95static unsigned int calc_duration_in_us_from_refresh_in_uhz(
96 unsigned int refresh_in_uhz)
97{
98 unsigned int duration_in_us =
99 ((unsigned int)(div64_u64((1000000000ULL * 1000),
100 refresh_in_uhz)));
101 return duration_in_us;
102}
103
104static unsigned int calc_duration_in_us_from_v_total(
105 const struct dc_stream_state *stream,
106 const struct mod_vrr_params *in_vrr,
107 unsigned int v_total)
108{
109 unsigned int duration_in_us =
110 (unsigned int)(div64_u64(((unsigned long long)(v_total)
111 * 1000) * stream->timing.h_total,
112 stream->timing.pix_clk_khz));
113
114 return duration_in_us;
115}
116
117static unsigned int calc_v_total_from_refresh(
118 const struct dc_stream_state *stream,
119 unsigned int refresh_in_uhz)
120{
121 unsigned int v_total = stream->timing.v_total;
122 unsigned int frame_duration_in_ns;
123
124 frame_duration_in_ns =
125 ((unsigned int)(div64_u64((1000000000ULL * 1000000),
126 refresh_in_uhz)));
127
128 v_total = div64_u64(div64_u64(((unsigned long long)(
129 frame_duration_in_ns) * stream->timing.pix_clk_khz),
130 stream->timing.h_total), 1000000);
131
132 /* v_total cannot be less than nominal */
133 if (v_total < stream->timing.v_total) {
134 ASSERT(v_total < stream->timing.v_total);
135 v_total = stream->timing.v_total;
136 }
137
138 return v_total;
139}
140
141static unsigned int calc_v_total_from_duration(
142 const struct dc_stream_state *stream,
143 const struct mod_vrr_params *vrr,
144 unsigned int duration_in_us)
145{
146 unsigned int v_total = 0;
147
148 if (duration_in_us < vrr->min_duration_in_us)
149 duration_in_us = vrr->min_duration_in_us;
150
151 if (duration_in_us > vrr->max_duration_in_us)
152 duration_in_us = vrr->max_duration_in_us;
153
154 v_total = div64_u64(div64_u64(((unsigned long long)(
155 duration_in_us) * stream->timing.pix_clk_khz),
156 stream->timing.h_total), 1000);
157
158 /* v_total cannot be less than nominal */
159 if (v_total < stream->timing.v_total) {
160 ASSERT(v_total < stream->timing.v_total);
161 v_total = stream->timing.v_total;
162 }
163
164 return v_total;
165}
166
167static void update_v_total_for_static_ramp(
168 struct core_freesync *core_freesync,
169 const struct dc_stream_state *stream,
170 struct mod_vrr_params *in_out_vrr)
171{
172 unsigned int v_total = 0;
173 unsigned int current_duration_in_us =
174 calc_duration_in_us_from_v_total(
175 stream, in_out_vrr,
176 in_out_vrr->adjust.v_total_max);
177 unsigned int target_duration_in_us =
178 calc_duration_in_us_from_refresh_in_uhz(
179 in_out_vrr->fixed.target_refresh_in_uhz);
180 bool ramp_direction_is_up = (current_duration_in_us >
181 target_duration_in_us) ? true : false;
182
183 /* Calc ratio between new and current frame duration with 3 digit */
184 unsigned int frame_duration_ratio = div64_u64(1000000,
185 (1000 + div64_u64(((unsigned long long)(
186 STATIC_SCREEN_RAMP_DELTA_REFRESH_RATE_PER_FRAME) *
187 current_duration_in_us),
188 1000000)));
189
190 /* Calculate delta between new and current frame duration in us */
191 unsigned int frame_duration_delta = div64_u64(((unsigned long long)(
192 current_duration_in_us) *
193 (1000 - frame_duration_ratio)), 1000);
194
195 /* Adjust frame duration delta based on ratio between current and
196 * standard frame duration (frame duration at 60 Hz refresh rate).
197 */
198 unsigned int ramp_rate_interpolated = div64_u64(((unsigned long long)(
199 frame_duration_delta) * current_duration_in_us), 16666);
200
201 /* Going to a higher refresh rate (lower frame duration) */
202 if (ramp_direction_is_up) {
203 /* reduce frame duration */
204 current_duration_in_us -= ramp_rate_interpolated;
205
206 /* adjust for frame duration below min */
207 if (current_duration_in_us <= target_duration_in_us) {
208 in_out_vrr->fixed.ramping_active = false;
209 in_out_vrr->fixed.ramping_done = true;
210 current_duration_in_us =
211 calc_duration_in_us_from_refresh_in_uhz(
212 in_out_vrr->fixed.target_refresh_in_uhz);
213 }
214 /* Going to a lower refresh rate (larger frame duration) */
215 } else {
216 /* increase frame duration */
217 current_duration_in_us += ramp_rate_interpolated;
218
219 /* adjust for frame duration above max */
220 if (current_duration_in_us >= target_duration_in_us) {
221 in_out_vrr->fixed.ramping_active = false;
222 in_out_vrr->fixed.ramping_done = true;
223 current_duration_in_us =
224 calc_duration_in_us_from_refresh_in_uhz(
225 in_out_vrr->fixed.target_refresh_in_uhz);
226 }
227 }
228
229 v_total = div64_u64(div64_u64(((unsigned long long)(
230 current_duration_in_us) * stream->timing.pix_clk_khz),
231 stream->timing.h_total), 1000);
232
233 in_out_vrr->adjust.v_total_min = v_total;
234 in_out_vrr->adjust.v_total_max = v_total;
235}
236
237static void apply_below_the_range(struct core_freesync *core_freesync,
238 const struct dc_stream_state *stream,
239 unsigned int last_render_time_in_us,
240 struct mod_vrr_params *in_out_vrr)
241{
242 unsigned int inserted_frame_duration_in_us = 0;
243 unsigned int mid_point_frames_ceil = 0;
244 unsigned int mid_point_frames_floor = 0;
245 unsigned int frame_time_in_us = 0;
246 unsigned int delta_from_mid_point_in_us_1 = 0xFFFFFFFF;
247 unsigned int delta_from_mid_point_in_us_2 = 0xFFFFFFFF;
248 unsigned int frames_to_insert = 0;
249 unsigned int min_frame_duration_in_ns = 0;
250 unsigned int max_render_time_in_us = in_out_vrr->max_duration_in_us;
251
252 min_frame_duration_in_ns = ((unsigned int) (div64_u64(
253 (1000000000ULL * 1000000),
254 in_out_vrr->max_refresh_in_uhz)));
255
256 /* Program BTR */
257 if (last_render_time_in_us + BTR_EXIT_MARGIN < max_render_time_in_us) {
258 /* Exit Below the Range */
259 if (in_out_vrr->btr.btr_active) {
260 in_out_vrr->btr.frame_counter = 0;
261 in_out_vrr->btr.btr_active = false;
262 }
263 } else if (last_render_time_in_us > max_render_time_in_us) {
264 /* Enter Below the Range */
265 in_out_vrr->btr.btr_active = true;
266 }
267
268 /* BTR set to "not active" so disengage */
269 if (!in_out_vrr->btr.btr_active) {
270 in_out_vrr->btr.inserted_duration_in_us = 0;
271 in_out_vrr->btr.frames_to_insert = 0;
272 in_out_vrr->btr.frame_counter = 0;
273
274 /* Restore FreeSync */
275 in_out_vrr->adjust.v_total_min =
276 calc_v_total_from_refresh(stream,
277 in_out_vrr->max_refresh_in_uhz);
278 in_out_vrr->adjust.v_total_max =
279 calc_v_total_from_refresh(stream,
280 in_out_vrr->min_refresh_in_uhz);
281 /* BTR set to "active" so engage */
282 } else {
283
284 /* Calculate number of midPoint frames that could fit within
285 * the render time interval- take ceil of this value
286 */
287 mid_point_frames_ceil = (last_render_time_in_us +
288 in_out_vrr->btr.mid_point_in_us - 1) /
289 in_out_vrr->btr.mid_point_in_us;
290
291 if (mid_point_frames_ceil > 0) {
292 frame_time_in_us = last_render_time_in_us /
293 mid_point_frames_ceil;
294 delta_from_mid_point_in_us_1 =
295 (in_out_vrr->btr.mid_point_in_us >
296 frame_time_in_us) ?
297 (in_out_vrr->btr.mid_point_in_us - frame_time_in_us) :
298 (frame_time_in_us - in_out_vrr->btr.mid_point_in_us);
299 }
300
301 /* Calculate number of midPoint frames that could fit within
302 * the render time interval- take floor of this value
303 */
304 mid_point_frames_floor = last_render_time_in_us /
305 in_out_vrr->btr.mid_point_in_us;
306
307 if (mid_point_frames_floor > 0) {
308
309 frame_time_in_us = last_render_time_in_us /
310 mid_point_frames_floor;
311 delta_from_mid_point_in_us_2 =
312 (in_out_vrr->btr.mid_point_in_us >
313 frame_time_in_us) ?
314 (in_out_vrr->btr.mid_point_in_us - frame_time_in_us) :
315 (frame_time_in_us - in_out_vrr->btr.mid_point_in_us);
316 }
317
318 /* Choose number of frames to insert based on how close it
319 * can get to the mid point of the variable range.
320 */
321 if (delta_from_mid_point_in_us_1 < delta_from_mid_point_in_us_2)
322 frames_to_insert = mid_point_frames_ceil;
323 else
324 frames_to_insert = mid_point_frames_floor;
325
326 /* Either we've calculated the number of frames to insert,
327 * or we need to insert min duration frames
328 */
329 if (frames_to_insert > 0)
330 inserted_frame_duration_in_us = last_render_time_in_us /
331 frames_to_insert;
332
333 if (inserted_frame_duration_in_us <
334 (1000000 / in_out_vrr->max_refresh_in_uhz))
335 inserted_frame_duration_in_us =
336 (1000000 / in_out_vrr->max_refresh_in_uhz);
337
338 /* Cache the calculated variables */
339 in_out_vrr->btr.inserted_duration_in_us =
340 inserted_frame_duration_in_us;
341 in_out_vrr->btr.frames_to_insert = frames_to_insert;
342 in_out_vrr->btr.frame_counter = frames_to_insert;
343 }
344}
345
346static void apply_fixed_refresh(struct core_freesync *core_freesync,
347 const struct dc_stream_state *stream,
348 unsigned int last_render_time_in_us,
349 struct mod_vrr_params *in_out_vrr)
350{
351 bool update = false;
352 unsigned int max_render_time_in_us = in_out_vrr->max_duration_in_us;
353
354 //Compute the exit refresh rate and exit frame duration
355 unsigned int exit_refresh_rate_in_milli_hz = ((1000000000/max_render_time_in_us)
356 + (1000*FIXED_REFRESH_EXIT_MARGIN_IN_HZ));
357 unsigned int exit_frame_duration_in_us = 1000000000/exit_refresh_rate_in_milli_hz;
358
359 if (last_render_time_in_us < exit_frame_duration_in_us) {
360 /* Exit Fixed Refresh mode */
361 if (in_out_vrr->fixed.fixed_active) {
362 in_out_vrr->fixed.frame_counter++;
363
364 if (in_out_vrr->fixed.frame_counter >
365 FIXED_REFRESH_EXIT_FRAME_COUNT) {
366 in_out_vrr->fixed.frame_counter = 0;
367 in_out_vrr->fixed.fixed_active = false;
368 in_out_vrr->fixed.target_refresh_in_uhz = 0;
369 update = true;
370 }
371 }
372 } else if (last_render_time_in_us > max_render_time_in_us) {
373 /* Enter Fixed Refresh mode */
374 if (!in_out_vrr->fixed.fixed_active) {
375 in_out_vrr->fixed.frame_counter++;
376
377 if (in_out_vrr->fixed.frame_counter >
378 FIXED_REFRESH_ENTER_FRAME_COUNT) {
379 in_out_vrr->fixed.frame_counter = 0;
380 in_out_vrr->fixed.fixed_active = true;
381 in_out_vrr->fixed.target_refresh_in_uhz =
382 in_out_vrr->max_refresh_in_uhz;
383 update = true;
384 }
385 }
386 }
387
388 if (update) {
389 if (in_out_vrr->fixed.fixed_active) {
390 in_out_vrr->adjust.v_total_min =
391 calc_v_total_from_refresh(
392 stream, in_out_vrr->max_refresh_in_uhz);
393 in_out_vrr->adjust.v_total_max =
394 in_out_vrr->adjust.v_total_min;
395 } else {
396 in_out_vrr->adjust.v_total_min =
397 calc_v_total_from_refresh(stream,
398 in_out_vrr->max_refresh_in_uhz);
399 in_out_vrr->adjust.v_total_max =
400 calc_v_total_from_refresh(stream,
401 in_out_vrr->min_refresh_in_uhz);
402 }
403 }
404}
405
406static bool vrr_settings_require_update(struct core_freesync *core_freesync,
407 struct mod_freesync_config *in_config,
408 unsigned int min_refresh_in_uhz,
409 unsigned int max_refresh_in_uhz,
410 struct mod_vrr_params *in_vrr)
411{
412 if (in_vrr->state != in_config->state) {
413 return true;
414 } else if (in_vrr->state == VRR_STATE_ACTIVE_FIXED &&
415 in_vrr->fixed.target_refresh_in_uhz !=
416 in_config->min_refresh_in_uhz) {
417 return true;
418 } else if (in_vrr->min_refresh_in_uhz != min_refresh_in_uhz) {
419 return true;
420 } else if (in_vrr->max_refresh_in_uhz != max_refresh_in_uhz) {
421 return true;
422 }
423
424 return false;
425}
426
427bool mod_freesync_get_vmin_vmax(struct mod_freesync *mod_freesync,
428 const struct dc_stream_state *stream,
429 unsigned int *vmin,
430 unsigned int *vmax)
431{
432 *vmin = stream->adjust.v_total_min;
433 *vmax = stream->adjust.v_total_max;
434
435 return true;
436}
437
438bool mod_freesync_get_v_position(struct mod_freesync *mod_freesync,
439 struct dc_stream_state *stream,
440 unsigned int *nom_v_pos,
441 unsigned int *v_pos)
442{
443 struct core_freesync *core_freesync = NULL;
444 struct crtc_position position;
445
446 if (mod_freesync == NULL)
447 return false;
448
449 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync);
450
451 if (dc_stream_get_crtc_position(core_freesync->dc, &stream, 1,
452 &position.vertical_count,
453 &position.nominal_vcount)) {
454
455 *nom_v_pos = position.nominal_vcount;
456 *v_pos = position.vertical_count;
457
458 return true;
459 }
460
461 return false;
462}
463
464static void build_vrr_infopacket_header_v1(enum signal_type signal,
465 struct dc_info_packet *infopacket,
466 unsigned int *payload_size)
467{
468 if (dc_is_hdmi_signal(signal)) {
469
470 /* HEADER */
471
472 /* HB0 = Packet Type = 0x83 (Source Product
473 * Descriptor InfoFrame)
474 */
475 infopacket->hb0 = DC_HDMI_INFOFRAME_TYPE_SPD;
476
477 /* HB1 = Version = 0x01 */
478 infopacket->hb1 = 0x01;
479
480 /* HB2 = [Bits 7:5 = 0] [Bits 4:0 = Length = 0x08] */
481 infopacket->hb2 = 0x08;
482
483 *payload_size = 0x08;
484
485 } else if (dc_is_dp_signal(signal)) {
486
487 /* HEADER */
488
489 /* HB0 = Secondary-data Packet ID = 0 - Only non-zero
490 * when used to associate audio related info packets
491 */
492 infopacket->hb0 = 0x00;
493
494 /* HB1 = Packet Type = 0x83 (Source Product
495 * Descriptor InfoFrame)
496 */
497 infopacket->hb1 = DC_HDMI_INFOFRAME_TYPE_SPD;
498
499 /* HB2 = [Bits 7:0 = Least significant eight bits -
500 * For INFOFRAME, the value must be 1Bh]
501 */
502 infopacket->hb2 = 0x1B;
503
504 /* HB3 = [Bits 7:2 = INFOFRAME SDP Version Number = 0x1]
505 * [Bits 1:0 = Most significant two bits = 0x00]
506 */
507 infopacket->hb3 = 0x04;
508
509 *payload_size = 0x1B;
510 }
511}
512
513static void build_vrr_infopacket_header_v2(enum signal_type signal,
514 struct dc_info_packet *infopacket,
515 unsigned int *payload_size)
516{
517 if (dc_is_hdmi_signal(signal)) {
518
519 /* HEADER */
520
521 /* HB0 = Packet Type = 0x83 (Source Product
522 * Descriptor InfoFrame)
523 */
524 infopacket->hb0 = DC_HDMI_INFOFRAME_TYPE_SPD;
525
526 /* HB1 = Version = 0x02 */
527 infopacket->hb1 = 0x02;
528
529 /* HB2 = [Bits 7:5 = 0] [Bits 4:0 = Length = 0x09] */
530 infopacket->hb2 = 0x09;
531
532 *payload_size = 0x0A;
533
534 } else if (dc_is_dp_signal(signal)) {
535
536 /* HEADER */
537
538 /* HB0 = Secondary-data Packet ID = 0 - Only non-zero
539 * when used to associate audio related info packets
540 */
541 infopacket->hb0 = 0x00;
542
543 /* HB1 = Packet Type = 0x83 (Source Product
544 * Descriptor InfoFrame)
545 */
546 infopacket->hb1 = DC_HDMI_INFOFRAME_TYPE_SPD;
547
548 /* HB2 = [Bits 7:0 = Least significant eight bits -
549 * For INFOFRAME, the value must be 1Bh]
550 */
551 infopacket->hb2 = 0x1B;
552
553 /* HB3 = [Bits 7:2 = INFOFRAME SDP Version Number = 0x2]
554 * [Bits 1:0 = Most significant two bits = 0x00]
555 */
556 infopacket->hb3 = 0x08;
557
558 *payload_size = 0x1B;
559 }
560}
561
562static void build_vrr_infopacket_data(const struct mod_vrr_params *vrr,
563 struct dc_info_packet *infopacket)
564{
565 /* PB1 = 0x1A (24bit AMD IEEE OUI (0x00001A) - Byte 0) */
566 infopacket->sb[1] = 0x1A;
567
568 /* PB2 = 0x00 (24bit AMD IEEE OUI (0x00001A) - Byte 1) */
569 infopacket->sb[2] = 0x00;
570
571 /* PB3 = 0x00 (24bit AMD IEEE OUI (0x00001A) - Byte 2) */
572 infopacket->sb[3] = 0x00;
573
574 /* PB4 = Reserved */
575
576 /* PB5 = Reserved */
577
578 /* PB6 = [Bits 7:3 = Reserved] */
579
580 /* PB6 = [Bit 0 = FreeSync Supported] */
581 if (vrr->state != VRR_STATE_UNSUPPORTED)
582 infopacket->sb[6] |= 0x01;
583
584 /* PB6 = [Bit 1 = FreeSync Enabled] */
585 if (vrr->state != VRR_STATE_DISABLED &&
586 vrr->state != VRR_STATE_UNSUPPORTED)
587 infopacket->sb[6] |= 0x02;
588
589 /* PB6 = [Bit 2 = FreeSync Active] */
590 if (vrr->state == VRR_STATE_ACTIVE_VARIABLE ||
591 vrr->state == VRR_STATE_ACTIVE_FIXED)
592 infopacket->sb[6] |= 0x04;
593
594 /* PB7 = FreeSync Minimum refresh rate (Hz) */
595 infopacket->sb[7] = (unsigned char)(vrr->min_refresh_in_uhz / 1000000);
596
597 /* PB8 = FreeSync Maximum refresh rate (Hz)
598 * Note: We should never go above the field rate of the mode timing set.
599 */
600 infopacket->sb[8] = (unsigned char)(vrr->max_refresh_in_uhz / 1000000);
601
602
603 //FreeSync HDR
604 infopacket->sb[9] = 0;
605 infopacket->sb[10] = 0;
606}
607
608static void build_vrr_infopacket_fs2_data(enum color_transfer_func app_tf,
609 struct dc_info_packet *infopacket)
610{
611 if (app_tf != TRANSFER_FUNC_UNKNOWN) {
612 infopacket->valid = true;
613
614 infopacket->sb[6] |= 0x08; // PB6 = [Bit 3 = Native Color Active]
615
616 if (app_tf == TRANSFER_FUNC_GAMMA_22) {
617 infopacket->sb[9] |= 0x04; // PB6 = [Bit 2 = Gamma 2.2 EOTF Active]
618 }
619 }
620}
621
622static void build_vrr_infopacket_checksum(unsigned int *payload_size,
623 struct dc_info_packet *infopacket)
624{
625 /* Calculate checksum */
626 unsigned int idx = 0;
627 unsigned char checksum = 0;
628
629 checksum += infopacket->hb0;
630 checksum += infopacket->hb1;
631 checksum += infopacket->hb2;
632 checksum += infopacket->hb3;
633
634 for (idx = 1; idx <= *payload_size; idx++)
635 checksum += infopacket->sb[idx];
636
637 /* PB0 = Checksum (one byte complement) */
638 infopacket->sb[0] = (unsigned char)(0x100 - checksum);
639
640 infopacket->valid = true;
641}
642
643static void build_vrr_infopacket_v1(enum signal_type signal,
644 const struct mod_vrr_params *vrr,
645 struct dc_info_packet *infopacket)
646{
647 /* SPD info packet for FreeSync */
648 unsigned int payload_size = 0;
649
650 build_vrr_infopacket_header_v1(signal, infopacket, &payload_size);
651 build_vrr_infopacket_data(vrr, infopacket);
652 build_vrr_infopacket_checksum(&payload_size, infopacket);
653
654 infopacket->valid = true;
655}
656
657static void build_vrr_infopacket_v2(enum signal_type signal,
658 const struct mod_vrr_params *vrr,
659 const enum color_transfer_func *app_tf,
660 struct dc_info_packet *infopacket)
661{
662 unsigned int payload_size = 0;
663
664 build_vrr_infopacket_header_v2(signal, infopacket, &payload_size);
665 build_vrr_infopacket_data(vrr, infopacket);
666
667 if (app_tf != NULL)
668 build_vrr_infopacket_fs2_data(*app_tf, infopacket);
669
670 build_vrr_infopacket_checksum(&payload_size, infopacket);
671
672 infopacket->valid = true;
673}
674
675void mod_freesync_build_vrr_infopacket(struct mod_freesync *mod_freesync,
676 const struct dc_stream_state *stream,
677 const struct mod_vrr_params *vrr,
678 enum vrr_packet_type packet_type,
679 const enum color_transfer_func *app_tf,
680 struct dc_info_packet *infopacket)
681{
682 /* SPD info packet for FreeSync */
683
684 /* Check if Freesync is supported. Return if false. If true,
685 * set the corresponding bit in the info packet
686 */
687 if (!vrr->supported || !vrr->send_vsif)
688 return;
689
690 switch (packet_type) {
691 case PACKET_TYPE_FS2:
692 build_vrr_infopacket_v2(stream->signal, vrr, app_tf, infopacket);
693 break;
694 case PACKET_TYPE_VRR:
695 case PACKET_TYPE_FS1:
696 default:
697 build_vrr_infopacket_v1(stream->signal, vrr, infopacket);
698 }
699}
700
701void mod_freesync_build_vrr_params(struct mod_freesync *mod_freesync,
702 const struct dc_stream_state *stream,
703 struct mod_freesync_config *in_config,
704 struct mod_vrr_params *in_out_vrr)
705{
706 struct core_freesync *core_freesync = NULL;
707 unsigned long long nominal_field_rate_in_uhz = 0;
708 unsigned int refresh_range = 0;
709 unsigned int min_refresh_in_uhz = 0;
710 unsigned int max_refresh_in_uhz = 0;
711
712 if (mod_freesync == NULL)
713 return;
714
715 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync);
716
717 /* Calculate nominal field rate for stream */
718 nominal_field_rate_in_uhz =
719 mod_freesync_calc_nominal_field_rate(stream);
720
721 min_refresh_in_uhz = in_config->min_refresh_in_uhz;
722 max_refresh_in_uhz = in_config->max_refresh_in_uhz;
723
724 // Don't allow min > max
725 if (min_refresh_in_uhz > max_refresh_in_uhz)
726 min_refresh_in_uhz = max_refresh_in_uhz;
727
728 // Full range may be larger than current video timing, so cap at nominal
729 if (max_refresh_in_uhz > nominal_field_rate_in_uhz)
730 max_refresh_in_uhz = nominal_field_rate_in_uhz;
731
732 // Full range may be larger than current video timing, so cap at nominal
733 if (min_refresh_in_uhz > nominal_field_rate_in_uhz)
734 min_refresh_in_uhz = nominal_field_rate_in_uhz;
735
736 if (!vrr_settings_require_update(core_freesync,
737 in_config, min_refresh_in_uhz, max_refresh_in_uhz,
738 in_out_vrr))
739 return;
740
741 in_out_vrr->state = in_config->state;
742 in_out_vrr->send_vsif = in_config->vsif_supported;
743
744 if (in_config->state == VRR_STATE_UNSUPPORTED) {
745 in_out_vrr->state = VRR_STATE_UNSUPPORTED;
746 in_out_vrr->supported = false;
747 in_out_vrr->adjust.v_total_min = stream->timing.v_total;
748 in_out_vrr->adjust.v_total_max = stream->timing.v_total;
749
750 return;
751
752 } else {
753 in_out_vrr->min_refresh_in_uhz = min_refresh_in_uhz;
754 in_out_vrr->max_duration_in_us =
755 calc_duration_in_us_from_refresh_in_uhz(
756 min_refresh_in_uhz);
757
758 in_out_vrr->max_refresh_in_uhz = max_refresh_in_uhz;
759 in_out_vrr->min_duration_in_us =
760 calc_duration_in_us_from_refresh_in_uhz(
761 max_refresh_in_uhz);
762
763 refresh_range = in_out_vrr->max_refresh_in_uhz -
764 in_out_vrr->min_refresh_in_uhz;
765
766 in_out_vrr->supported = true;
767 }
768
769 in_out_vrr->fixed.ramping_active = in_config->ramping;
770
771 in_out_vrr->btr.btr_enabled = in_config->btr;
772 if (in_out_vrr->max_refresh_in_uhz <
773 2 * in_out_vrr->min_refresh_in_uhz)
774 in_out_vrr->btr.btr_enabled = false;
775 in_out_vrr->btr.btr_active = false;
776 in_out_vrr->btr.inserted_duration_in_us = 0;
777 in_out_vrr->btr.frames_to_insert = 0;
778 in_out_vrr->btr.frame_counter = 0;
779 in_out_vrr->btr.mid_point_in_us =
780 in_out_vrr->min_duration_in_us +
781 (in_out_vrr->max_duration_in_us -
782 in_out_vrr->min_duration_in_us) / 2;
783
784 if (in_out_vrr->state == VRR_STATE_UNSUPPORTED) {
785 in_out_vrr->adjust.v_total_min = stream->timing.v_total;
786 in_out_vrr->adjust.v_total_max = stream->timing.v_total;
787 } else if (in_out_vrr->state == VRR_STATE_DISABLED) {
788 in_out_vrr->adjust.v_total_min = stream->timing.v_total;
789 in_out_vrr->adjust.v_total_max = stream->timing.v_total;
790 } else if (in_out_vrr->state == VRR_STATE_INACTIVE) {
791 in_out_vrr->adjust.v_total_min = stream->timing.v_total;
792 in_out_vrr->adjust.v_total_max = stream->timing.v_total;
793 } else if (in_out_vrr->state == VRR_STATE_ACTIVE_VARIABLE &&
794 refresh_range >= MIN_REFRESH_RANGE_IN_US) {
795 in_out_vrr->adjust.v_total_min =
796 calc_v_total_from_refresh(stream,
797 in_out_vrr->max_refresh_in_uhz);
798 in_out_vrr->adjust.v_total_max =
799 calc_v_total_from_refresh(stream,
800 in_out_vrr->min_refresh_in_uhz);
801 } else if (in_out_vrr->state == VRR_STATE_ACTIVE_FIXED) {
802 in_out_vrr->fixed.target_refresh_in_uhz =
803 in_out_vrr->min_refresh_in_uhz;
804 if (in_out_vrr->fixed.ramping_active &&
805 in_out_vrr->fixed.fixed_active) {
806 /* Do not update vtotals if ramping is already active
807 * in order to continue ramp from current refresh.
808 */
809 in_out_vrr->fixed.fixed_active = true;
810 } else {
811 in_out_vrr->fixed.fixed_active = true;
812 in_out_vrr->adjust.v_total_min =
813 calc_v_total_from_refresh(stream,
814 in_out_vrr->fixed.target_refresh_in_uhz);
815 in_out_vrr->adjust.v_total_max =
816 in_out_vrr->adjust.v_total_min;
817 }
818 } else {
819 in_out_vrr->state = VRR_STATE_INACTIVE;
820 in_out_vrr->adjust.v_total_min = stream->timing.v_total;
821 in_out_vrr->adjust.v_total_max = stream->timing.v_total;
822 }
823}
824
825void mod_freesync_handle_preflip(struct mod_freesync *mod_freesync,
826 const struct dc_plane_state *plane,
827 const struct dc_stream_state *stream,
828 unsigned int curr_time_stamp_in_us,
829 struct mod_vrr_params *in_out_vrr)
830{
831 struct core_freesync *core_freesync = NULL;
832 unsigned int last_render_time_in_us = 0;
833 unsigned int average_render_time_in_us = 0;
834
835 if (mod_freesync == NULL)
836 return;
837
838 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync);
839
840 if (in_out_vrr->supported &&
841 in_out_vrr->state == VRR_STATE_ACTIVE_VARIABLE) {
842 unsigned int i = 0;
843 unsigned int oldest_index = plane->time.index + 1;
844
845 if (oldest_index >= DC_PLANE_UPDATE_TIMES_MAX)
846 oldest_index = 0;
847
848 last_render_time_in_us = curr_time_stamp_in_us -
849 plane->time.prev_update_time_in_us;
850
851 // Sum off all entries except oldest one
852 for (i = 0; i < DC_PLANE_UPDATE_TIMES_MAX; i++) {
853 average_render_time_in_us +=
854 plane->time.time_elapsed_in_us[i];
855 }
856 average_render_time_in_us -=
857 plane->time.time_elapsed_in_us[oldest_index];
858
859 // Add render time for current flip
860 average_render_time_in_us += last_render_time_in_us;
861 average_render_time_in_us /= DC_PLANE_UPDATE_TIMES_MAX;
862
863 if (in_out_vrr->btr.btr_enabled) {
864 apply_below_the_range(core_freesync,
865 stream,
866 last_render_time_in_us,
867 in_out_vrr);
868 } else {
869 apply_fixed_refresh(core_freesync,
870 stream,
871 last_render_time_in_us,
872 in_out_vrr);
873 }
874
875 }
876}
877
878void mod_freesync_handle_v_update(struct mod_freesync *mod_freesync,
879 const struct dc_stream_state *stream,
880 struct mod_vrr_params *in_out_vrr)
881{
882 struct core_freesync *core_freesync = NULL;
883
884 if ((mod_freesync == NULL) || (stream == NULL) || (in_out_vrr == NULL))
885 return;
886
887 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync);
888
889 if (in_out_vrr->supported == false)
890 return;
891
892 /* Below the Range Logic */
893
894 /* Only execute if in fullscreen mode */
895 if (in_out_vrr->state == VRR_STATE_ACTIVE_VARIABLE &&
896 in_out_vrr->btr.btr_active) {
897 /* TODO: pass in flag for Pre-DCE12 ASIC
898 * in order for frame variable duration to take affect,
899 * it needs to be done one VSYNC early, which is at
900 * frameCounter == 1.
901 * For DCE12 and newer updates to V_TOTAL_MIN/MAX
902 * will take affect on current frame
903 */
904 if (in_out_vrr->btr.frames_to_insert ==
905 in_out_vrr->btr.frame_counter) {
906 in_out_vrr->adjust.v_total_min =
907 calc_v_total_from_duration(stream,
908 in_out_vrr,
909 in_out_vrr->btr.inserted_duration_in_us);
910 in_out_vrr->adjust.v_total_max =
911 in_out_vrr->adjust.v_total_min;
912 }
913
914 if (in_out_vrr->btr.frame_counter > 0)
915 in_out_vrr->btr.frame_counter--;
916
917 /* Restore FreeSync */
918 if (in_out_vrr->btr.frame_counter == 0) {
919 in_out_vrr->adjust.v_total_min =
920 calc_v_total_from_refresh(stream,
921 in_out_vrr->max_refresh_in_uhz);
922 in_out_vrr->adjust.v_total_max =
923 calc_v_total_from_refresh(stream,
924 in_out_vrr->min_refresh_in_uhz);
925 }
926 }
927
928 /* If in fullscreen freesync mode or in video, do not program
929 * static screen ramp values
930 */
931 if (in_out_vrr->state == VRR_STATE_ACTIVE_VARIABLE)
932 in_out_vrr->fixed.ramping_active = false;
933
934 /* Gradual Static Screen Ramping Logic */
935 /* Execute if ramp is active and user enabled freesync static screen*/
936 if (in_out_vrr->state == VRR_STATE_ACTIVE_FIXED &&
937 in_out_vrr->fixed.ramping_active) {
938 update_v_total_for_static_ramp(
939 core_freesync, stream, in_out_vrr);
940 }
941}
942
943void mod_freesync_get_settings(struct mod_freesync *mod_freesync,
944 const struct mod_vrr_params *vrr,
945 unsigned int *v_total_min, unsigned int *v_total_max,
946 unsigned int *event_triggers,
947 unsigned int *window_min, unsigned int *window_max,
948 unsigned int *lfc_mid_point_in_us,
949 unsigned int *inserted_frames,
950 unsigned int *inserted_duration_in_us)
951{
952 struct core_freesync *core_freesync = NULL;
953
954 if (mod_freesync == NULL)
955 return;
956
957 core_freesync = MOD_FREESYNC_TO_CORE(mod_freesync);
958
959 if (vrr->supported) {
960 *v_total_min = vrr->adjust.v_total_min;
961 *v_total_max = vrr->adjust.v_total_max;
962 *event_triggers = 0;
963 *lfc_mid_point_in_us = vrr->btr.mid_point_in_us;
964 *inserted_frames = vrr->btr.frames_to_insert;
965 *inserted_duration_in_us = vrr->btr.inserted_duration_in_us;
966 }
967}
968
969unsigned long long mod_freesync_calc_nominal_field_rate(
970 const struct dc_stream_state *stream)
971{
972 unsigned long long nominal_field_rate_in_uhz = 0;
973
974 /* Calculate nominal field rate for stream */
975 nominal_field_rate_in_uhz = stream->timing.pix_clk_khz;
976 nominal_field_rate_in_uhz *= 1000ULL * 1000ULL * 1000ULL;
977 nominal_field_rate_in_uhz = div_u64(nominal_field_rate_in_uhz,
978 stream->timing.h_total);
979 nominal_field_rate_in_uhz = div_u64(nominal_field_rate_in_uhz,
980 stream->timing.v_total);
981
982 return nominal_field_rate_in_uhz;
983}
984
985bool mod_freesync_is_valid_range(struct mod_freesync *mod_freesync,
986 const struct dc_stream_state *stream,
987 uint32_t min_refresh_cap_in_uhz,
988 uint32_t max_refresh_cap_in_uhz,
989 uint32_t min_refresh_request_in_uhz,
990 uint32_t max_refresh_request_in_uhz)
991{
992 /* Calculate nominal field rate for stream */
993 unsigned long long nominal_field_rate_in_uhz =
994 mod_freesync_calc_nominal_field_rate(stream);
995
996 /* Typically nominal refresh calculated can have some fractional part.
997 * Allow for some rounding error of actual video timing by taking floor
998 * of caps and request. Round the nominal refresh rate.
999 *
1000 * Dividing will convert everything to units in Hz although input
1001 * variable name is in uHz!
1002 *
1003 * Also note, this takes care of rounding error on the nominal refresh
1004 * so by rounding error we only expect it to be off by a small amount,
1005 * such as < 0.1 Hz. i.e. 143.9xxx or 144.1xxx.
1006 *
1007 * Example 1. Caps Min = 40 Hz, Max = 144 Hz
1008 * Request Min = 40 Hz, Max = 144 Hz
1009 * Nominal = 143.5x Hz rounded to 144 Hz
1010 * This function should allow this as valid request
1011 *
1012 * Example 2. Caps Min = 40 Hz, Max = 144 Hz
1013 * Request Min = 40 Hz, Max = 144 Hz
1014 * Nominal = 144.4x Hz rounded to 144 Hz
1015 * This function should allow this as valid request
1016 *
1017 * Example 3. Caps Min = 40 Hz, Max = 144 Hz
1018 * Request Min = 40 Hz, Max = 144 Hz
1019 * Nominal = 120.xx Hz rounded to 120 Hz
1020 * This function should return NOT valid since the requested
1021 * max is greater than current timing's nominal
1022 *
1023 * Example 4. Caps Min = 40 Hz, Max = 120 Hz
1024 * Request Min = 40 Hz, Max = 120 Hz
1025 * Nominal = 144.xx Hz rounded to 144 Hz
1026 * This function should return NOT valid since the nominal
1027 * is greater than the capability's max refresh
1028 */
1029 nominal_field_rate_in_uhz =
1030 div_u64(nominal_field_rate_in_uhz + 500000, 1000000);
1031 min_refresh_cap_in_uhz /= 1000000;
1032 max_refresh_cap_in_uhz /= 1000000;
1033 min_refresh_request_in_uhz /= 1000000;
1034 max_refresh_request_in_uhz /= 1000000;
1035
1036 // Check nominal is within range
1037 if (nominal_field_rate_in_uhz > max_refresh_cap_in_uhz ||
1038 nominal_field_rate_in_uhz < min_refresh_cap_in_uhz)
1039 return false;
1040
1041 // If nominal is less than max, limit the max allowed refresh rate
1042 if (nominal_field_rate_in_uhz < max_refresh_cap_in_uhz)
1043 max_refresh_cap_in_uhz = nominal_field_rate_in_uhz;
1044
1045 // Don't allow min > max
1046 if (min_refresh_request_in_uhz > max_refresh_request_in_uhz)
1047 return false;
1048
1049 // Check min is within range
1050 if (min_refresh_request_in_uhz > max_refresh_cap_in_uhz ||
1051 min_refresh_request_in_uhz < min_refresh_cap_in_uhz)
1052 return false;
1053
1054 // Check max is within range
1055 if (max_refresh_request_in_uhz > max_refresh_cap_in_uhz ||
1056 max_refresh_request_in_uhz < min_refresh_cap_in_uhz)
1057 return false;
1058
1059 // For variable range, check for at least 10 Hz range
1060 if ((max_refresh_request_in_uhz != min_refresh_request_in_uhz) &&
1061 (max_refresh_request_in_uhz - min_refresh_request_in_uhz < 10))
1062 return false;
1063
1064 return true;
1065}
1066