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1/*
2 * linux/arch/unicore32/include/asm/cacheflush.h
3 *
4 * Code specific to PKUnity SoC and UniCore ISA
5 *
6 * Copyright (C) 2001-2010 GUAN Xue-tao
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12#ifndef __UNICORE_CACHEFLUSH_H__
13#define __UNICORE_CACHEFLUSH_H__
14
15#include <linux/mm.h>
16
17#include <asm/shmparam.h>
18
19#define CACHE_COLOUR(vaddr) ((vaddr & (SHMLBA - 1)) >> PAGE_SHIFT)
20
21/*
22 * This flag is used to indicate that the page pointed to by a pte is clean
23 * and does not require cleaning before returning it to the user.
24 */
25#define PG_dcache_clean PG_arch_1
26
27/*
28 * MM Cache Management
29 * ===================
30 *
31 * The arch/unicore32/mm/cache.S files implement these methods.
32 *
33 * Start addresses are inclusive and end addresses are exclusive;
34 * start addresses should be rounded down, end addresses up.
35 *
36 * See Documentation/core-api/cachetlb.rst for more information.
37 * Please note that the implementation of these, and the required
38 * effects are cache-type (VIVT/VIPT/PIPT) specific.
39 *
40 * flush_icache_all()
41 *
42 * Unconditionally clean and invalidate the entire icache.
43 * Currently only needed for cache-v6.S and cache-v7.S, see
44 * __flush_icache_all for the generic implementation.
45 *
46 * flush_kern_all()
47 *
48 * Unconditionally clean and invalidate the entire cache.
49 *
50 * flush_user_all()
51 *
52 * Clean and invalidate all user space cache entries
53 * before a change of page tables.
54 *
55 * flush_user_range(start, end, flags)
56 *
57 * Clean and invalidate a range of cache entries in the
58 * specified address space before a change of page tables.
59 * - start - user start address (inclusive, page aligned)
60 * - end - user end address (exclusive, page aligned)
61 * - flags - vma->vm_flags field
62 *
63 * coherent_kern_range(start, end)
64 *
65 * Ensure coherency between the Icache and the Dcache in the
66 * region described by start, end. If you have non-snooping
67 * Harvard caches, you need to implement this function.
68 * - start - virtual start address
69 * - end - virtual end address
70 *
71 * coherent_user_range(start, end)
72 *
73 * Ensure coherency between the Icache and the Dcache in the
74 * region described by start, end. If you have non-snooping
75 * Harvard caches, you need to implement this function.
76 * - start - virtual start address
77 * - end - virtual end address
78 *
79 * flush_kern_dcache_area(kaddr, size)
80 *
81 * Ensure that the data held in page is written back.
82 * - kaddr - page address
83 * - size - region size
84 *
85 * DMA Cache Coherency
86 * ===================
87 *
88 * dma_flush_range(start, end)
89 *
90 * Clean and invalidate the specified virtual address range.
91 * - start - virtual start address
92 * - end - virtual end address
93 */
94
95extern void __cpuc_flush_icache_all(void);
96extern void __cpuc_flush_kern_all(void);
97extern void __cpuc_flush_user_all(void);
98extern void __cpuc_flush_user_range(unsigned long, unsigned long, unsigned int);
99extern void __cpuc_coherent_kern_range(unsigned long, unsigned long);
100extern void __cpuc_coherent_user_range(unsigned long, unsigned long);
101extern void __cpuc_flush_dcache_area(void *, size_t);
102extern void __cpuc_flush_kern_dcache_area(void *addr, size_t size);
103
104/*
105 * Copy user data from/to a page which is mapped into a different
106 * processes address space. Really, we want to allow our "user
107 * space" model to handle this.
108 */
109extern void copy_to_user_page(struct vm_area_struct *, struct page *,
110 unsigned long, void *, const void *, unsigned long);
111#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
112 do { \
113 memcpy(dst, src, len); \
114 } while (0)
115
116/*
117 * Convert calls to our calling convention.
118 */
119/* Invalidate I-cache */
120static inline void __flush_icache_all(void)
121{
122 asm("movc p0.c5, %0, #20;\n"
123 "nop; nop; nop; nop; nop; nop; nop; nop\n"
124 :
125 : "r" (0));
126}
127
128#define flush_cache_all() __cpuc_flush_kern_all()
129
130extern void flush_cache_mm(struct mm_struct *mm);
131extern void flush_cache_range(struct vm_area_struct *vma,
132 unsigned long start, unsigned long end);
133extern void flush_cache_page(struct vm_area_struct *vma,
134 unsigned long user_addr, unsigned long pfn);
135
136#define flush_cache_dup_mm(mm) flush_cache_mm(mm)
137
138/*
139 * flush_cache_user_range is used when we want to ensure that the
140 * Harvard caches are synchronised for the user space address range.
141 * This is used for the UniCore private sys_cacheflush system call.
142 */
143#define flush_cache_user_range(vma, start, end) \
144 __cpuc_coherent_user_range((start) & PAGE_MASK, PAGE_ALIGN(end))
145
146/*
147 * Perform necessary cache operations to ensure that data previously
148 * stored within this range of addresses can be executed by the CPU.
149 */
150#define flush_icache_range(s, e) __cpuc_coherent_kern_range(s, e)
151
152/*
153 * Perform necessary cache operations to ensure that the TLB will
154 * see data written in the specified area.
155 */
156#define clean_dcache_area(start, size) cpu_dcache_clean_area(start, size)
157
158/*
159 * flush_dcache_page is used when the kernel has written to the page
160 * cache page at virtual address page->virtual.
161 *
162 * If this page isn't mapped (ie, page_mapping == NULL), or it might
163 * have userspace mappings, then we _must_ always clean + invalidate
164 * the dcache entries associated with the kernel mapping.
165 *
166 * Otherwise we can defer the operation, and clean the cache when we are
167 * about to change to user space. This is the same method as used on SPARC64.
168 * See update_mmu_cache for the user space part.
169 */
170#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
171extern void flush_dcache_page(struct page *);
172
173#define flush_dcache_mmap_lock(mapping) do { } while (0)
174#define flush_dcache_mmap_unlock(mapping) do { } while (0)
175
176#define flush_icache_user_range(vma, page, addr, len) \
177 flush_dcache_page(page)
178
179/*
180 * We don't appear to need to do anything here. In fact, if we did, we'd
181 * duplicate cache flushing elsewhere performed by flush_dcache_page().
182 */
183#define flush_icache_page(vma, page) do { } while (0)
184
185/*
186 * flush_cache_vmap() is used when creating mappings (eg, via vmap,
187 * vmalloc, ioremap etc) in kernel space for pages. On non-VIPT
188 * caches, since the direct-mappings of these pages may contain cached
189 * data, we need to do a full cache flush to ensure that writebacks
190 * don't corrupt data placed into these pages via the new mappings.
191 */
192static inline void flush_cache_vmap(unsigned long start, unsigned long end)
193{
194}
195
196static inline void flush_cache_vunmap(unsigned long start, unsigned long end)
197{
198}
199
200#endif