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1* Renesas R-Car generation 2 USB PHY
2
3This file provides information on what the device node for the R-Car generation
42 USB PHY contains.
5
6Required properties:
7- compatible: "renesas,usb-phy-r8a7743" if the device is a part of R8A7743 SoC.
8 "renesas,usb-phy-r8a7744" if the device is a part of R8A7744 SoC.
9 "renesas,usb-phy-r8a7745" if the device is a part of R8A7745 SoC.
10 "renesas,usb-phy-r8a7790" if the device is a part of R8A7790 SoC.
11 "renesas,usb-phy-r8a7791" if the device is a part of R8A7791 SoC.
12 "renesas,usb-phy-r8a7794" if the device is a part of R8A7794 SoC.
13 "renesas,rcar-gen2-usb-phy" for a generic R-Car Gen2 or
14 RZ/G1 compatible device.
15
16 When compatible with the generic version, nodes must list the
17 SoC-specific version corresponding to the platform first
18 followed by the generic version.
19
20- reg: offset and length of the register block.
21- #address-cells: number of address cells for the USB channel subnodes, must
22 be <1>.
23- #size-cells: number of size cells for the USB channel subnodes, must be <0>.
24- clocks: clock phandle and specifier pair.
25- clock-names: string, clock input name, must be "usbhs".
26
27The USB PHY device tree node should have the subnodes corresponding to the USB
28channels. These subnodes must contain the following properties:
29- reg: the USB controller selector; see the table below for the values.
30- #phy-cells: see phy-bindings.txt in the same directory, must be <1>.
31
32The phandle's argument in the PHY specifier is the USB controller selector for
33the USB channel; see the selector meanings below:
34
35+-----------+---------------+---------------+
36|\ Selector | | |
37+ --------- + 0 | 1 |
38| Channel \| | |
39+-----------+---------------+---------------+
40| 0 | PCI EHCI/OHCI | HS-USB |
41| 2 | PCI EHCI/OHCI | xHCI |
42+-----------+---------------+---------------+
43
44Example (Lager board):
45
46 usb-phy@e6590100 {
47 compatible = "renesas,usb-phy-r8a7790", "renesas,rcar-gen2-usb-phy";
48 reg = <0 0xe6590100 0 0x100>;
49 #address-cells = <1>;
50 #size-cells = <0>;
51 clocks = <&mstp7_clks R8A7790_CLK_HSUSB>;
52 clock-names = "usbhs";
53
54 usb-channel@0 {
55 reg = <0>;
56 #phy-cells = <1>;
57 };
58 usb-channel@2 {
59 reg = <2>;
60 #phy-cells = <1>;
61 };
62 };