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1Qualcomm PMIC GPIO block 2 3This binding describes the GPIO block(s) found in the 8xxx series of 4PMIC's from Qualcomm. 5 6- compatible: 7 Usage: required 8 Value type: <string> 9 Definition: must be one of: 10 "qcom,pm8005-gpio" 11 "qcom,pm8018-gpio" 12 "qcom,pm8038-gpio" 13 "qcom,pm8058-gpio" 14 "qcom,pm8916-gpio" 15 "qcom,pm8917-gpio" 16 "qcom,pm8921-gpio" 17 "qcom,pm8941-gpio" 18 "qcom,pm8994-gpio" 19 "qcom,pm8998-gpio" 20 "qcom,pma8084-gpio" 21 "qcom,pmi8994-gpio" 22 "qcom,pms405-gpio" 23 24 And must contain either "qcom,spmi-gpio" or "qcom,ssbi-gpio" 25 if the device is on an spmi bus or an ssbi bus respectively 26 27- reg: 28 Usage: required 29 Value type: <prop-encoded-array> 30 Definition: Register base of the GPIO block and length. 31 32- interrupts: 33 Usage: required 34 Value type: <prop-encoded-array> 35 Definition: Must contain an array of encoded interrupt specifiers for 36 each available GPIO 37 38- gpio-controller: 39 Usage: required 40 Value type: <none> 41 Definition: Mark the device node as a GPIO controller 42 43- #gpio-cells: 44 Usage: required 45 Value type: <u32> 46 Definition: Must be 2; 47 the first cell will be used to define gpio number and the 48 second denotes the flags for this gpio 49 50Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for 51a general description of GPIO and interrupt bindings. 52 53Please refer to pinctrl-bindings.txt in this directory for details of the 54common pinctrl bindings used by client devices, including the meaning of the 55phrase "pin configuration node". 56 57The pin configuration nodes act as a container for an arbitrary number of 58subnodes. Each of these subnodes represents some desired configuration for a 59pin or a list of pins. This configuration can include the 60mux function to select on those pin(s), and various pin configuration 61parameters, as listed below. 62 63 64SUBNODES: 65 66The name of each subnode is not important; all subnodes should be enumerated 67and processed purely based on their content. 68 69Each subnode only affects those parameters that are explicitly listed. In 70other words, a subnode that lists a mux function but no pin configuration 71parameters implies no information about any pin configuration parameters. 72Similarly, a pin subnode that describes a pullup parameter implies no 73information about e.g. the mux function. 74 75The following generic properties as defined in pinctrl-bindings.txt are valid 76to specify in a pin configuration subnode: 77 78- pins: 79 Usage: required 80 Value type: <string-array> 81 Definition: List of gpio pins affected by the properties specified in 82 this subnode. Valid pins are: 83 gpio1-gpio4 for pm8005 84 gpio1-gpio6 for pm8018 85 gpio1-gpio12 for pm8038 86 gpio1-gpio40 for pm8058 87 gpio1-gpio4 for pm8916 88 gpio1-gpio38 for pm8917 89 gpio1-gpio44 for pm8921 90 gpio1-gpio36 for pm8941 91 gpio1-gpio22 for pm8994 92 gpio1-gpio26 for pm8998 93 gpio1-gpio22 for pma8084 94 gpio1-gpio10 for pmi8994 95 gpio1-gpio12 for pms405 (holes on gpio1, gpio9 and gpio10) 96 97- function: 98 Usage: required 99 Value type: <string> 100 Definition: Specify the alternative function to be configured for the 101 specified pins. Valid values are: 102 "normal", 103 "paired", 104 "func1", 105 "func2", 106 "dtest1", 107 "dtest2", 108 "dtest3", 109 "dtest4", 110 And following values are supported by LV/MV GPIO subtypes: 111 "func3", 112 "func4" 113 114- bias-disable: 115 Usage: optional 116 Value type: <none> 117 Definition: The specified pins should be configured as no pull. 118 119- bias-pull-down: 120 Usage: optional 121 Value type: <none> 122 Definition: The specified pins should be configured as pull down. 123 124- bias-pull-up: 125 Usage: optional 126 Value type: <empty> 127 Definition: The specified pins should be configured as pull up. 128 129- qcom,pull-up-strength: 130 Usage: optional 131 Value type: <u32> 132 Definition: Specifies the strength to use for pull up, if selected. 133 Valid values are; as defined in 134 <dt-bindings/pinctrl/qcom,pmic-gpio.h>: 135 1: 30uA (PMIC_GPIO_PULL_UP_30) 136 2: 1.5uA (PMIC_GPIO_PULL_UP_1P5) 137 3: 31.5uA (PMIC_GPIO_PULL_UP_31P5) 138 4: 1.5uA + 30uA boost (PMIC_GPIO_PULL_UP_1P5_30) 139 If this property is omitted 30uA strength will be used if 140 pull up is selected 141 142- bias-high-impedance: 143 Usage: optional 144 Value type: <none> 145 Definition: The specified pins will put in high-Z mode and disabled. 146 147- input-enable: 148 Usage: optional 149 Value type: <none> 150 Definition: The specified pins are put in input mode. 151 152- output-high: 153 Usage: optional 154 Value type: <none> 155 Definition: The specified pins are configured in output mode, driven 156 high. 157 158- output-low: 159 Usage: optional 160 Value type: <none> 161 Definition: The specified pins are configured in output mode, driven 162 low. 163 164- power-source: 165 Usage: optional 166 Value type: <u32> 167 Definition: Selects the power source for the specified pins. Valid 168 power sources are defined per chip in 169 <dt-bindings/pinctrl/qcom,pmic-gpio.h> 170 171- qcom,drive-strength: 172 Usage: optional 173 Value type: <u32> 174 Definition: Selects the drive strength for the specified pins. Value 175 drive strengths are: 176 0: no (PMIC_GPIO_STRENGTH_NO) 177 1: high (PMIC_GPIO_STRENGTH_HIGH) 0.9mA @ 1.8V - 1.9mA @ 2.6V 178 2: medium (PMIC_GPIO_STRENGTH_MED) 0.6mA @ 1.8V - 1.25mA @ 2.6V 179 3: low (PMIC_GPIO_STRENGTH_LOW) 0.15mA @ 1.8V - 0.3mA @ 2.6V 180 as defined in <dt-bindings/pinctrl/qcom,pmic-gpio.h> 181 182- drive-push-pull: 183 Usage: optional 184 Value type: <none> 185 Definition: The specified pins are configured in push-pull mode. 186 187- drive-open-drain: 188 Usage: optional 189 Value type: <none> 190 Definition: The specified pins are configured in open-drain mode. 191 192- drive-open-source: 193 Usage: optional 194 Value type: <none> 195 Definition: The specified pins are configured in open-source mode. 196 197- qcom,analog-pass: 198 Usage: optional 199 Value type: <none> 200 Definition: The specified pins are configured in analog-pass-through mode. 201 202- qcom,atest: 203 Usage: optional 204 Value type: <u32> 205 Definition: Selects ATEST rail to route to GPIO when it's configured 206 in analog-pass-through mode. 207 Valid values are 1-4 corresponding to ATEST1 to ATEST4. 208 209- qcom,dtest-buffer: 210 Usage: optional 211 Value type: <u32> 212 Definition: Selects DTEST rail to route to GPIO when it's configured 213 as digital input. 214 Valid values are 1-4 corresponding to DTEST1 to DTEST4. 215 216Example: 217 218 pm8921_gpio: gpio@150 { 219 compatible = "qcom,pm8921-gpio", "qcom,ssbi-gpio"; 220 reg = <0x150 0x160>; 221 interrupts = <192 1>, <193 1>, <194 1>, 222 <195 1>, <196 1>, <197 1>, 223 <198 1>, <199 1>, <200 1>, 224 <201 1>, <202 1>, <203 1>, 225 <204 1>, <205 1>, <206 1>, 226 <207 1>, <208 1>, <209 1>, 227 <210 1>, <211 1>, <212 1>, 228 <213 1>, <214 1>, <215 1>, 229 <216 1>, <217 1>, <218 1>, 230 <219 1>, <220 1>, <221 1>, 231 <222 1>, <223 1>, <224 1>, 232 <225 1>, <226 1>, <227 1>, 233 <228 1>, <229 1>, <230 1>, 234 <231 1>, <232 1>, <233 1>, 235 <234 1>, <235 1>; 236 237 gpio-controller; 238 #gpio-cells = <2>; 239 240 pm8921_gpio_keys: gpio-keys { 241 volume-keys { 242 pins = "gpio20", "gpio21"; 243 function = "normal"; 244 245 input-enable; 246 bias-pull-up; 247 drive-push-pull; 248 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>; 249 power-source = <PM8921_GPIO_S4>; 250 }; 251 }; 252 };