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1/*
2 * Copyright 2009 Texas Instruments.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 */
18
19#ifndef __ARCH_ARM_DAVINCI_SPI_H
20#define __ARCH_ARM_DAVINCI_SPI_H
21
22#include <linux/platform_data/edma.h>
23
24#define SPI_INTERN_CS 0xFF
25
26enum {
27 SPI_VERSION_1, /* For DM355/DM365/DM6467 */
28 SPI_VERSION_2, /* For DA8xx */
29};
30
31/**
32 * davinci_spi_platform_data - Platform data for SPI master device on DaVinci
33 *
34 * @version: version of the SPI IP. Different DaVinci devices have slightly
35 * varying versions of the same IP.
36 * @num_chipselect: number of chipselects supported by this SPI master
37 * @intr_line: interrupt line used to connect the SPI IP to the ARM interrupt
38 * controller withn the SoC. Possible values are 0 and 1.
39 * @cshold_bug: set this to true if the SPI controller on your chip requires
40 * a write to CSHOLD bit in between transfers (like in DM355).
41 * @dma_event_q: DMA event queue to use if SPI_IO_TYPE_DMA is used for any
42 * device on the bus.
43 */
44struct davinci_spi_platform_data {
45 u8 version;
46 u8 num_chipselect;
47 u8 intr_line;
48 u8 prescaler_limit;
49 bool cshold_bug;
50 enum dma_event_q dma_event_q;
51};
52
53/**
54 * davinci_spi_config - Per-chip-select configuration for SPI slave devices
55 *
56 * @wdelay: amount of delay between transmissions. Measured in number of
57 * SPI module clocks.
58 * @odd_parity: polarity of parity flag at the end of transmit data stream.
59 * 0 - odd parity, 1 - even parity.
60 * @parity_enable: enable transmission of parity at end of each transmit
61 * data stream.
62 * @io_type: type of IO transfer. Choose between polled, interrupt and DMA.
63 * @timer_disable: disable chip-select timers (setup and hold)
64 * @c2tdelay: chip-select setup time. Measured in number of SPI module clocks.
65 * @t2cdelay: chip-select hold time. Measured in number of SPI module clocks.
66 * @t2edelay: transmit data finished to SPI ENAn pin inactive time. Measured
67 * in number of SPI clocks.
68 * @c2edelay: chip-select active to SPI ENAn signal active time. Measured in
69 * number of SPI clocks.
70 */
71struct davinci_spi_config {
72 u8 wdelay;
73 u8 odd_parity;
74 u8 parity_enable;
75#define SPI_IO_TYPE_INTR 0
76#define SPI_IO_TYPE_POLL 1
77#define SPI_IO_TYPE_DMA 2
78 u8 io_type;
79 u8 timer_disable;
80 u8 c2tdelay;
81 u8 t2cdelay;
82 u8 t2edelay;
83 u8 c2edelay;
84};
85
86#endif /* __ARCH_ARM_DAVINCI_SPI_H */