tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/*
2 * Copyright (c) 2015 MediaTek Inc.
3 * Author: YT SHEN <yt.shen@mediatek.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15#include <drm/drmP.h>
16#include <drm/drm_atomic.h>
17#include <drm/drm_atomic_helper.h>
18#include <drm/drm_crtc_helper.h>
19#include <drm/drm_gem.h>
20#include <drm/drm_gem_cma_helper.h>
21#include <drm/drm_of.h>
22#include <linux/component.h>
23#include <linux/iommu.h>
24#include <linux/of_address.h>
25#include <linux/of_platform.h>
26#include <linux/pm_runtime.h>
27
28#include "mtk_drm_crtc.h"
29#include "mtk_drm_ddp.h"
30#include "mtk_drm_ddp_comp.h"
31#include "mtk_drm_drv.h"
32#include "mtk_drm_fb.h"
33#include "mtk_drm_gem.h"
34
35#define DRIVER_NAME "mediatek"
36#define DRIVER_DESC "Mediatek SoC DRM"
37#define DRIVER_DATE "20150513"
38#define DRIVER_MAJOR 1
39#define DRIVER_MINOR 0
40
41static void mtk_atomic_schedule(struct mtk_drm_private *private,
42 struct drm_atomic_state *state)
43{
44 private->commit.state = state;
45 schedule_work(&private->commit.work);
46}
47
48static void mtk_atomic_wait_for_fences(struct drm_atomic_state *state)
49{
50 struct drm_plane *plane;
51 struct drm_plane_state *new_plane_state;
52 int i;
53
54 for_each_new_plane_in_state(state, plane, new_plane_state, i)
55 mtk_fb_wait(new_plane_state->fb);
56}
57
58static void mtk_atomic_complete(struct mtk_drm_private *private,
59 struct drm_atomic_state *state)
60{
61 struct drm_device *drm = private->drm;
62
63 mtk_atomic_wait_for_fences(state);
64
65 /*
66 * Mediatek drm supports runtime PM, so plane registers cannot be
67 * written when their crtc is disabled.
68 *
69 * The comment for drm_atomic_helper_commit states:
70 * For drivers supporting runtime PM the recommended sequence is
71 *
72 * drm_atomic_helper_commit_modeset_disables(dev, state);
73 * drm_atomic_helper_commit_modeset_enables(dev, state);
74 * drm_atomic_helper_commit_planes(dev, state,
75 * DRM_PLANE_COMMIT_ACTIVE_ONLY);
76 *
77 * See the kerneldoc entries for these three functions for more details.
78 */
79 drm_atomic_helper_commit_modeset_disables(drm, state);
80 drm_atomic_helper_commit_modeset_enables(drm, state);
81 drm_atomic_helper_commit_planes(drm, state,
82 DRM_PLANE_COMMIT_ACTIVE_ONLY);
83
84 drm_atomic_helper_wait_for_vblanks(drm, state);
85
86 drm_atomic_helper_cleanup_planes(drm, state);
87 drm_atomic_state_put(state);
88}
89
90static void mtk_atomic_work(struct work_struct *work)
91{
92 struct mtk_drm_private *private = container_of(work,
93 struct mtk_drm_private, commit.work);
94
95 mtk_atomic_complete(private, private->commit.state);
96}
97
98static int mtk_atomic_commit(struct drm_device *drm,
99 struct drm_atomic_state *state,
100 bool async)
101{
102 struct mtk_drm_private *private = drm->dev_private;
103 int ret;
104
105 ret = drm_atomic_helper_prepare_planes(drm, state);
106 if (ret)
107 return ret;
108
109 mutex_lock(&private->commit.lock);
110 flush_work(&private->commit.work);
111
112 ret = drm_atomic_helper_swap_state(state, true);
113 if (ret) {
114 mutex_unlock(&private->commit.lock);
115 drm_atomic_helper_cleanup_planes(drm, state);
116 return ret;
117 }
118
119 drm_atomic_state_get(state);
120 if (async)
121 mtk_atomic_schedule(private, state);
122 else
123 mtk_atomic_complete(private, state);
124
125 mutex_unlock(&private->commit.lock);
126
127 return 0;
128}
129
130static const struct drm_mode_config_funcs mtk_drm_mode_config_funcs = {
131 .fb_create = mtk_drm_mode_fb_create,
132 .atomic_check = drm_atomic_helper_check,
133 .atomic_commit = mtk_atomic_commit,
134};
135
136static const enum mtk_ddp_comp_id mt2701_mtk_ddp_main[] = {
137 DDP_COMPONENT_OVL0,
138 DDP_COMPONENT_RDMA0,
139 DDP_COMPONENT_COLOR0,
140 DDP_COMPONENT_BLS,
141 DDP_COMPONENT_DSI0,
142};
143
144static const enum mtk_ddp_comp_id mt2701_mtk_ddp_ext[] = {
145 DDP_COMPONENT_RDMA1,
146 DDP_COMPONENT_DPI0,
147};
148
149static const enum mtk_ddp_comp_id mt2712_mtk_ddp_main[] = {
150 DDP_COMPONENT_OVL0,
151 DDP_COMPONENT_COLOR0,
152 DDP_COMPONENT_AAL0,
153 DDP_COMPONENT_OD0,
154 DDP_COMPONENT_RDMA0,
155 DDP_COMPONENT_DPI0,
156 DDP_COMPONENT_PWM0,
157};
158
159static const enum mtk_ddp_comp_id mt2712_mtk_ddp_ext[] = {
160 DDP_COMPONENT_OVL1,
161 DDP_COMPONENT_COLOR1,
162 DDP_COMPONENT_AAL1,
163 DDP_COMPONENT_OD1,
164 DDP_COMPONENT_RDMA1,
165 DDP_COMPONENT_DPI1,
166 DDP_COMPONENT_PWM1,
167};
168
169static const enum mtk_ddp_comp_id mt2712_mtk_ddp_third[] = {
170 DDP_COMPONENT_RDMA2,
171 DDP_COMPONENT_DSI3,
172 DDP_COMPONENT_PWM2,
173};
174
175static const enum mtk_ddp_comp_id mt8173_mtk_ddp_main[] = {
176 DDP_COMPONENT_OVL0,
177 DDP_COMPONENT_COLOR0,
178 DDP_COMPONENT_AAL0,
179 DDP_COMPONENT_OD0,
180 DDP_COMPONENT_RDMA0,
181 DDP_COMPONENT_UFOE,
182 DDP_COMPONENT_DSI0,
183 DDP_COMPONENT_PWM0,
184};
185
186static const enum mtk_ddp_comp_id mt8173_mtk_ddp_ext[] = {
187 DDP_COMPONENT_OVL1,
188 DDP_COMPONENT_COLOR1,
189 DDP_COMPONENT_GAMMA,
190 DDP_COMPONENT_RDMA1,
191 DDP_COMPONENT_DPI0,
192};
193
194static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = {
195 .main_path = mt2701_mtk_ddp_main,
196 .main_len = ARRAY_SIZE(mt2701_mtk_ddp_main),
197 .ext_path = mt2701_mtk_ddp_ext,
198 .ext_len = ARRAY_SIZE(mt2701_mtk_ddp_ext),
199 .shadow_register = true,
200};
201
202static const struct mtk_mmsys_driver_data mt2712_mmsys_driver_data = {
203 .main_path = mt2712_mtk_ddp_main,
204 .main_len = ARRAY_SIZE(mt2712_mtk_ddp_main),
205 .ext_path = mt2712_mtk_ddp_ext,
206 .ext_len = ARRAY_SIZE(mt2712_mtk_ddp_ext),
207 .third_path = mt2712_mtk_ddp_third,
208 .third_len = ARRAY_SIZE(mt2712_mtk_ddp_third),
209};
210
211static const struct mtk_mmsys_driver_data mt8173_mmsys_driver_data = {
212 .main_path = mt8173_mtk_ddp_main,
213 .main_len = ARRAY_SIZE(mt8173_mtk_ddp_main),
214 .ext_path = mt8173_mtk_ddp_ext,
215 .ext_len = ARRAY_SIZE(mt8173_mtk_ddp_ext),
216};
217
218static int mtk_drm_kms_init(struct drm_device *drm)
219{
220 struct mtk_drm_private *private = drm->dev_private;
221 struct platform_device *pdev;
222 struct device_node *np;
223 int ret;
224
225 if (!iommu_present(&platform_bus_type))
226 return -EPROBE_DEFER;
227
228 pdev = of_find_device_by_node(private->mutex_node);
229 if (!pdev) {
230 dev_err(drm->dev, "Waiting for disp-mutex device %pOF\n",
231 private->mutex_node);
232 of_node_put(private->mutex_node);
233 return -EPROBE_DEFER;
234 }
235 private->mutex_dev = &pdev->dev;
236
237 drm_mode_config_init(drm);
238
239 drm->mode_config.min_width = 64;
240 drm->mode_config.min_height = 64;
241
242 /*
243 * set max width and height as default value(4096x4096).
244 * this value would be used to check framebuffer size limitation
245 * at drm_mode_addfb().
246 */
247 drm->mode_config.max_width = 4096;
248 drm->mode_config.max_height = 4096;
249 drm->mode_config.funcs = &mtk_drm_mode_config_funcs;
250
251 ret = component_bind_all(drm->dev, drm);
252 if (ret)
253 goto err_config_cleanup;
254
255 /*
256 * We currently support two fixed data streams, each optional,
257 * and each statically assigned to a crtc:
258 * OVL0 -> COLOR0 -> AAL -> OD -> RDMA0 -> UFOE -> DSI0 ...
259 */
260 ret = mtk_drm_crtc_create(drm, private->data->main_path,
261 private->data->main_len);
262 if (ret < 0)
263 goto err_component_unbind;
264 /* ... and OVL1 -> COLOR1 -> GAMMA -> RDMA1 -> DPI0. */
265 ret = mtk_drm_crtc_create(drm, private->data->ext_path,
266 private->data->ext_len);
267 if (ret < 0)
268 goto err_component_unbind;
269
270 ret = mtk_drm_crtc_create(drm, private->data->third_path,
271 private->data->third_len);
272 if (ret < 0)
273 goto err_component_unbind;
274
275 /* Use OVL device for all DMA memory allocations */
276 np = private->comp_node[private->data->main_path[0]] ?:
277 private->comp_node[private->data->ext_path[0]];
278 pdev = of_find_device_by_node(np);
279 if (!pdev) {
280 ret = -ENODEV;
281 dev_err(drm->dev, "Need at least one OVL device\n");
282 goto err_component_unbind;
283 }
284
285 private->dma_dev = &pdev->dev;
286
287 /*
288 * We don't use the drm_irq_install() helpers provided by the DRM
289 * core, so we need to set this manually in order to allow the
290 * DRM_IOCTL_WAIT_VBLANK to operate correctly.
291 */
292 drm->irq_enabled = true;
293 ret = drm_vblank_init(drm, MAX_CRTC);
294 if (ret < 0)
295 goto err_component_unbind;
296
297 drm_kms_helper_poll_init(drm);
298 drm_mode_config_reset(drm);
299
300 return 0;
301
302err_component_unbind:
303 component_unbind_all(drm->dev, drm);
304err_config_cleanup:
305 drm_mode_config_cleanup(drm);
306
307 return ret;
308}
309
310static void mtk_drm_kms_deinit(struct drm_device *drm)
311{
312 drm_kms_helper_poll_fini(drm);
313
314 component_unbind_all(drm->dev, drm);
315 drm_mode_config_cleanup(drm);
316}
317
318static const struct file_operations mtk_drm_fops = {
319 .owner = THIS_MODULE,
320 .open = drm_open,
321 .release = drm_release,
322 .unlocked_ioctl = drm_ioctl,
323 .mmap = mtk_drm_gem_mmap,
324 .poll = drm_poll,
325 .read = drm_read,
326 .compat_ioctl = drm_compat_ioctl,
327};
328
329static struct drm_driver mtk_drm_driver = {
330 .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME |
331 DRIVER_ATOMIC,
332
333 .gem_free_object_unlocked = mtk_drm_gem_free_object,
334 .gem_vm_ops = &drm_gem_cma_vm_ops,
335 .dumb_create = mtk_drm_gem_dumb_create,
336
337 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
338 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
339 .gem_prime_export = drm_gem_prime_export,
340 .gem_prime_import = drm_gem_prime_import,
341 .gem_prime_get_sg_table = mtk_gem_prime_get_sg_table,
342 .gem_prime_import_sg_table = mtk_gem_prime_import_sg_table,
343 .gem_prime_mmap = mtk_drm_gem_mmap_buf,
344 .fops = &mtk_drm_fops,
345
346 .name = DRIVER_NAME,
347 .desc = DRIVER_DESC,
348 .date = DRIVER_DATE,
349 .major = DRIVER_MAJOR,
350 .minor = DRIVER_MINOR,
351};
352
353static int compare_of(struct device *dev, void *data)
354{
355 return dev->of_node == data;
356}
357
358static int mtk_drm_bind(struct device *dev)
359{
360 struct mtk_drm_private *private = dev_get_drvdata(dev);
361 struct drm_device *drm;
362 int ret;
363
364 drm = drm_dev_alloc(&mtk_drm_driver, dev);
365 if (IS_ERR(drm))
366 return PTR_ERR(drm);
367
368 drm->dev_private = private;
369 private->drm = drm;
370
371 ret = mtk_drm_kms_init(drm);
372 if (ret < 0)
373 goto err_free;
374
375 ret = drm_dev_register(drm, 0);
376 if (ret < 0)
377 goto err_deinit;
378
379 return 0;
380
381err_deinit:
382 mtk_drm_kms_deinit(drm);
383err_free:
384 drm_dev_put(drm);
385 return ret;
386}
387
388static void mtk_drm_unbind(struct device *dev)
389{
390 struct mtk_drm_private *private = dev_get_drvdata(dev);
391
392 drm_dev_unregister(private->drm);
393 drm_dev_put(private->drm);
394 private->drm = NULL;
395}
396
397static const struct component_master_ops mtk_drm_ops = {
398 .bind = mtk_drm_bind,
399 .unbind = mtk_drm_unbind,
400};
401
402static const struct of_device_id mtk_ddp_comp_dt_ids[] = {
403 { .compatible = "mediatek,mt2701-disp-ovl",
404 .data = (void *)MTK_DISP_OVL },
405 { .compatible = "mediatek,mt8173-disp-ovl",
406 .data = (void *)MTK_DISP_OVL },
407 { .compatible = "mediatek,mt2701-disp-rdma",
408 .data = (void *)MTK_DISP_RDMA },
409 { .compatible = "mediatek,mt8173-disp-rdma",
410 .data = (void *)MTK_DISP_RDMA },
411 { .compatible = "mediatek,mt8173-disp-wdma",
412 .data = (void *)MTK_DISP_WDMA },
413 { .compatible = "mediatek,mt2701-disp-color",
414 .data = (void *)MTK_DISP_COLOR },
415 { .compatible = "mediatek,mt8173-disp-color",
416 .data = (void *)MTK_DISP_COLOR },
417 { .compatible = "mediatek,mt8173-disp-aal",
418 .data = (void *)MTK_DISP_AAL},
419 { .compatible = "mediatek,mt8173-disp-gamma",
420 .data = (void *)MTK_DISP_GAMMA, },
421 { .compatible = "mediatek,mt8173-disp-ufoe",
422 .data = (void *)MTK_DISP_UFOE },
423 { .compatible = "mediatek,mt2701-dsi",
424 .data = (void *)MTK_DSI },
425 { .compatible = "mediatek,mt8173-dsi",
426 .data = (void *)MTK_DSI },
427 { .compatible = "mediatek,mt2701-dpi",
428 .data = (void *)MTK_DPI },
429 { .compatible = "mediatek,mt8173-dpi",
430 .data = (void *)MTK_DPI },
431 { .compatible = "mediatek,mt2701-disp-mutex",
432 .data = (void *)MTK_DISP_MUTEX },
433 { .compatible = "mediatek,mt2712-disp-mutex",
434 .data = (void *)MTK_DISP_MUTEX },
435 { .compatible = "mediatek,mt8173-disp-mutex",
436 .data = (void *)MTK_DISP_MUTEX },
437 { .compatible = "mediatek,mt2701-disp-pwm",
438 .data = (void *)MTK_DISP_BLS },
439 { .compatible = "mediatek,mt8173-disp-pwm",
440 .data = (void *)MTK_DISP_PWM },
441 { .compatible = "mediatek,mt8173-disp-od",
442 .data = (void *)MTK_DISP_OD },
443 { }
444};
445
446static int mtk_drm_probe(struct platform_device *pdev)
447{
448 struct device *dev = &pdev->dev;
449 struct mtk_drm_private *private;
450 struct resource *mem;
451 struct device_node *node;
452 struct component_match *match = NULL;
453 int ret;
454 int i;
455
456 private = devm_kzalloc(dev, sizeof(*private), GFP_KERNEL);
457 if (!private)
458 return -ENOMEM;
459
460 mutex_init(&private->commit.lock);
461 INIT_WORK(&private->commit.work, mtk_atomic_work);
462 private->data = of_device_get_match_data(dev);
463
464 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
465 private->config_regs = devm_ioremap_resource(dev, mem);
466 if (IS_ERR(private->config_regs)) {
467 ret = PTR_ERR(private->config_regs);
468 dev_err(dev, "Failed to ioremap mmsys-config resource: %d\n",
469 ret);
470 return ret;
471 }
472
473 /* Iterate over sibling DISP function blocks */
474 for_each_child_of_node(dev->of_node->parent, node) {
475 const struct of_device_id *of_id;
476 enum mtk_ddp_comp_type comp_type;
477 int comp_id;
478
479 of_id = of_match_node(mtk_ddp_comp_dt_ids, node);
480 if (!of_id)
481 continue;
482
483 if (!of_device_is_available(node)) {
484 dev_dbg(dev, "Skipping disabled component %pOF\n",
485 node);
486 continue;
487 }
488
489 comp_type = (enum mtk_ddp_comp_type)of_id->data;
490
491 if (comp_type == MTK_DISP_MUTEX) {
492 private->mutex_node = of_node_get(node);
493 continue;
494 }
495
496 comp_id = mtk_ddp_comp_get_id(node, comp_type);
497 if (comp_id < 0) {
498 dev_warn(dev, "Skipping unknown component %pOF\n",
499 node);
500 continue;
501 }
502
503 private->comp_node[comp_id] = of_node_get(node);
504
505 /*
506 * Currently only the COLOR, OVL, RDMA, DSI, and DPI blocks have
507 * separate component platform drivers and initialize their own
508 * DDP component structure. The others are initialized here.
509 */
510 if (comp_type == MTK_DISP_COLOR ||
511 comp_type == MTK_DISP_OVL ||
512 comp_type == MTK_DISP_RDMA ||
513 comp_type == MTK_DSI ||
514 comp_type == MTK_DPI) {
515 dev_info(dev, "Adding component match for %pOF\n",
516 node);
517 drm_of_component_match_add(dev, &match, compare_of,
518 node);
519 } else {
520 struct mtk_ddp_comp *comp;
521
522 comp = devm_kzalloc(dev, sizeof(*comp), GFP_KERNEL);
523 if (!comp) {
524 ret = -ENOMEM;
525 goto err_node;
526 }
527
528 ret = mtk_ddp_comp_init(dev, node, comp, comp_id, NULL);
529 if (ret)
530 goto err_node;
531
532 private->ddp_comp[comp_id] = comp;
533 }
534 }
535
536 if (!private->mutex_node) {
537 dev_err(dev, "Failed to find disp-mutex node\n");
538 ret = -ENODEV;
539 goto err_node;
540 }
541
542 pm_runtime_enable(dev);
543
544 platform_set_drvdata(pdev, private);
545
546 ret = component_master_add_with_match(dev, &mtk_drm_ops, match);
547 if (ret)
548 goto err_pm;
549
550 return 0;
551
552err_pm:
553 pm_runtime_disable(dev);
554err_node:
555 of_node_put(private->mutex_node);
556 for (i = 0; i < DDP_COMPONENT_ID_MAX; i++)
557 of_node_put(private->comp_node[i]);
558 return ret;
559}
560
561static int mtk_drm_remove(struct platform_device *pdev)
562{
563 struct mtk_drm_private *private = platform_get_drvdata(pdev);
564 struct drm_device *drm = private->drm;
565 int i;
566
567 drm_dev_unregister(drm);
568 mtk_drm_kms_deinit(drm);
569 drm_dev_put(drm);
570
571 component_master_del(&pdev->dev, &mtk_drm_ops);
572 pm_runtime_disable(&pdev->dev);
573 of_node_put(private->mutex_node);
574 for (i = 0; i < DDP_COMPONENT_ID_MAX; i++)
575 of_node_put(private->comp_node[i]);
576
577 return 0;
578}
579
580#ifdef CONFIG_PM_SLEEP
581static int mtk_drm_sys_suspend(struct device *dev)
582{
583 struct mtk_drm_private *private = dev_get_drvdata(dev);
584 struct drm_device *drm = private->drm;
585 int ret;
586
587 ret = drm_mode_config_helper_suspend(drm);
588 DRM_DEBUG_DRIVER("mtk_drm_sys_suspend\n");
589
590 return ret;
591}
592
593static int mtk_drm_sys_resume(struct device *dev)
594{
595 struct mtk_drm_private *private = dev_get_drvdata(dev);
596 struct drm_device *drm = private->drm;
597 int ret;
598
599 ret = drm_mode_config_helper_resume(drm);
600 DRM_DEBUG_DRIVER("mtk_drm_sys_resume\n");
601
602 return ret;
603}
604#endif
605
606static SIMPLE_DEV_PM_OPS(mtk_drm_pm_ops, mtk_drm_sys_suspend,
607 mtk_drm_sys_resume);
608
609static const struct of_device_id mtk_drm_of_ids[] = {
610 { .compatible = "mediatek,mt2701-mmsys",
611 .data = &mt2701_mmsys_driver_data},
612 { .compatible = "mediatek,mt2712-mmsys",
613 .data = &mt2712_mmsys_driver_data},
614 { .compatible = "mediatek,mt8173-mmsys",
615 .data = &mt8173_mmsys_driver_data},
616 { }
617};
618
619static struct platform_driver mtk_drm_platform_driver = {
620 .probe = mtk_drm_probe,
621 .remove = mtk_drm_remove,
622 .driver = {
623 .name = "mediatek-drm",
624 .of_match_table = mtk_drm_of_ids,
625 .pm = &mtk_drm_pm_ops,
626 },
627};
628
629static struct platform_driver * const mtk_drm_drivers[] = {
630 &mtk_ddp_driver,
631 &mtk_disp_color_driver,
632 &mtk_disp_ovl_driver,
633 &mtk_disp_rdma_driver,
634 &mtk_dpi_driver,
635 &mtk_drm_platform_driver,
636 &mtk_dsi_driver,
637 &mtk_mipi_tx_driver,
638};
639
640static int __init mtk_drm_init(void)
641{
642 return platform_register_drivers(mtk_drm_drivers,
643 ARRAY_SIZE(mtk_drm_drivers));
644}
645
646static void __exit mtk_drm_exit(void)
647{
648 platform_unregister_drivers(mtk_drm_drivers,
649 ARRAY_SIZE(mtk_drm_drivers));
650}
651
652module_init(mtk_drm_init);
653module_exit(mtk_drm_exit);
654
655MODULE_AUTHOR("YT SHEN <yt.shen@mediatek.com>");
656MODULE_DESCRIPTION("Mediatek SoC DRM driver");
657MODULE_LICENSE("GPL v2");