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1/* 2 * arch/arm/include/asm/domain.h 3 * 4 * Copyright (C) 1999 Russell King. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 */ 10#ifndef __ASM_PROC_DOMAIN_H 11#define __ASM_PROC_DOMAIN_H 12 13#ifndef __ASSEMBLY__ 14#include <asm/barrier.h> 15#include <asm/thread_info.h> 16#endif 17 18/* 19 * Domain numbers 20 * 21 * DOMAIN_IO - domain 2 includes all IO only 22 * DOMAIN_USER - domain 1 includes all user memory only 23 * DOMAIN_KERNEL - domain 0 includes all kernel memory only 24 * 25 * The domain numbering depends on whether we support 36 physical 26 * address for I/O or not. Addresses above the 32 bit boundary can 27 * only be mapped using supersections and supersections can only 28 * be set for domain 0. We could just default to DOMAIN_IO as zero, 29 * but there may be systems with supersection support and no 36-bit 30 * addressing. In such cases, we want to map system memory with 31 * supersections to reduce TLB misses and footprint. 32 * 33 * 36-bit addressing and supersections are only available on 34 * CPUs based on ARMv6+ or the Intel XSC3 core. 35 */ 36#ifndef CONFIG_IO_36 37#define DOMAIN_KERNEL 0 38#define DOMAIN_USER 1 39#define DOMAIN_IO 2 40#else 41#define DOMAIN_KERNEL 2 42#define DOMAIN_USER 1 43#define DOMAIN_IO 0 44#endif 45#define DOMAIN_VECTORS 3 46 47/* 48 * Domain types 49 */ 50#define DOMAIN_NOACCESS 0 51#define DOMAIN_CLIENT 1 52#ifdef CONFIG_CPU_USE_DOMAINS 53#define DOMAIN_MANAGER 3 54#else 55#define DOMAIN_MANAGER 1 56#endif 57 58#define domain_mask(dom) ((3) << (2 * (dom))) 59#define domain_val(dom,type) ((type) << (2 * (dom))) 60 61#ifdef CONFIG_CPU_SW_DOMAIN_PAN 62#define DACR_INIT \ 63 (domain_val(DOMAIN_USER, DOMAIN_NOACCESS) | \ 64 domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \ 65 domain_val(DOMAIN_IO, DOMAIN_CLIENT) | \ 66 domain_val(DOMAIN_VECTORS, DOMAIN_CLIENT)) 67#else 68#define DACR_INIT \ 69 (domain_val(DOMAIN_USER, DOMAIN_CLIENT) | \ 70 domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \ 71 domain_val(DOMAIN_IO, DOMAIN_CLIENT) | \ 72 domain_val(DOMAIN_VECTORS, DOMAIN_CLIENT)) 73#endif 74 75#define __DACR_DEFAULT \ 76 domain_val(DOMAIN_KERNEL, DOMAIN_CLIENT) | \ 77 domain_val(DOMAIN_IO, DOMAIN_CLIENT) | \ 78 domain_val(DOMAIN_VECTORS, DOMAIN_CLIENT) 79 80#define DACR_UACCESS_DISABLE \ 81 (__DACR_DEFAULT | domain_val(DOMAIN_USER, DOMAIN_NOACCESS)) 82#define DACR_UACCESS_ENABLE \ 83 (__DACR_DEFAULT | domain_val(DOMAIN_USER, DOMAIN_CLIENT)) 84 85#ifndef __ASSEMBLY__ 86 87#ifdef CONFIG_CPU_CP15_MMU 88static inline unsigned int get_domain(void) 89{ 90 unsigned int domain; 91 92 asm( 93 "mrc p15, 0, %0, c3, c0 @ get domain" 94 : "=r" (domain) 95 : "m" (current_thread_info()->cpu_domain)); 96 97 return domain; 98} 99 100static inline void set_domain(unsigned val) 101{ 102 asm volatile( 103 "mcr p15, 0, %0, c3, c0 @ set domain" 104 : : "r" (val) : "memory"); 105 isb(); 106} 107#else 108static inline unsigned int get_domain(void) 109{ 110 return 0; 111} 112 113static inline void set_domain(unsigned val) 114{ 115} 116#endif 117 118#ifdef CONFIG_CPU_USE_DOMAINS 119#define modify_domain(dom,type) \ 120 do { \ 121 unsigned int domain = get_domain(); \ 122 domain &= ~domain_mask(dom); \ 123 domain = domain | domain_val(dom, type); \ 124 set_domain(domain); \ 125 } while (0) 126 127#else 128static inline void modify_domain(unsigned dom, unsigned type) { } 129#endif 130 131/* 132 * Generate the T (user) versions of the LDR/STR and related 133 * instructions (inline assembly) 134 */ 135#ifdef CONFIG_CPU_USE_DOMAINS 136#define TUSER(instr) #instr "t" 137#else 138#define TUSER(instr) #instr 139#endif 140 141#else /* __ASSEMBLY__ */ 142 143/* 144 * Generate the T (user) versions of the LDR/STR and related 145 * instructions 146 */ 147#ifdef CONFIG_CPU_USE_DOMAINS 148#define TUSER(instr) instr ## t 149#else 150#define TUSER(instr) instr 151#endif 152 153#endif /* __ASSEMBLY__ */ 154 155#endif /* !__ASM_PROC_DOMAIN_H */