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1* Hisilicon Hi3519 Clock and Reset Generator(CRG) 2 3The Hi3519 CRG module provides clock and reset signals to various 4controllers within the SoC. 5 6This binding uses the following bindings: 7 Documentation/devicetree/bindings/clock/clock-bindings.txt 8 Documentation/devicetree/bindings/reset/reset.txt 9 10Required Properties: 11 12- compatible: should be one of the following. 13 - "hisilicon,hi3519-crg" - controller compatible with Hi3519 SoC. 14 15- reg: physical base address of the controller and length of memory mapped 16 region. 17 18- #clock-cells: should be 1. 19 20Each clock is assigned an identifier and client nodes use this identifier 21to specify the clock which they consume. 22 23All these identifier could be found in <dt-bindings/clock/hi3519-clock.h>. 24 25- #reset-cells: should be 2. 26 27A reset signal can be controlled by writing a bit register in the CRG module. 28The reset specifier consists of two cells. The first cell represents the 29register offset relative to the base address. The second cell represents the 30bit index in the register. 31 32Example: CRG nodes 33CRG: clock-reset-controller@12010000 { 34 compatible = "hisilicon,hi3519-crg"; 35 reg = <0x12010000 0x10000>; 36 #clock-cells = <1>; 37 #reset-cells = <2>; 38}; 39 40Example: consumer nodes 41i2c0: i2c@12110000 { 42 compatible = "hisilicon,hi3519-i2c"; 43 reg = <0x12110000 0x1000>; 44 clocks = <&CRG HI3519_I2C0_RST>; 45 resets = <&CRG 0xe4 0>; 46};