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1/* The pxa3xx skeleton simply augments the 2xx version */ 2#include "pxa2xx.dtsi" 3#include "dt-bindings/clock/pxa-clock.h" 4 5/ { 6 model = "Marvell PXA27x familiy SoC"; 7 compatible = "marvell,pxa27x"; 8 9 pxabus { 10 pdma: dma-controller@40000000 { 11 compatible = "marvell,pdma-1.0"; 12 reg = <0x40000000 0x10000>; 13 interrupts = <25>; 14 #dma-channels = <32>; 15 #dma-cells = <2>; 16 #dma-requests = <75>; 17 status = "okay"; 18 }; 19 20 pxairq: interrupt-controller@40d00000 { 21 marvell,intc-priority; 22 marvell,intc-nr-irqs = <34>; 23 }; 24 25 pinctrl: pinctrl@40e00000 { 26 reg = <0x40e00054 0x20 0x40e0000c 0xc 0x40e0010c 4 27 0x40f00020 0x10>; 28 compatible = "marvell,pxa27x-pinctrl"; 29 }; 30 31 gpio: gpio@40e00000 { 32 compatible = "intel,pxa27x-gpio"; 33 gpio-ranges = <&pinctrl 0 0 128>; 34 clocks = <&clks CLK_NONE>; 35 }; 36 37 pxa27x_ohci: usb@4c000000 { 38 compatible = "marvell,pxa-ohci"; 39 reg = <0x4c000000 0x10000>; 40 interrupts = <3>; 41 clocks = <&clks CLK_USBHOST>; 42 status = "disabled"; 43 }; 44 45 pwm0: pwm@40b00000 { 46 compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm"; 47 reg = <0x40b00000 0x10>; 48 #pwm-cells = <1>; 49 clocks = <&clks CLK_PWM0>; 50 }; 51 52 pwm1: pwm@40b00010 { 53 compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm"; 54 reg = <0x40b00010 0x10>; 55 #pwm-cells = <1>; 56 clocks = <&clks CLK_PWM1>; 57 }; 58 59 pwm2: pwm@40c00000 { 60 compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm"; 61 reg = <0x40c00000 0x10>; 62 #pwm-cells = <1>; 63 clocks = <&clks CLK_PWM0>; 64 }; 65 66 pwm3: pwm@40c00010 { 67 compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm"; 68 reg = <0x40c00010 0x10>; 69 #pwm-cells = <1>; 70 clocks = <&clks CLK_PWM1>; 71 }; 72 73 pwri2c: i2c@40f000180 { 74 compatible = "mrvl,pxa-i2c"; 75 reg = <0x40f00180 0x24>; 76 interrupts = <6>; 77 clocks = <&clks CLK_PWRI2C>; 78 #address-cells = <0x1>; 79 #size-cells = <0>; 80 status = "disabled"; 81 }; 82 83 pxa27x_udc: udc@40600000 { 84 compatible = "marvell,pxa270-udc"; 85 reg = <0x40600000 0x10000>; 86 interrupts = <11>; 87 clocks = <&clks CLK_USB>; 88 status = "disabled"; 89 }; 90 91 keypad: keypad@41500000 { 92 compatible = "marvell,pxa27x-keypad"; 93 reg = <0x41500000 0x4c>; 94 interrupts = <4>; 95 clocks = <&clks CLK_KEYPAD>; 96 status = "disabled"; 97 }; 98 99 pxa_camera: imaging@50000000 { 100 compatible = "marvell,pxa270-qci"; 101 reg = <0x50000000 0x1000>; 102 interrupts = <33>; 103 dmas = <&pdma 68 0 /* Y channel */ 104 &pdma 69 0 /* U channel */ 105 &pdma 70 0>; /* V channel */ 106 dma-names = "CI_Y", "CI_U", "CI_V"; 107 108 clocks = <&clks CLK_CAMERA>; 109 clock-names = "ciclk"; 110 clock-frequency = <5000000>; 111 clock-output-names = "qci_mclk"; 112 113 status = "disabled"; 114 }; 115 }; 116 117 clocks { 118 /* 119 * The muxing of external clocks/internal dividers for osc* clock 120 * sources has been hidden under the carpet by now. 121 */ 122 #address-cells = <1>; 123 #size-cells = <1>; 124 ranges; 125 126 clks: pxa2xx_clks@41300004 { 127 compatible = "marvell,pxa270-clocks"; 128 #clock-cells = <1>; 129 status = "okay"; 130 }; 131 }; 132 133 timer@40a00000 { 134 compatible = "marvell,pxa-timer"; 135 reg = <0x40a00000 0x20>; 136 interrupts = <26>; 137 clocks = <&clks CLK_OSTIMER>; 138 status = "okay"; 139 }; 140};