Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
tjh.dev
kernel
os
linux
1
2/*
3 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
4 * Copyright 2003-2004 Jeff Garzik
5 *
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2, or (at your option)
10 * any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; see the file COPYING. If not, write to
19 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
20 *
21 *
22 * libata documentation is available via 'make {ps|pdf}docs',
23 * as Documentation/DocBook/libata.*
24 *
25 * Hardware documentation available from http://www.t13.org/
26 *
27 */
28
29#ifndef __LINUX_ATA_H__
30#define __LINUX_ATA_H__
31
32#include <linux/kernel.h>
33#include <linux/string.h>
34#include <linux/types.h>
35#include <asm/byteorder.h>
36
37/* defines only for the constants which don't work well as enums */
38#define ATA_DMA_BOUNDARY 0xffffUL
39#define ATA_DMA_MASK 0xffffffffULL
40
41enum {
42 /* various global constants */
43 ATA_MAX_DEVICES = 2, /* per bus/port */
44 ATA_MAX_PRD = 256, /* we could make these 256/256 */
45 ATA_SECT_SIZE = 512,
46 ATA_MAX_SECTORS_128 = 128,
47 ATA_MAX_SECTORS = 256,
48 ATA_MAX_SECTORS_1024 = 1024,
49 ATA_MAX_SECTORS_LBA48 = 65535,/* TODO: 65536? */
50 ATA_MAX_SECTORS_TAPE = 65535,
51
52 ATA_ID_WORDS = 256,
53 ATA_ID_CONFIG = 0,
54 ATA_ID_CYLS = 1,
55 ATA_ID_HEADS = 3,
56 ATA_ID_SECTORS = 6,
57 ATA_ID_SERNO = 10,
58 ATA_ID_BUF_SIZE = 21,
59 ATA_ID_FW_REV = 23,
60 ATA_ID_PROD = 27,
61 ATA_ID_MAX_MULTSECT = 47,
62 ATA_ID_DWORD_IO = 48,
63 ATA_ID_CAPABILITY = 49,
64 ATA_ID_OLD_PIO_MODES = 51,
65 ATA_ID_OLD_DMA_MODES = 52,
66 ATA_ID_FIELD_VALID = 53,
67 ATA_ID_CUR_CYLS = 54,
68 ATA_ID_CUR_HEADS = 55,
69 ATA_ID_CUR_SECTORS = 56,
70 ATA_ID_MULTSECT = 59,
71 ATA_ID_LBA_CAPACITY = 60,
72 ATA_ID_SWDMA_MODES = 62,
73 ATA_ID_MWDMA_MODES = 63,
74 ATA_ID_PIO_MODES = 64,
75 ATA_ID_EIDE_DMA_MIN = 65,
76 ATA_ID_EIDE_DMA_TIME = 66,
77 ATA_ID_EIDE_PIO = 67,
78 ATA_ID_EIDE_PIO_IORDY = 68,
79 ATA_ID_ADDITIONAL_SUPP = 69,
80 ATA_ID_QUEUE_DEPTH = 75,
81 ATA_ID_SATA_CAPABILITY = 76,
82 ATA_ID_SATA_CAPABILITY_2 = 77,
83 ATA_ID_FEATURE_SUPP = 78,
84 ATA_ID_MAJOR_VER = 80,
85 ATA_ID_COMMAND_SET_1 = 82,
86 ATA_ID_COMMAND_SET_2 = 83,
87 ATA_ID_CFSSE = 84,
88 ATA_ID_CFS_ENABLE_1 = 85,
89 ATA_ID_CFS_ENABLE_2 = 86,
90 ATA_ID_CSF_DEFAULT = 87,
91 ATA_ID_UDMA_MODES = 88,
92 ATA_ID_HW_CONFIG = 93,
93 ATA_ID_SPG = 98,
94 ATA_ID_LBA_CAPACITY_2 = 100,
95 ATA_ID_SECTOR_SIZE = 106,
96 ATA_ID_WWN = 108,
97 ATA_ID_LOGICAL_SECTOR_SIZE = 117, /* and 118 */
98 ATA_ID_COMMAND_SET_3 = 119,
99 ATA_ID_COMMAND_SET_4 = 120,
100 ATA_ID_LAST_LUN = 126,
101 ATA_ID_DLF = 128,
102 ATA_ID_CSFO = 129,
103 ATA_ID_CFA_POWER = 160,
104 ATA_ID_CFA_KEY_MGMT = 162,
105 ATA_ID_CFA_MODES = 163,
106 ATA_ID_DATA_SET_MGMT = 169,
107 ATA_ID_ROT_SPEED = 217,
108 ATA_ID_PIO4 = (1 << 1),
109
110 ATA_ID_SERNO_LEN = 20,
111 ATA_ID_FW_REV_LEN = 8,
112 ATA_ID_PROD_LEN = 40,
113 ATA_ID_WWN_LEN = 8,
114
115 ATA_PCI_CTL_OFS = 2,
116
117 ATA_PIO0 = (1 << 0),
118 ATA_PIO1 = ATA_PIO0 | (1 << 1),
119 ATA_PIO2 = ATA_PIO1 | (1 << 2),
120 ATA_PIO3 = ATA_PIO2 | (1 << 3),
121 ATA_PIO4 = ATA_PIO3 | (1 << 4),
122 ATA_PIO5 = ATA_PIO4 | (1 << 5),
123 ATA_PIO6 = ATA_PIO5 | (1 << 6),
124
125 ATA_PIO4_ONLY = (1 << 4),
126
127 ATA_SWDMA0 = (1 << 0),
128 ATA_SWDMA1 = ATA_SWDMA0 | (1 << 1),
129 ATA_SWDMA2 = ATA_SWDMA1 | (1 << 2),
130
131 ATA_SWDMA2_ONLY = (1 << 2),
132
133 ATA_MWDMA0 = (1 << 0),
134 ATA_MWDMA1 = ATA_MWDMA0 | (1 << 1),
135 ATA_MWDMA2 = ATA_MWDMA1 | (1 << 2),
136 ATA_MWDMA3 = ATA_MWDMA2 | (1 << 3),
137 ATA_MWDMA4 = ATA_MWDMA3 | (1 << 4),
138
139 ATA_MWDMA12_ONLY = (1 << 1) | (1 << 2),
140 ATA_MWDMA2_ONLY = (1 << 2),
141
142 ATA_UDMA0 = (1 << 0),
143 ATA_UDMA1 = ATA_UDMA0 | (1 << 1),
144 ATA_UDMA2 = ATA_UDMA1 | (1 << 2),
145 ATA_UDMA3 = ATA_UDMA2 | (1 << 3),
146 ATA_UDMA4 = ATA_UDMA3 | (1 << 4),
147 ATA_UDMA5 = ATA_UDMA4 | (1 << 5),
148 ATA_UDMA6 = ATA_UDMA5 | (1 << 6),
149 ATA_UDMA7 = ATA_UDMA6 | (1 << 7),
150 /* ATA_UDMA7 is just for completeness... doesn't exist (yet?). */
151
152 ATA_UDMA24_ONLY = (1 << 2) | (1 << 4),
153
154 ATA_UDMA_MASK_40C = ATA_UDMA2, /* udma0-2 */
155
156 /* DMA-related */
157 ATA_PRD_SZ = 8,
158 ATA_PRD_TBL_SZ = (ATA_MAX_PRD * ATA_PRD_SZ),
159 ATA_PRD_EOT = (1 << 31), /* end-of-table flag */
160
161 ATA_DMA_TABLE_OFS = 4,
162 ATA_DMA_STATUS = 2,
163 ATA_DMA_CMD = 0,
164 ATA_DMA_WR = (1 << 3),
165 ATA_DMA_START = (1 << 0),
166 ATA_DMA_INTR = (1 << 2),
167 ATA_DMA_ERR = (1 << 1),
168 ATA_DMA_ACTIVE = (1 << 0),
169
170 /* bits in ATA command block registers */
171 ATA_HOB = (1 << 7), /* LBA48 selector */
172 ATA_NIEN = (1 << 1), /* disable-irq flag */
173 ATA_LBA = (1 << 6), /* LBA28 selector */
174 ATA_DEV1 = (1 << 4), /* Select Device 1 (slave) */
175 ATA_DEVICE_OBS = (1 << 7) | (1 << 5), /* obs bits in dev reg */
176 ATA_DEVCTL_OBS = (1 << 3), /* obsolete bit in devctl reg */
177 ATA_BUSY = (1 << 7), /* BSY status bit */
178 ATA_DRDY = (1 << 6), /* device ready */
179 ATA_DF = (1 << 5), /* device fault */
180 ATA_DSC = (1 << 4), /* drive seek complete */
181 ATA_DRQ = (1 << 3), /* data request i/o */
182 ATA_CORR = (1 << 2), /* corrected data error */
183 ATA_SENSE = (1 << 1), /* sense code available */
184 ATA_ERR = (1 << 0), /* have an error */
185 ATA_SRST = (1 << 2), /* software reset */
186 ATA_ICRC = (1 << 7), /* interface CRC error */
187 ATA_BBK = ATA_ICRC, /* pre-EIDE: block marked bad */
188 ATA_UNC = (1 << 6), /* uncorrectable media error */
189 ATA_MC = (1 << 5), /* media changed */
190 ATA_IDNF = (1 << 4), /* ID not found */
191 ATA_MCR = (1 << 3), /* media change requested */
192 ATA_ABORTED = (1 << 2), /* command aborted */
193 ATA_TRK0NF = (1 << 1), /* track 0 not found */
194 ATA_AMNF = (1 << 0), /* address mark not found */
195 ATAPI_LFS = 0xF0, /* last failed sense */
196 ATAPI_EOM = ATA_TRK0NF, /* end of media */
197 ATAPI_ILI = ATA_AMNF, /* illegal length indication */
198 ATAPI_IO = (1 << 1),
199 ATAPI_COD = (1 << 0),
200
201 /* ATA command block registers */
202 ATA_REG_DATA = 0x00,
203 ATA_REG_ERR = 0x01,
204 ATA_REG_NSECT = 0x02,
205 ATA_REG_LBAL = 0x03,
206 ATA_REG_LBAM = 0x04,
207 ATA_REG_LBAH = 0x05,
208 ATA_REG_DEVICE = 0x06,
209 ATA_REG_STATUS = 0x07,
210
211 ATA_REG_FEATURE = ATA_REG_ERR, /* and their aliases */
212 ATA_REG_CMD = ATA_REG_STATUS,
213 ATA_REG_BYTEL = ATA_REG_LBAM,
214 ATA_REG_BYTEH = ATA_REG_LBAH,
215 ATA_REG_DEVSEL = ATA_REG_DEVICE,
216 ATA_REG_IRQ = ATA_REG_NSECT,
217
218 /* ATA device commands */
219 ATA_CMD_DEV_RESET = 0x08, /* ATAPI device reset */
220 ATA_CMD_CHK_POWER = 0xE5, /* check power mode */
221 ATA_CMD_STANDBY = 0xE2, /* place in standby power mode */
222 ATA_CMD_IDLE = 0xE3, /* place in idle power mode */
223 ATA_CMD_EDD = 0x90, /* execute device diagnostic */
224 ATA_CMD_DOWNLOAD_MICRO = 0x92,
225 ATA_CMD_DOWNLOAD_MICRO_DMA = 0x93,
226 ATA_CMD_NOP = 0x00,
227 ATA_CMD_FLUSH = 0xE7,
228 ATA_CMD_FLUSH_EXT = 0xEA,
229 ATA_CMD_ID_ATA = 0xEC,
230 ATA_CMD_ID_ATAPI = 0xA1,
231 ATA_CMD_SERVICE = 0xA2,
232 ATA_CMD_READ = 0xC8,
233 ATA_CMD_READ_EXT = 0x25,
234 ATA_CMD_READ_QUEUED = 0x26,
235 ATA_CMD_READ_STREAM_EXT = 0x2B,
236 ATA_CMD_READ_STREAM_DMA_EXT = 0x2A,
237 ATA_CMD_WRITE = 0xCA,
238 ATA_CMD_WRITE_EXT = 0x35,
239 ATA_CMD_WRITE_QUEUED = 0x36,
240 ATA_CMD_WRITE_STREAM_EXT = 0x3B,
241 ATA_CMD_WRITE_STREAM_DMA_EXT = 0x3A,
242 ATA_CMD_WRITE_FUA_EXT = 0x3D,
243 ATA_CMD_WRITE_QUEUED_FUA_EXT = 0x3E,
244 ATA_CMD_FPDMA_READ = 0x60,
245 ATA_CMD_FPDMA_WRITE = 0x61,
246 ATA_CMD_NCQ_NON_DATA = 0x63,
247 ATA_CMD_FPDMA_SEND = 0x64,
248 ATA_CMD_FPDMA_RECV = 0x65,
249 ATA_CMD_PIO_READ = 0x20,
250 ATA_CMD_PIO_READ_EXT = 0x24,
251 ATA_CMD_PIO_WRITE = 0x30,
252 ATA_CMD_PIO_WRITE_EXT = 0x34,
253 ATA_CMD_READ_MULTI = 0xC4,
254 ATA_CMD_READ_MULTI_EXT = 0x29,
255 ATA_CMD_WRITE_MULTI = 0xC5,
256 ATA_CMD_WRITE_MULTI_EXT = 0x39,
257 ATA_CMD_WRITE_MULTI_FUA_EXT = 0xCE,
258 ATA_CMD_SET_FEATURES = 0xEF,
259 ATA_CMD_SET_MULTI = 0xC6,
260 ATA_CMD_PACKET = 0xA0,
261 ATA_CMD_VERIFY = 0x40,
262 ATA_CMD_VERIFY_EXT = 0x42,
263 ATA_CMD_WRITE_UNCORR_EXT = 0x45,
264 ATA_CMD_STANDBYNOW1 = 0xE0,
265 ATA_CMD_IDLEIMMEDIATE = 0xE1,
266 ATA_CMD_SLEEP = 0xE6,
267 ATA_CMD_INIT_DEV_PARAMS = 0x91,
268 ATA_CMD_READ_NATIVE_MAX = 0xF8,
269 ATA_CMD_READ_NATIVE_MAX_EXT = 0x27,
270 ATA_CMD_SET_MAX = 0xF9,
271 ATA_CMD_SET_MAX_EXT = 0x37,
272 ATA_CMD_READ_LOG_EXT = 0x2F,
273 ATA_CMD_WRITE_LOG_EXT = 0x3F,
274 ATA_CMD_READ_LOG_DMA_EXT = 0x47,
275 ATA_CMD_WRITE_LOG_DMA_EXT = 0x57,
276 ATA_CMD_TRUSTED_NONDATA = 0x5B,
277 ATA_CMD_TRUSTED_RCV = 0x5C,
278 ATA_CMD_TRUSTED_RCV_DMA = 0x5D,
279 ATA_CMD_TRUSTED_SND = 0x5E,
280 ATA_CMD_TRUSTED_SND_DMA = 0x5F,
281 ATA_CMD_PMP_READ = 0xE4,
282 ATA_CMD_PMP_READ_DMA = 0xE9,
283 ATA_CMD_PMP_WRITE = 0xE8,
284 ATA_CMD_PMP_WRITE_DMA = 0xEB,
285 ATA_CMD_CONF_OVERLAY = 0xB1,
286 ATA_CMD_SEC_SET_PASS = 0xF1,
287 ATA_CMD_SEC_UNLOCK = 0xF2,
288 ATA_CMD_SEC_ERASE_PREP = 0xF3,
289 ATA_CMD_SEC_ERASE_UNIT = 0xF4,
290 ATA_CMD_SEC_FREEZE_LOCK = 0xF5,
291 ATA_CMD_SEC_DISABLE_PASS = 0xF6,
292 ATA_CMD_CONFIG_STREAM = 0x51,
293 ATA_CMD_SMART = 0xB0,
294 ATA_CMD_MEDIA_LOCK = 0xDE,
295 ATA_CMD_MEDIA_UNLOCK = 0xDF,
296 ATA_CMD_DSM = 0x06,
297 ATA_CMD_CHK_MED_CRD_TYP = 0xD1,
298 ATA_CMD_CFA_REQ_EXT_ERR = 0x03,
299 ATA_CMD_CFA_WRITE_NE = 0x38,
300 ATA_CMD_CFA_TRANS_SECT = 0x87,
301 ATA_CMD_CFA_ERASE = 0xC0,
302 ATA_CMD_CFA_WRITE_MULT_NE = 0xCD,
303 ATA_CMD_REQ_SENSE_DATA = 0x0B,
304 ATA_CMD_SANITIZE_DEVICE = 0xB4,
305 ATA_CMD_ZAC_MGMT_IN = 0x4A,
306 ATA_CMD_ZAC_MGMT_OUT = 0x9F,
307
308 /* marked obsolete in the ATA/ATAPI-7 spec */
309 ATA_CMD_RESTORE = 0x10,
310
311 /* Subcmds for ATA_CMD_FPDMA_RECV */
312 ATA_SUBCMD_FPDMA_RECV_RD_LOG_DMA_EXT = 0x01,
313 ATA_SUBCMD_FPDMA_RECV_ZAC_MGMT_IN = 0x02,
314
315 /* Subcmds for ATA_CMD_FPDMA_SEND */
316 ATA_SUBCMD_FPDMA_SEND_DSM = 0x00,
317 ATA_SUBCMD_FPDMA_SEND_WR_LOG_DMA_EXT = 0x02,
318
319 /* Subcmds for ATA_CMD_NCQ_NON_DATA */
320 ATA_SUBCMD_NCQ_NON_DATA_ABORT_QUEUE = 0x00,
321 ATA_SUBCMD_NCQ_NON_DATA_SET_FEATURES = 0x05,
322 ATA_SUBCMD_NCQ_NON_DATA_ZERO_EXT = 0x06,
323 ATA_SUBCMD_NCQ_NON_DATA_ZAC_MGMT_OUT = 0x07,
324
325 /* Subcmds for ATA_CMD_ZAC_MGMT_IN */
326 ATA_SUBCMD_ZAC_MGMT_IN_REPORT_ZONES = 0x00,
327
328 /* Subcmds for ATA_CMD_ZAC_MGMT_OUT */
329 ATA_SUBCMD_ZAC_MGMT_OUT_CLOSE_ZONE = 0x01,
330 ATA_SUBCMD_ZAC_MGMT_OUT_FINISH_ZONE = 0x02,
331 ATA_SUBCMD_ZAC_MGMT_OUT_OPEN_ZONE = 0x03,
332 ATA_SUBCMD_ZAC_MGMT_OUT_RESET_WRITE_POINTER = 0x04,
333
334 /* READ_LOG_EXT pages */
335 ATA_LOG_DIRECTORY = 0x0,
336 ATA_LOG_SATA_NCQ = 0x10,
337 ATA_LOG_NCQ_NON_DATA = 0x12,
338 ATA_LOG_NCQ_SEND_RECV = 0x13,
339 ATA_LOG_SATA_ID_DEV_DATA = 0x30,
340 ATA_LOG_SATA_SETTINGS = 0x08,
341 ATA_LOG_ZONED_INFORMATION = 0x09,
342 ATA_LOG_DEVSLP_OFFSET = 0x30,
343 ATA_LOG_DEVSLP_SIZE = 0x08,
344 ATA_LOG_DEVSLP_MDAT = 0x00,
345 ATA_LOG_DEVSLP_MDAT_MASK = 0x1F,
346 ATA_LOG_DEVSLP_DETO = 0x01,
347 ATA_LOG_DEVSLP_VALID = 0x07,
348 ATA_LOG_DEVSLP_VALID_MASK = 0x80,
349
350 /* NCQ send and receive log */
351 ATA_LOG_NCQ_SEND_RECV_SUBCMDS_OFFSET = 0x00,
352 ATA_LOG_NCQ_SEND_RECV_SUBCMDS_DSM = (1 << 0),
353 ATA_LOG_NCQ_SEND_RECV_DSM_OFFSET = 0x04,
354 ATA_LOG_NCQ_SEND_RECV_DSM_TRIM = (1 << 0),
355 ATA_LOG_NCQ_SEND_RECV_RD_LOG_OFFSET = 0x08,
356 ATA_LOG_NCQ_SEND_RECV_RD_LOG_SUPPORTED = (1 << 0),
357 ATA_LOG_NCQ_SEND_RECV_WR_LOG_OFFSET = 0x0C,
358 ATA_LOG_NCQ_SEND_RECV_WR_LOG_SUPPORTED = (1 << 0),
359 ATA_LOG_NCQ_SEND_RECV_ZAC_MGMT_OFFSET = 0x10,
360 ATA_LOG_NCQ_SEND_RECV_ZAC_MGMT_OUT_SUPPORTED = (1 << 0),
361 ATA_LOG_NCQ_SEND_RECV_ZAC_MGMT_IN_SUPPORTED = (1 << 1),
362 ATA_LOG_NCQ_SEND_RECV_SIZE = 0x14,
363
364 /* NCQ Non-Data log */
365 ATA_LOG_NCQ_NON_DATA_SUBCMDS_OFFSET = 0x00,
366 ATA_LOG_NCQ_NON_DATA_ABORT_OFFSET = 0x00,
367 ATA_LOG_NCQ_NON_DATA_ABORT_NCQ = (1 << 0),
368 ATA_LOG_NCQ_NON_DATA_ABORT_ALL = (1 << 1),
369 ATA_LOG_NCQ_NON_DATA_ABORT_STREAMING = (1 << 2),
370 ATA_LOG_NCQ_NON_DATA_ABORT_NON_STREAMING = (1 << 3),
371 ATA_LOG_NCQ_NON_DATA_ABORT_SELECTED = (1 << 4),
372 ATA_LOG_NCQ_NON_DATA_ZAC_MGMT_OFFSET = 0x1C,
373 ATA_LOG_NCQ_NON_DATA_ZAC_MGMT_OUT = (1 << 0),
374 ATA_LOG_NCQ_NON_DATA_SIZE = 0x40,
375
376 /* READ/WRITE LONG (obsolete) */
377 ATA_CMD_READ_LONG = 0x22,
378 ATA_CMD_READ_LONG_ONCE = 0x23,
379 ATA_CMD_WRITE_LONG = 0x32,
380 ATA_CMD_WRITE_LONG_ONCE = 0x33,
381
382 /* SETFEATURES stuff */
383 SETFEATURES_XFER = 0x03,
384 XFER_UDMA_7 = 0x47,
385 XFER_UDMA_6 = 0x46,
386 XFER_UDMA_5 = 0x45,
387 XFER_UDMA_4 = 0x44,
388 XFER_UDMA_3 = 0x43,
389 XFER_UDMA_2 = 0x42,
390 XFER_UDMA_1 = 0x41,
391 XFER_UDMA_0 = 0x40,
392 XFER_MW_DMA_4 = 0x24, /* CFA only */
393 XFER_MW_DMA_3 = 0x23, /* CFA only */
394 XFER_MW_DMA_2 = 0x22,
395 XFER_MW_DMA_1 = 0x21,
396 XFER_MW_DMA_0 = 0x20,
397 XFER_SW_DMA_2 = 0x12,
398 XFER_SW_DMA_1 = 0x11,
399 XFER_SW_DMA_0 = 0x10,
400 XFER_PIO_6 = 0x0E, /* CFA only */
401 XFER_PIO_5 = 0x0D, /* CFA only */
402 XFER_PIO_4 = 0x0C,
403 XFER_PIO_3 = 0x0B,
404 XFER_PIO_2 = 0x0A,
405 XFER_PIO_1 = 0x09,
406 XFER_PIO_0 = 0x08,
407 XFER_PIO_SLOW = 0x00,
408
409 SETFEATURES_WC_ON = 0x02, /* Enable write cache */
410 SETFEATURES_WC_OFF = 0x82, /* Disable write cache */
411
412 /* Enable/Disable Automatic Acoustic Management */
413 SETFEATURES_AAM_ON = 0x42,
414 SETFEATURES_AAM_OFF = 0xC2,
415
416 SETFEATURES_SPINUP = 0x07, /* Spin-up drive */
417 SETFEATURES_SPINUP_TIMEOUT = 30000, /* 30s timeout for drive spin-up from PUIS */
418
419 SETFEATURES_SATA_ENABLE = 0x10, /* Enable use of SATA feature */
420 SETFEATURES_SATA_DISABLE = 0x90, /* Disable use of SATA feature */
421
422 /* SETFEATURE Sector counts for SATA features */
423 SATA_FPDMA_OFFSET = 0x01, /* FPDMA non-zero buffer offsets */
424 SATA_FPDMA_AA = 0x02, /* FPDMA Setup FIS Auto-Activate */
425 SATA_DIPM = 0x03, /* Device Initiated Power Management */
426 SATA_FPDMA_IN_ORDER = 0x04, /* FPDMA in-order data delivery */
427 SATA_AN = 0x05, /* Asynchronous Notification */
428 SATA_SSP = 0x06, /* Software Settings Preservation */
429 SATA_DEVSLP = 0x09, /* Device Sleep */
430
431 SETFEATURE_SENSE_DATA = 0xC3, /* Sense Data Reporting feature */
432
433 /* feature values for SET_MAX */
434 ATA_SET_MAX_ADDR = 0x00,
435 ATA_SET_MAX_PASSWD = 0x01,
436 ATA_SET_MAX_LOCK = 0x02,
437 ATA_SET_MAX_UNLOCK = 0x03,
438 ATA_SET_MAX_FREEZE_LOCK = 0x04,
439
440 /* feature values for DEVICE CONFIGURATION OVERLAY */
441 ATA_DCO_RESTORE = 0xC0,
442 ATA_DCO_FREEZE_LOCK = 0xC1,
443 ATA_DCO_IDENTIFY = 0xC2,
444 ATA_DCO_SET = 0xC3,
445
446 /* feature values for SMART */
447 ATA_SMART_ENABLE = 0xD8,
448 ATA_SMART_READ_VALUES = 0xD0,
449 ATA_SMART_READ_THRESHOLDS = 0xD1,
450
451 /* feature values for Data Set Management */
452 ATA_DSM_TRIM = 0x01,
453
454 /* password used in LBA Mid / LBA High for executing SMART commands */
455 ATA_SMART_LBAM_PASS = 0x4F,
456 ATA_SMART_LBAH_PASS = 0xC2,
457
458 /* ATAPI stuff */
459 ATAPI_PKT_DMA = (1 << 0),
460 ATAPI_DMADIR = (1 << 2), /* ATAPI data dir:
461 0=to device, 1=to host */
462 ATAPI_CDB_LEN = 16,
463
464 /* PMP stuff */
465 SATA_PMP_MAX_PORTS = 15,
466 SATA_PMP_CTRL_PORT = 15,
467
468 SATA_PMP_GSCR_DWORDS = 128,
469 SATA_PMP_GSCR_PROD_ID = 0,
470 SATA_PMP_GSCR_REV = 1,
471 SATA_PMP_GSCR_PORT_INFO = 2,
472 SATA_PMP_GSCR_ERROR = 32,
473 SATA_PMP_GSCR_ERROR_EN = 33,
474 SATA_PMP_GSCR_FEAT = 64,
475 SATA_PMP_GSCR_FEAT_EN = 96,
476
477 SATA_PMP_PSCR_STATUS = 0,
478 SATA_PMP_PSCR_ERROR = 1,
479 SATA_PMP_PSCR_CONTROL = 2,
480
481 SATA_PMP_FEAT_BIST = (1 << 0),
482 SATA_PMP_FEAT_PMREQ = (1 << 1),
483 SATA_PMP_FEAT_DYNSSC = (1 << 2),
484 SATA_PMP_FEAT_NOTIFY = (1 << 3),
485
486 /* cable types */
487 ATA_CBL_NONE = 0,
488 ATA_CBL_PATA40 = 1,
489 ATA_CBL_PATA80 = 2,
490 ATA_CBL_PATA40_SHORT = 3, /* 40 wire cable to high UDMA spec */
491 ATA_CBL_PATA_UNK = 4, /* don't know, maybe 80c? */
492 ATA_CBL_PATA_IGN = 5, /* don't know, ignore cable handling */
493 ATA_CBL_SATA = 6,
494
495 /* SATA Status and Control Registers */
496 SCR_STATUS = 0,
497 SCR_ERROR = 1,
498 SCR_CONTROL = 2,
499 SCR_ACTIVE = 3,
500 SCR_NOTIFICATION = 4,
501
502 /* SError bits */
503 SERR_DATA_RECOVERED = (1 << 0), /* recovered data error */
504 SERR_COMM_RECOVERED = (1 << 1), /* recovered comm failure */
505 SERR_DATA = (1 << 8), /* unrecovered data error */
506 SERR_PERSISTENT = (1 << 9), /* persistent data/comm error */
507 SERR_PROTOCOL = (1 << 10), /* protocol violation */
508 SERR_INTERNAL = (1 << 11), /* host internal error */
509 SERR_PHYRDY_CHG = (1 << 16), /* PHY RDY changed */
510 SERR_PHY_INT_ERR = (1 << 17), /* PHY internal error */
511 SERR_COMM_WAKE = (1 << 18), /* Comm wake */
512 SERR_10B_8B_ERR = (1 << 19), /* 10b to 8b decode error */
513 SERR_DISPARITY = (1 << 20), /* Disparity */
514 SERR_CRC = (1 << 21), /* CRC error */
515 SERR_HANDSHAKE = (1 << 22), /* Handshake error */
516 SERR_LINK_SEQ_ERR = (1 << 23), /* Link sequence error */
517 SERR_TRANS_ST_ERROR = (1 << 24), /* Transport state trans. error */
518 SERR_UNRECOG_FIS = (1 << 25), /* Unrecognized FIS */
519 SERR_DEV_XCHG = (1 << 26), /* device exchanged */
520};
521
522enum ata_tf_protocols {
523 /* ATA taskfile protocols */
524 ATA_PROT_UNKNOWN, /* unknown/invalid */
525 ATA_PROT_NODATA, /* no data */
526 ATA_PROT_PIO, /* PIO data xfer */
527 ATA_PROT_DMA, /* DMA */
528 ATA_PROT_NCQ, /* NCQ */
529 ATAPI_PROT_NODATA, /* packet command, no data */
530 ATAPI_PROT_PIO, /* packet command, PIO data xfer*/
531 ATAPI_PROT_DMA, /* packet command with special DMA sauce */
532};
533
534enum ata_ioctls {
535 ATA_IOC_GET_IO32 = 0x309, /* HDIO_GET_32BIT */
536 ATA_IOC_SET_IO32 = 0x324, /* HDIO_SET_32BIT */
537};
538
539/* core structures */
540
541struct ata_bmdma_prd {
542 __le32 addr;
543 __le32 flags_len;
544};
545
546/*
547 * id tests
548 */
549#define ata_id_is_ata(id) (((id)[ATA_ID_CONFIG] & (1 << 15)) == 0)
550#define ata_id_has_lba(id) ((id)[ATA_ID_CAPABILITY] & (1 << 9))
551#define ata_id_has_dma(id) ((id)[ATA_ID_CAPABILITY] & (1 << 8))
552#define ata_id_has_ncq(id) ((id)[ATA_ID_SATA_CAPABILITY] & (1 << 8))
553#define ata_id_queue_depth(id) (((id)[ATA_ID_QUEUE_DEPTH] & 0x1f) + 1)
554#define ata_id_removable(id) ((id)[ATA_ID_CONFIG] & (1 << 7))
555#define ata_id_has_atapi_AN(id) \
556 ((((id)[ATA_ID_SATA_CAPABILITY] != 0x0000) && \
557 ((id)[ATA_ID_SATA_CAPABILITY] != 0xffff)) && \
558 ((id)[ATA_ID_FEATURE_SUPP] & (1 << 5)))
559#define ata_id_has_fpdma_aa(id) \
560 ((((id)[ATA_ID_SATA_CAPABILITY] != 0x0000) && \
561 ((id)[ATA_ID_SATA_CAPABILITY] != 0xffff)) && \
562 ((id)[ATA_ID_FEATURE_SUPP] & (1 << 2)))
563#define ata_id_iordy_disable(id) ((id)[ATA_ID_CAPABILITY] & (1 << 10))
564#define ata_id_has_iordy(id) ((id)[ATA_ID_CAPABILITY] & (1 << 11))
565#define ata_id_u32(id,n) \
566 (((u32) (id)[(n) + 1] << 16) | ((u32) (id)[(n)]))
567#define ata_id_u64(id,n) \
568 ( ((u64) (id)[(n) + 3] << 48) | \
569 ((u64) (id)[(n) + 2] << 32) | \
570 ((u64) (id)[(n) + 1] << 16) | \
571 ((u64) (id)[(n) + 0]) )
572
573#define ata_id_cdb_intr(id) (((id)[ATA_ID_CONFIG] & 0x60) == 0x20)
574#define ata_id_has_da(id) ((id)[ATA_ID_SATA_CAPABILITY_2] & (1 << 4))
575#define ata_id_has_devslp(id) ((id)[ATA_ID_FEATURE_SUPP] & (1 << 8))
576#define ata_id_has_ncq_autosense(id) \
577 ((id)[ATA_ID_FEATURE_SUPP] & (1 << 7))
578
579static inline bool ata_id_has_hipm(const u16 *id)
580{
581 u16 val = id[ATA_ID_SATA_CAPABILITY];
582
583 if (val == 0 || val == 0xffff)
584 return false;
585
586 return val & (1 << 9);
587}
588
589static inline bool ata_id_has_dipm(const u16 *id)
590{
591 u16 val = id[ATA_ID_FEATURE_SUPP];
592
593 if (val == 0 || val == 0xffff)
594 return false;
595
596 return val & (1 << 3);
597}
598
599
600static inline bool ata_id_has_fua(const u16 *id)
601{
602 if ((id[ATA_ID_CFSSE] & 0xC000) != 0x4000)
603 return false;
604 return id[ATA_ID_CFSSE] & (1 << 6);
605}
606
607static inline bool ata_id_has_flush(const u16 *id)
608{
609 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
610 return false;
611 return id[ATA_ID_COMMAND_SET_2] & (1 << 12);
612}
613
614static inline bool ata_id_flush_enabled(const u16 *id)
615{
616 if (ata_id_has_flush(id) == 0)
617 return false;
618 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
619 return false;
620 return id[ATA_ID_CFS_ENABLE_2] & (1 << 12);
621}
622
623static inline bool ata_id_has_flush_ext(const u16 *id)
624{
625 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
626 return false;
627 return id[ATA_ID_COMMAND_SET_2] & (1 << 13);
628}
629
630static inline bool ata_id_flush_ext_enabled(const u16 *id)
631{
632 if (ata_id_has_flush_ext(id) == 0)
633 return false;
634 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
635 return false;
636 /*
637 * some Maxtor disks have bit 13 defined incorrectly
638 * so check bit 10 too
639 */
640 return (id[ATA_ID_CFS_ENABLE_2] & 0x2400) == 0x2400;
641}
642
643static inline u32 ata_id_logical_sector_size(const u16 *id)
644{
645 /* T13/1699-D Revision 6a, Sep 6, 2008. Page 128.
646 * IDENTIFY DEVICE data, word 117-118.
647 * 0xd000 ignores bit 13 (logical:physical > 1)
648 */
649 if ((id[ATA_ID_SECTOR_SIZE] & 0xd000) == 0x5000)
650 return (((id[ATA_ID_LOGICAL_SECTOR_SIZE+1] << 16)
651 + id[ATA_ID_LOGICAL_SECTOR_SIZE]) * sizeof(u16)) ;
652 return ATA_SECT_SIZE;
653}
654
655static inline u8 ata_id_log2_per_physical_sector(const u16 *id)
656{
657 /* T13/1699-D Revision 6a, Sep 6, 2008. Page 128.
658 * IDENTIFY DEVICE data, word 106.
659 * 0xe000 ignores bit 12 (logical sector > 512 bytes)
660 */
661 if ((id[ATA_ID_SECTOR_SIZE] & 0xe000) == 0x6000)
662 return (id[ATA_ID_SECTOR_SIZE] & 0xf);
663 return 0;
664}
665
666/* Offset of logical sectors relative to physical sectors.
667 *
668 * If device has more than one logical sector per physical sector
669 * (aka 512 byte emulation), vendors might offset the "sector 0" address
670 * so sector 63 is "naturally aligned" - e.g. FAT partition table.
671 * This avoids Read/Mod/Write penalties when using FAT partition table
672 * and updating "well aligned" (FS perspective) physical sectors on every
673 * transaction.
674 */
675static inline u16 ata_id_logical_sector_offset(const u16 *id,
676 u8 log2_per_phys)
677{
678 u16 word_209 = id[209];
679
680 if ((log2_per_phys > 1) && (word_209 & 0xc000) == 0x4000) {
681 u16 first = word_209 & 0x3fff;
682 if (first > 0)
683 return (1 << log2_per_phys) - first;
684 }
685 return 0;
686}
687
688static inline bool ata_id_has_lba48(const u16 *id)
689{
690 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
691 return false;
692 if (!ata_id_u64(id, ATA_ID_LBA_CAPACITY_2))
693 return false;
694 return id[ATA_ID_COMMAND_SET_2] & (1 << 10);
695}
696
697static inline bool ata_id_lba48_enabled(const u16 *id)
698{
699 if (ata_id_has_lba48(id) == 0)
700 return false;
701 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
702 return false;
703 return id[ATA_ID_CFS_ENABLE_2] & (1 << 10);
704}
705
706static inline bool ata_id_hpa_enabled(const u16 *id)
707{
708 /* Yes children, word 83 valid bits cover word 82 data */
709 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
710 return false;
711 /* And 87 covers 85-87 */
712 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
713 return false;
714 /* Check command sets enabled as well as supported */
715 if ((id[ATA_ID_CFS_ENABLE_1] & (1 << 10)) == 0)
716 return false;
717 return id[ATA_ID_COMMAND_SET_1] & (1 << 10);
718}
719
720static inline bool ata_id_has_wcache(const u16 *id)
721{
722 /* Yes children, word 83 valid bits cover word 82 data */
723 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
724 return false;
725 return id[ATA_ID_COMMAND_SET_1] & (1 << 5);
726}
727
728static inline bool ata_id_has_pm(const u16 *id)
729{
730 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
731 return false;
732 return id[ATA_ID_COMMAND_SET_1] & (1 << 3);
733}
734
735static inline bool ata_id_rahead_enabled(const u16 *id)
736{
737 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
738 return false;
739 return id[ATA_ID_CFS_ENABLE_1] & (1 << 6);
740}
741
742static inline bool ata_id_wcache_enabled(const u16 *id)
743{
744 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
745 return false;
746 return id[ATA_ID_CFS_ENABLE_1] & (1 << 5);
747}
748
749static inline bool ata_id_has_read_log_dma_ext(const u16 *id)
750{
751 /* Word 86 must have bit 15 set */
752 if (!(id[ATA_ID_CFS_ENABLE_2] & (1 << 15)))
753 return false;
754
755 /* READ LOG DMA EXT support can be signaled either from word 119
756 * or from word 120. The format is the same for both words: Bit
757 * 15 must be cleared, bit 14 set and bit 3 set.
758 */
759 if ((id[ATA_ID_COMMAND_SET_3] & 0xC008) == 0x4008 ||
760 (id[ATA_ID_COMMAND_SET_4] & 0xC008) == 0x4008)
761 return true;
762
763 return false;
764}
765
766static inline bool ata_id_has_sense_reporting(const u16 *id)
767{
768 if (!(id[ATA_ID_CFS_ENABLE_2] & (1 << 15)))
769 return false;
770 return id[ATA_ID_COMMAND_SET_3] & (1 << 6);
771}
772
773static inline bool ata_id_sense_reporting_enabled(const u16 *id)
774{
775 if (!(id[ATA_ID_CFS_ENABLE_2] & (1 << 15)))
776 return false;
777 return id[ATA_ID_COMMAND_SET_4] & (1 << 6);
778}
779
780/**
781 * ata_id_major_version - get ATA level of drive
782 * @id: Identify data
783 *
784 * Caveats:
785 * ATA-1 considers identify optional
786 * ATA-2 introduces mandatory identify
787 * ATA-3 introduces word 80 and accurate reporting
788 *
789 * The practical impact of this is that ata_id_major_version cannot
790 * reliably report on drives below ATA3.
791 */
792
793static inline unsigned int ata_id_major_version(const u16 *id)
794{
795 unsigned int mver;
796
797 if (id[ATA_ID_MAJOR_VER] == 0xFFFF)
798 return 0;
799
800 for (mver = 14; mver >= 1; mver--)
801 if (id[ATA_ID_MAJOR_VER] & (1 << mver))
802 break;
803 return mver;
804}
805
806static inline bool ata_id_is_sata(const u16 *id)
807{
808 /*
809 * See if word 93 is 0 AND drive is at least ATA-5 compatible
810 * verifying that word 80 by casting it to a signed type --
811 * this trick allows us to filter out the reserved values of
812 * 0x0000 and 0xffff along with the earlier ATA revisions...
813 */
814 if (id[ATA_ID_HW_CONFIG] == 0 && (short)id[ATA_ID_MAJOR_VER] >= 0x0020)
815 return true;
816 return false;
817}
818
819static inline bool ata_id_has_tpm(const u16 *id)
820{
821 /* The TPM bits are only valid on ATA8 */
822 if (ata_id_major_version(id) < 8)
823 return false;
824 if ((id[48] & 0xC000) != 0x4000)
825 return false;
826 return id[48] & (1 << 0);
827}
828
829static inline bool ata_id_has_dword_io(const u16 *id)
830{
831 /* ATA 8 reuses this flag for "trusted" computing */
832 if (ata_id_major_version(id) > 7)
833 return false;
834 return id[ATA_ID_DWORD_IO] & (1 << 0);
835}
836
837static inline bool ata_id_has_unload(const u16 *id)
838{
839 if (ata_id_major_version(id) >= 7 &&
840 (id[ATA_ID_CFSSE] & 0xC000) == 0x4000 &&
841 id[ATA_ID_CFSSE] & (1 << 13))
842 return true;
843 return false;
844}
845
846static inline bool ata_id_has_wwn(const u16 *id)
847{
848 return (id[ATA_ID_CSF_DEFAULT] & 0xC100) == 0x4100;
849}
850
851static inline int ata_id_form_factor(const u16 *id)
852{
853 u16 val = id[168];
854
855 if (ata_id_major_version(id) < 7 || val == 0 || val == 0xffff)
856 return 0;
857
858 val &= 0xf;
859
860 if (val > 5)
861 return 0;
862
863 return val;
864}
865
866static inline int ata_id_rotation_rate(const u16 *id)
867{
868 u16 val = id[217];
869
870 if (ata_id_major_version(id) < 7 || val == 0 || val == 0xffff)
871 return 0;
872
873 if (val > 1 && val < 0x401)
874 return 0;
875
876 return val;
877}
878
879static inline bool ata_id_has_ncq_send_and_recv(const u16 *id)
880{
881 return id[ATA_ID_SATA_CAPABILITY_2] & BIT(6);
882}
883
884static inline bool ata_id_has_ncq_non_data(const u16 *id)
885{
886 return id[ATA_ID_SATA_CAPABILITY_2] & BIT(5);
887}
888
889static inline bool ata_id_has_trim(const u16 *id)
890{
891 if (ata_id_major_version(id) >= 7 &&
892 (id[ATA_ID_DATA_SET_MGMT] & 1))
893 return true;
894 return false;
895}
896
897static inline bool ata_id_has_zero_after_trim(const u16 *id)
898{
899 /* DSM supported, deterministic read, and read zero after trim set */
900 if (ata_id_has_trim(id) &&
901 (id[ATA_ID_ADDITIONAL_SUPP] & 0x4020) == 0x4020)
902 return true;
903
904 return false;
905}
906
907static inline bool ata_id_current_chs_valid(const u16 *id)
908{
909 /* For ATA-1 devices, if the INITIALIZE DEVICE PARAMETERS command
910 has not been issued to the device then the values of
911 id[ATA_ID_CUR_CYLS] to id[ATA_ID_CUR_SECTORS] are vendor specific. */
912 return (id[ATA_ID_FIELD_VALID] & 1) && /* Current translation valid */
913 id[ATA_ID_CUR_CYLS] && /* cylinders in current translation */
914 id[ATA_ID_CUR_HEADS] && /* heads in current translation */
915 id[ATA_ID_CUR_HEADS] <= 16 &&
916 id[ATA_ID_CUR_SECTORS]; /* sectors in current translation */
917}
918
919static inline bool ata_id_is_cfa(const u16 *id)
920{
921 if ((id[ATA_ID_CONFIG] == 0x848A) || /* Traditional CF */
922 (id[ATA_ID_CONFIG] == 0x844A)) /* Delkin Devices CF */
923 return true;
924 /*
925 * CF specs don't require specific value in the word 0 anymore and yet
926 * they forbid to report the ATA version in the word 80 and require the
927 * CFA feature set support to be indicated in the word 83 in this case.
928 * Unfortunately, some cards only follow either of this requirements,
929 * and while those that don't indicate CFA feature support need some
930 * sort of quirk list, it seems impractical for the ones that do...
931 */
932 return (id[ATA_ID_COMMAND_SET_2] & 0xC004) == 0x4004;
933}
934
935static inline bool ata_id_is_ssd(const u16 *id)
936{
937 return id[ATA_ID_ROT_SPEED] == 0x01;
938}
939
940static inline u8 ata_id_zoned_cap(const u16 *id)
941{
942 return (id[ATA_ID_ADDITIONAL_SUPP] & 0x3);
943}
944
945static inline bool ata_id_pio_need_iordy(const u16 *id, const u8 pio)
946{
947 /* CF spec. r4.1 Table 22 says no IORDY on PIO5 and PIO6. */
948 if (pio > 4 && ata_id_is_cfa(id))
949 return false;
950 /* For PIO3 and higher it is mandatory. */
951 if (pio > 2)
952 return true;
953 /* Turn it on when possible. */
954 return ata_id_has_iordy(id);
955}
956
957static inline bool ata_drive_40wire(const u16 *dev_id)
958{
959 if (ata_id_is_sata(dev_id))
960 return false; /* SATA */
961 if ((dev_id[ATA_ID_HW_CONFIG] & 0xE000) == 0x6000)
962 return false; /* 80 wire */
963 return true;
964}
965
966static inline bool ata_drive_40wire_relaxed(const u16 *dev_id)
967{
968 if ((dev_id[ATA_ID_HW_CONFIG] & 0x2000) == 0x2000)
969 return false; /* 80 wire */
970 return true;
971}
972
973static inline int atapi_cdb_len(const u16 *dev_id)
974{
975 u16 tmp = dev_id[ATA_ID_CONFIG] & 0x3;
976 switch (tmp) {
977 case 0: return 12;
978 case 1: return 16;
979 default: return -1;
980 }
981}
982
983static inline int atapi_command_packet_set(const u16 *dev_id)
984{
985 return (dev_id[ATA_ID_CONFIG] >> 8) & 0x1f;
986}
987
988static inline bool atapi_id_dmadir(const u16 *dev_id)
989{
990 return ata_id_major_version(dev_id) >= 7 && (dev_id[62] & 0x8000);
991}
992
993/*
994 * ata_id_is_lba_capacity_ok() performs a sanity check on
995 * the claimed LBA capacity value for the device.
996 *
997 * Returns 1 if LBA capacity looks sensible, 0 otherwise.
998 *
999 * It is called only once for each device.
1000 */
1001static inline bool ata_id_is_lba_capacity_ok(u16 *id)
1002{
1003 unsigned long lba_sects, chs_sects, head, tail;
1004
1005 /* No non-LBA info .. so valid! */
1006 if (id[ATA_ID_CYLS] == 0)
1007 return true;
1008
1009 lba_sects = ata_id_u32(id, ATA_ID_LBA_CAPACITY);
1010
1011 /*
1012 * The ATA spec tells large drives to return
1013 * C/H/S = 16383/16/63 independent of their size.
1014 * Some drives can be jumpered to use 15 heads instead of 16.
1015 * Some drives can be jumpered to use 4092 cyls instead of 16383.
1016 */
1017 if ((id[ATA_ID_CYLS] == 16383 ||
1018 (id[ATA_ID_CYLS] == 4092 && id[ATA_ID_CUR_CYLS] == 16383)) &&
1019 id[ATA_ID_SECTORS] == 63 &&
1020 (id[ATA_ID_HEADS] == 15 || id[ATA_ID_HEADS] == 16) &&
1021 (lba_sects >= 16383 * 63 * id[ATA_ID_HEADS]))
1022 return true;
1023
1024 chs_sects = id[ATA_ID_CYLS] * id[ATA_ID_HEADS] * id[ATA_ID_SECTORS];
1025
1026 /* perform a rough sanity check on lba_sects: within 10% is OK */
1027 if (lba_sects - chs_sects < chs_sects/10)
1028 return true;
1029
1030 /* some drives have the word order reversed */
1031 head = (lba_sects >> 16) & 0xffff;
1032 tail = lba_sects & 0xffff;
1033 lba_sects = head | (tail << 16);
1034
1035 if (lba_sects - chs_sects < chs_sects/10) {
1036 *(__le32 *)&id[ATA_ID_LBA_CAPACITY] = __cpu_to_le32(lba_sects);
1037 return true; /* LBA capacity is (now) good */
1038 }
1039
1040 return false; /* LBA capacity value may be bad */
1041}
1042
1043static inline void ata_id_to_hd_driveid(u16 *id)
1044{
1045#ifdef __BIG_ENDIAN
1046 /* accessed in struct hd_driveid as 8-bit values */
1047 id[ATA_ID_MAX_MULTSECT] = __cpu_to_le16(id[ATA_ID_MAX_MULTSECT]);
1048 id[ATA_ID_CAPABILITY] = __cpu_to_le16(id[ATA_ID_CAPABILITY]);
1049 id[ATA_ID_OLD_PIO_MODES] = __cpu_to_le16(id[ATA_ID_OLD_PIO_MODES]);
1050 id[ATA_ID_OLD_DMA_MODES] = __cpu_to_le16(id[ATA_ID_OLD_DMA_MODES]);
1051 id[ATA_ID_MULTSECT] = __cpu_to_le16(id[ATA_ID_MULTSECT]);
1052
1053 /* as 32-bit values */
1054 *(u32 *)&id[ATA_ID_LBA_CAPACITY] = ata_id_u32(id, ATA_ID_LBA_CAPACITY);
1055 *(u32 *)&id[ATA_ID_SPG] = ata_id_u32(id, ATA_ID_SPG);
1056
1057 /* as 64-bit value */
1058 *(u64 *)&id[ATA_ID_LBA_CAPACITY_2] =
1059 ata_id_u64(id, ATA_ID_LBA_CAPACITY_2);
1060#endif
1061}
1062
1063/*
1064 * Write LBA Range Entries to the buffer that will cover the extent from
1065 * sector to sector + count. This is used for TRIM and for ADD LBA(S)
1066 * TO NV CACHE PINNED SET.
1067 */
1068static inline unsigned ata_set_lba_range_entries(void *_buffer,
1069 unsigned buf_size, u64 sector, unsigned long count)
1070{
1071 __le64 *buffer = _buffer;
1072 unsigned i = 0, used_bytes;
1073
1074 while (i < buf_size / 8 ) { /* 6-byte LBA + 2-byte range per entry */
1075 u64 entry = sector |
1076 ((u64)(count > 0xffff ? 0xffff : count) << 48);
1077 buffer[i++] = __cpu_to_le64(entry);
1078 if (count <= 0xffff)
1079 break;
1080 count -= 0xffff;
1081 sector += 0xffff;
1082 }
1083
1084 used_bytes = ALIGN(i * 8, 512);
1085 memset(buffer + i, 0, used_bytes - i * 8);
1086 return used_bytes;
1087}
1088
1089static inline bool ata_ok(u8 status)
1090{
1091 return ((status & (ATA_BUSY | ATA_DRDY | ATA_DF | ATA_DRQ | ATA_ERR))
1092 == ATA_DRDY);
1093}
1094
1095static inline bool lba_28_ok(u64 block, u32 n_block)
1096{
1097 /* check the ending block number: must be LESS THAN 0x0fffffff */
1098 return ((block + n_block) < ((1 << 28) - 1)) && (n_block <= 256);
1099}
1100
1101static inline bool lba_48_ok(u64 block, u32 n_block)
1102{
1103 /* check the ending block number */
1104 return ((block + n_block - 1) < ((u64)1 << 48)) && (n_block <= 65536);
1105}
1106
1107#define sata_pmp_gscr_vendor(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] & 0xffff)
1108#define sata_pmp_gscr_devid(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] >> 16)
1109#define sata_pmp_gscr_rev(gscr) (((gscr)[SATA_PMP_GSCR_REV] >> 8) & 0xff)
1110#define sata_pmp_gscr_ports(gscr) ((gscr)[SATA_PMP_GSCR_PORT_INFO] & 0xf)
1111
1112#endif /* __LINUX_ATA_H__ */