tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/*
2 * Copyright (C) 2006 PA Semi, Inc
3 *
4 * Driver for the PA6T-1682M onchip 1G/10G Ethernet MACs, soft state and
5 * hardware register layouts.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
18 */
19
20#ifndef PASEMI_MAC_H
21#define PASEMI_MAC_H
22
23#include <linux/ethtool.h>
24#include <linux/netdevice.h>
25#include <linux/spinlock.h>
26#include <linux/phy.h>
27
28/* Must be a power of two */
29#define RX_RING_SIZE 2048
30#define TX_RING_SIZE 4096
31#define CS_RING_SIZE (TX_RING_SIZE*2)
32
33
34#define MAX_CS 2
35
36struct pasemi_mac_txring {
37 struct pasemi_dmachan chan; /* Must be first */
38 spinlock_t lock;
39 unsigned int size;
40 unsigned int next_to_fill;
41 unsigned int next_to_clean;
42 struct pasemi_mac_buffer *ring_info;
43 struct pasemi_mac *mac; /* Needed in intr handler */
44 struct timer_list clean_timer;
45};
46
47struct pasemi_mac_rxring {
48 struct pasemi_dmachan chan; /* Must be first */
49 spinlock_t lock;
50 u64 *buffers; /* RX interface buffer ring */
51 dma_addr_t buf_dma;
52 unsigned int size;
53 unsigned int next_to_fill;
54 unsigned int next_to_clean;
55 struct pasemi_mac_buffer *ring_info;
56 struct pasemi_mac *mac; /* Needed in intr handler */
57};
58
59struct pasemi_mac_csring {
60 struct pasemi_dmachan chan;
61 unsigned int size;
62 unsigned int next_to_fill;
63 int events[2];
64 int last_event;
65 int fun;
66};
67
68struct pasemi_mac {
69 struct net_device *netdev;
70 struct pci_dev *pdev;
71 struct pci_dev *dma_pdev;
72 struct pci_dev *iob_pdev;
73 struct phy_device *phydev;
74 struct napi_struct napi;
75
76 int bufsz; /* RX ring buffer size */
77 int last_cs;
78 int num_cs;
79 u32 dma_if;
80 u8 type;
81#define MAC_TYPE_GMAC 1
82#define MAC_TYPE_XAUI 2
83
84 u8 mac_addr[ETH_ALEN];
85
86 struct timer_list rxtimer;
87
88 struct pasemi_mac_txring *tx;
89 struct pasemi_mac_rxring *rx;
90 struct pasemi_mac_csring *cs[MAX_CS];
91 char tx_irq_name[10]; /* "eth%d tx" */
92 char rx_irq_name[10]; /* "eth%d rx" */
93 int link;
94 int speed;
95 int duplex;
96
97 unsigned int msg_enable;
98};
99
100/* Software status descriptor (ring_info) */
101struct pasemi_mac_buffer {
102 struct sk_buff *skb;
103 dma_addr_t dma;
104};
105
106#define TX_DESC(tx, num) ((tx)->chan.ring_virt[(num) & (TX_RING_SIZE-1)])
107#define TX_DESC_INFO(tx, num) ((tx)->ring_info[(num) & (TX_RING_SIZE-1)])
108#define RX_DESC(rx, num) ((rx)->chan.ring_virt[(num) & (RX_RING_SIZE-1)])
109#define RX_DESC_INFO(rx, num) ((rx)->ring_info[(num) & (RX_RING_SIZE-1)])
110#define RX_BUFF(rx, num) ((rx)->buffers[(num) & (RX_RING_SIZE-1)])
111#define CS_DESC(cs, num) ((cs)->chan.ring_virt[(num) & (CS_RING_SIZE-1)])
112
113#define RING_USED(ring) (((ring)->next_to_fill - (ring)->next_to_clean) \
114 & ((ring)->size - 1))
115#define RING_AVAIL(ring) ((ring->size) - RING_USED(ring))
116
117/* PCI register offsets and formats */
118
119
120/* MAC CFG register offsets */
121enum {
122 PAS_MAC_CFG_PCFG = 0x80,
123 PAS_MAC_CFG_MACCFG = 0x84,
124 PAS_MAC_CFG_ADR0 = 0x8c,
125 PAS_MAC_CFG_ADR1 = 0x90,
126 PAS_MAC_CFG_TXP = 0x98,
127 PAS_MAC_CFG_RMON = 0x100,
128 PAS_MAC_IPC_CHNL = 0x208,
129};
130
131/* MAC CFG register fields */
132#define PAS_MAC_CFG_PCFG_PE 0x80000000
133#define PAS_MAC_CFG_PCFG_CE 0x40000000
134#define PAS_MAC_CFG_PCFG_BU 0x20000000
135#define PAS_MAC_CFG_PCFG_TT 0x10000000
136#define PAS_MAC_CFG_PCFG_TSR_M 0x0c000000
137#define PAS_MAC_CFG_PCFG_TSR_10M 0x00000000
138#define PAS_MAC_CFG_PCFG_TSR_100M 0x04000000
139#define PAS_MAC_CFG_PCFG_TSR_1G 0x08000000
140#define PAS_MAC_CFG_PCFG_TSR_10G 0x0c000000
141#define PAS_MAC_CFG_PCFG_T24 0x02000000
142#define PAS_MAC_CFG_PCFG_PR 0x01000000
143#define PAS_MAC_CFG_PCFG_CRO_M 0x00ff0000
144#define PAS_MAC_CFG_PCFG_CRO_S 16
145#define PAS_MAC_CFG_PCFG_IPO_M 0x0000ff00
146#define PAS_MAC_CFG_PCFG_IPO_S 8
147#define PAS_MAC_CFG_PCFG_S1 0x00000080
148#define PAS_MAC_CFG_PCFG_IO_M 0x00000060
149#define PAS_MAC_CFG_PCFG_IO_MAC 0x00000000
150#define PAS_MAC_CFG_PCFG_IO_OFF 0x00000020
151#define PAS_MAC_CFG_PCFG_IO_IND_ETH 0x00000040
152#define PAS_MAC_CFG_PCFG_IO_IND_IP 0x00000060
153#define PAS_MAC_CFG_PCFG_LP 0x00000010
154#define PAS_MAC_CFG_PCFG_TS 0x00000008
155#define PAS_MAC_CFG_PCFG_HD 0x00000004
156#define PAS_MAC_CFG_PCFG_SPD_M 0x00000003
157#define PAS_MAC_CFG_PCFG_SPD_10M 0x00000000
158#define PAS_MAC_CFG_PCFG_SPD_100M 0x00000001
159#define PAS_MAC_CFG_PCFG_SPD_1G 0x00000002
160#define PAS_MAC_CFG_PCFG_SPD_10G 0x00000003
161
162#define PAS_MAC_CFG_MACCFG_TXT_M 0x70000000
163#define PAS_MAC_CFG_MACCFG_TXT_S 28
164#define PAS_MAC_CFG_MACCFG_PRES_M 0x0f000000
165#define PAS_MAC_CFG_MACCFG_PRES_S 24
166#define PAS_MAC_CFG_MACCFG_MAXF_M 0x00ffff00
167#define PAS_MAC_CFG_MACCFG_MAXF_S 8
168#define PAS_MAC_CFG_MACCFG_MAXF(x) (((x) << PAS_MAC_CFG_MACCFG_MAXF_S) & \
169 PAS_MAC_CFG_MACCFG_MAXF_M)
170#define PAS_MAC_CFG_MACCFG_MINF_M 0x000000ff
171#define PAS_MAC_CFG_MACCFG_MINF_S 0
172
173#define PAS_MAC_CFG_TXP_FCF 0x01000000
174#define PAS_MAC_CFG_TXP_FCE 0x00800000
175#define PAS_MAC_CFG_TXP_FC 0x00400000
176#define PAS_MAC_CFG_TXP_FPC_M 0x00300000
177#define PAS_MAC_CFG_TXP_FPC_S 20
178#define PAS_MAC_CFG_TXP_FPC(x) (((x) << PAS_MAC_CFG_TXP_FPC_S) & \
179 PAS_MAC_CFG_TXP_FPC_M)
180#define PAS_MAC_CFG_TXP_RT 0x00080000
181#define PAS_MAC_CFG_TXP_BL 0x00040000
182#define PAS_MAC_CFG_TXP_SL_M 0x00030000
183#define PAS_MAC_CFG_TXP_SL_S 16
184#define PAS_MAC_CFG_TXP_SL(x) (((x) << PAS_MAC_CFG_TXP_SL_S) & \
185 PAS_MAC_CFG_TXP_SL_M)
186#define PAS_MAC_CFG_TXP_COB_M 0x0000f000
187#define PAS_MAC_CFG_TXP_COB_S 12
188#define PAS_MAC_CFG_TXP_COB(x) (((x) << PAS_MAC_CFG_TXP_COB_S) & \
189 PAS_MAC_CFG_TXP_COB_M)
190#define PAS_MAC_CFG_TXP_TIFT_M 0x00000f00
191#define PAS_MAC_CFG_TXP_TIFT_S 8
192#define PAS_MAC_CFG_TXP_TIFT(x) (((x) << PAS_MAC_CFG_TXP_TIFT_S) & \
193 PAS_MAC_CFG_TXP_TIFT_M)
194#define PAS_MAC_CFG_TXP_TIFG_M 0x000000ff
195#define PAS_MAC_CFG_TXP_TIFG_S 0
196#define PAS_MAC_CFG_TXP_TIFG(x) (((x) << PAS_MAC_CFG_TXP_TIFG_S) & \
197 PAS_MAC_CFG_TXP_TIFG_M)
198
199#define PAS_MAC_RMON(r) (0x100+(r)*4)
200
201#define PAS_MAC_IPC_CHNL_DCHNO_M 0x003f0000
202#define PAS_MAC_IPC_CHNL_DCHNO_S 16
203#define PAS_MAC_IPC_CHNL_DCHNO(x) (((x) << PAS_MAC_IPC_CHNL_DCHNO_S) & \
204 PAS_MAC_IPC_CHNL_DCHNO_M)
205#define PAS_MAC_IPC_CHNL_BCH_M 0x0000003f
206#define PAS_MAC_IPC_CHNL_BCH_S 0
207#define PAS_MAC_IPC_CHNL_BCH(x) (((x) << PAS_MAC_IPC_CHNL_BCH_S) & \
208 PAS_MAC_IPC_CHNL_BCH_M)
209
210
211#endif /* PASEMI_MAC_H */