Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1#ifndef _ASM_X86_CPUFEATURE_H
2#define _ASM_X86_CPUFEATURE_H
3
4#include <asm/processor.h>
5
6#if defined(__KERNEL__) && !defined(__ASSEMBLY__)
7
8#include <asm/asm.h>
9#include <linux/bitops.h>
10
11enum cpuid_leafs
12{
13 CPUID_1_EDX = 0,
14 CPUID_8000_0001_EDX,
15 CPUID_8086_0001_EDX,
16 CPUID_LNX_1,
17 CPUID_1_ECX,
18 CPUID_C000_0001_EDX,
19 CPUID_8000_0001_ECX,
20 CPUID_LNX_2,
21 CPUID_LNX_3,
22 CPUID_7_0_EBX,
23 CPUID_D_1_EAX,
24 CPUID_F_0_EDX,
25 CPUID_F_1_EDX,
26 CPUID_8000_0008_EBX,
27 CPUID_6_EAX,
28 CPUID_8000_000A_EDX,
29 CPUID_7_ECX,
30 CPUID_8000_0007_EBX,
31};
32
33#ifdef CONFIG_X86_FEATURE_NAMES
34extern const char * const x86_cap_flags[NCAPINTS*32];
35extern const char * const x86_power_flags[32];
36#define X86_CAP_FMT "%s"
37#define x86_cap_flag(flag) x86_cap_flags[flag]
38#else
39#define X86_CAP_FMT "%d:%d"
40#define x86_cap_flag(flag) ((flag) >> 5), ((flag) & 31)
41#endif
42
43/*
44 * In order to save room, we index into this array by doing
45 * X86_BUG_<name> - NCAPINTS*32.
46 */
47extern const char * const x86_bug_flags[NBUGINTS*32];
48
49#define test_cpu_cap(c, bit) \
50 test_bit(bit, (unsigned long *)((c)->x86_capability))
51
52#define REQUIRED_MASK_BIT_SET(bit) \
53 ( (((bit)>>5)==0 && (1UL<<((bit)&31) & REQUIRED_MASK0 )) || \
54 (((bit)>>5)==1 && (1UL<<((bit)&31) & REQUIRED_MASK1 )) || \
55 (((bit)>>5)==2 && (1UL<<((bit)&31) & REQUIRED_MASK2 )) || \
56 (((bit)>>5)==3 && (1UL<<((bit)&31) & REQUIRED_MASK3 )) || \
57 (((bit)>>5)==4 && (1UL<<((bit)&31) & REQUIRED_MASK4 )) || \
58 (((bit)>>5)==5 && (1UL<<((bit)&31) & REQUIRED_MASK5 )) || \
59 (((bit)>>5)==6 && (1UL<<((bit)&31) & REQUIRED_MASK6 )) || \
60 (((bit)>>5)==7 && (1UL<<((bit)&31) & REQUIRED_MASK7 )) || \
61 (((bit)>>5)==8 && (1UL<<((bit)&31) & REQUIRED_MASK8 )) || \
62 (((bit)>>5)==9 && (1UL<<((bit)&31) & REQUIRED_MASK9 )) || \
63 (((bit)>>5)==10 && (1UL<<((bit)&31) & REQUIRED_MASK10)) || \
64 (((bit)>>5)==11 && (1UL<<((bit)&31) & REQUIRED_MASK11)) || \
65 (((bit)>>5)==12 && (1UL<<((bit)&31) & REQUIRED_MASK12)) || \
66 (((bit)>>5)==13 && (1UL<<((bit)&31) & REQUIRED_MASK13)) || \
67 (((bit)>>5)==14 && (1UL<<((bit)&31) & REQUIRED_MASK14)) || \
68 (((bit)>>5)==15 && (1UL<<((bit)&31) & REQUIRED_MASK15)) || \
69 (((bit)>>5)==16 && (1UL<<((bit)&31) & REQUIRED_MASK16)) )
70
71#define DISABLED_MASK_BIT_SET(bit) \
72 ( (((bit)>>5)==0 && (1UL<<((bit)&31) & DISABLED_MASK0 )) || \
73 (((bit)>>5)==1 && (1UL<<((bit)&31) & DISABLED_MASK1 )) || \
74 (((bit)>>5)==2 && (1UL<<((bit)&31) & DISABLED_MASK2 )) || \
75 (((bit)>>5)==3 && (1UL<<((bit)&31) & DISABLED_MASK3 )) || \
76 (((bit)>>5)==4 && (1UL<<((bit)&31) & DISABLED_MASK4 )) || \
77 (((bit)>>5)==5 && (1UL<<((bit)&31) & DISABLED_MASK5 )) || \
78 (((bit)>>5)==6 && (1UL<<((bit)&31) & DISABLED_MASK6 )) || \
79 (((bit)>>5)==7 && (1UL<<((bit)&31) & DISABLED_MASK7 )) || \
80 (((bit)>>5)==8 && (1UL<<((bit)&31) & DISABLED_MASK8 )) || \
81 (((bit)>>5)==9 && (1UL<<((bit)&31) & DISABLED_MASK9 )) || \
82 (((bit)>>5)==10 && (1UL<<((bit)&31) & DISABLED_MASK10)) || \
83 (((bit)>>5)==11 && (1UL<<((bit)&31) & DISABLED_MASK11)) || \
84 (((bit)>>5)==12 && (1UL<<((bit)&31) & DISABLED_MASK12)) || \
85 (((bit)>>5)==13 && (1UL<<((bit)&31) & DISABLED_MASK13)) || \
86 (((bit)>>5)==14 && (1UL<<((bit)&31) & DISABLED_MASK14)) || \
87 (((bit)>>5)==15 && (1UL<<((bit)&31) & DISABLED_MASK15)) || \
88 (((bit)>>5)==16 && (1UL<<((bit)&31) & DISABLED_MASK16)) )
89
90#define cpu_has(c, bit) \
91 (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
92 test_cpu_cap(c, bit))
93
94#define this_cpu_has(bit) \
95 (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
96 x86_this_cpu_test_bit(bit, (unsigned long *)&cpu_info.x86_capability))
97
98/*
99 * This macro is for detection of features which need kernel
100 * infrastructure to be used. It may *not* directly test the CPU
101 * itself. Use the cpu_has() family if you want true runtime
102 * testing of CPU features, like in hypervisor code where you are
103 * supporting a possible guest feature where host support for it
104 * is not relevant.
105 */
106#define cpu_feature_enabled(bit) \
107 (__builtin_constant_p(bit) && DISABLED_MASK_BIT_SET(bit) ? 0 : static_cpu_has(bit))
108
109#define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit)
110
111#define set_cpu_cap(c, bit) set_bit(bit, (unsigned long *)((c)->x86_capability))
112#define clear_cpu_cap(c, bit) clear_bit(bit, (unsigned long *)((c)->x86_capability))
113#define setup_clear_cpu_cap(bit) do { \
114 clear_cpu_cap(&boot_cpu_data, bit); \
115 set_bit(bit, (unsigned long *)cpu_caps_cleared); \
116} while (0)
117#define setup_force_cpu_cap(bit) do { \
118 set_cpu_cap(&boot_cpu_data, bit); \
119 set_bit(bit, (unsigned long *)cpu_caps_set); \
120} while (0)
121
122#if defined(CC_HAVE_ASM_GOTO) && defined(CONFIG_X86_FAST_FEATURE_TESTS)
123/*
124 * Static testing of CPU features. Used the same as boot_cpu_has().
125 * These will statically patch the target code for additional
126 * performance.
127 */
128static __always_inline __pure bool _static_cpu_has(u16 bit)
129{
130 asm_volatile_goto("1: jmp 6f\n"
131 "2:\n"
132 ".skip -(((5f-4f) - (2b-1b)) > 0) * "
133 "((5f-4f) - (2b-1b)),0x90\n"
134 "3:\n"
135 ".section .altinstructions,\"a\"\n"
136 " .long 1b - .\n" /* src offset */
137 " .long 4f - .\n" /* repl offset */
138 " .word %P1\n" /* always replace */
139 " .byte 3b - 1b\n" /* src len */
140 " .byte 5f - 4f\n" /* repl len */
141 " .byte 3b - 2b\n" /* pad len */
142 ".previous\n"
143 ".section .altinstr_replacement,\"ax\"\n"
144 "4: jmp %l[t_no]\n"
145 "5:\n"
146 ".previous\n"
147 ".section .altinstructions,\"a\"\n"
148 " .long 1b - .\n" /* src offset */
149 " .long 0\n" /* no replacement */
150 " .word %P0\n" /* feature bit */
151 " .byte 3b - 1b\n" /* src len */
152 " .byte 0\n" /* repl len */
153 " .byte 0\n" /* pad len */
154 ".previous\n"
155 ".section .altinstr_aux,\"ax\"\n"
156 "6:\n"
157 " testb %[bitnum],%[cap_byte]\n"
158 " jnz %l[t_yes]\n"
159 " jmp %l[t_no]\n"
160 ".previous\n"
161 : : "i" (bit), "i" (X86_FEATURE_ALWAYS),
162 [bitnum] "i" (1 << (bit & 7)),
163 [cap_byte] "m" (((const char *)boot_cpu_data.x86_capability)[bit >> 3])
164 : : t_yes, t_no);
165 t_yes:
166 return true;
167 t_no:
168 return false;
169}
170
171#define static_cpu_has(bit) \
172( \
173 __builtin_constant_p(boot_cpu_has(bit)) ? \
174 boot_cpu_has(bit) : \
175 _static_cpu_has(bit) \
176)
177#else
178/*
179 * Fall back to dynamic for gcc versions which don't support asm goto. Should be
180 * a minority now anyway.
181 */
182#define static_cpu_has(bit) boot_cpu_has(bit)
183#endif
184
185#define cpu_has_bug(c, bit) cpu_has(c, (bit))
186#define set_cpu_bug(c, bit) set_cpu_cap(c, (bit))
187#define clear_cpu_bug(c, bit) clear_cpu_cap(c, (bit))
188
189#define static_cpu_has_bug(bit) static_cpu_has((bit))
190#define boot_cpu_has_bug(bit) cpu_has_bug(&boot_cpu_data, (bit))
191
192#define MAX_CPU_FEATURES (NCAPINTS * 32)
193#define cpu_have_feature boot_cpu_has
194
195#define CPU_FEATURE_TYPEFMT "x86,ven%04Xfam%04Xmod%04X"
196#define CPU_FEATURE_TYPEVAL boot_cpu_data.x86_vendor, boot_cpu_data.x86, \
197 boot_cpu_data.x86_model
198
199#endif /* defined(__KERNEL__) && !defined(__ASSEMBLY__) */
200#endif /* _ASM_X86_CPUFEATURE_H */