Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/*
2 * S390 version
3 * Copyright IBM Corp. 1999
4 * Author(s): Hartmut Penner (hp@de.ibm.com),
5 * Martin Schwidefsky (schwidefsky@de.ibm.com)
6 *
7 * Derived from "include/asm-i386/processor.h"
8 * Copyright (C) 1994, Linus Torvalds
9 */
10
11#ifndef __ASM_S390_PROCESSOR_H
12#define __ASM_S390_PROCESSOR_H
13
14#include <linux/const.h>
15
16#define CIF_MCCK_PENDING 0 /* machine check handling is pending */
17#define CIF_ASCE 1 /* user asce needs fixup / uaccess */
18#define CIF_NOHZ_DELAY 2 /* delay HZ disable for a tick */
19#define CIF_FPU 3 /* restore FPU registers */
20#define CIF_IGNORE_IRQ 4 /* ignore interrupt (for udelay) */
21#define CIF_ENABLED_WAIT 5 /* in enabled wait state */
22
23#define _CIF_MCCK_PENDING _BITUL(CIF_MCCK_PENDING)
24#define _CIF_ASCE _BITUL(CIF_ASCE)
25#define _CIF_NOHZ_DELAY _BITUL(CIF_NOHZ_DELAY)
26#define _CIF_FPU _BITUL(CIF_FPU)
27#define _CIF_IGNORE_IRQ _BITUL(CIF_IGNORE_IRQ)
28#define _CIF_ENABLED_WAIT _BITUL(CIF_ENABLED_WAIT)
29
30#ifndef __ASSEMBLY__
31
32#include <linux/linkage.h>
33#include <linux/irqflags.h>
34#include <asm/cpu.h>
35#include <asm/page.h>
36#include <asm/ptrace.h>
37#include <asm/setup.h>
38#include <asm/runtime_instr.h>
39#include <asm/fpu/types.h>
40#include <asm/fpu/internal.h>
41
42static inline void set_cpu_flag(int flag)
43{
44 S390_lowcore.cpu_flags |= (1UL << flag);
45}
46
47static inline void clear_cpu_flag(int flag)
48{
49 S390_lowcore.cpu_flags &= ~(1UL << flag);
50}
51
52static inline int test_cpu_flag(int flag)
53{
54 return !!(S390_lowcore.cpu_flags & (1UL << flag));
55}
56
57/*
58 * Test CIF flag of another CPU. The caller needs to ensure that
59 * CPU hotplug can not happen, e.g. by disabling preemption.
60 */
61static inline int test_cpu_flag_of(int flag, int cpu)
62{
63 struct lowcore *lc = lowcore_ptr[cpu];
64 return !!(lc->cpu_flags & (1UL << flag));
65}
66
67#define arch_needs_cpu() test_cpu_flag(CIF_NOHZ_DELAY)
68
69/*
70 * Default implementation of macro that returns current
71 * instruction pointer ("program counter").
72 */
73#define current_text_addr() ({ void *pc; asm("basr %0,0" : "=a" (pc)); pc; })
74
75static inline void get_cpu_id(struct cpuid *ptr)
76{
77 asm volatile("stidp %0" : "=Q" (*ptr));
78}
79
80extern void s390_adjust_jiffies(void);
81extern const struct seq_operations cpuinfo_op;
82extern int sysctl_ieee_emulation_warnings;
83extern void execve_tail(void);
84
85/*
86 * User space process size: 2GB for 31 bit, 4TB or 8PT for 64 bit.
87 */
88
89#define TASK_SIZE_OF(tsk) ((tsk)->mm->context.asce_limit)
90#define TASK_UNMAPPED_BASE (test_thread_flag(TIF_31BIT) ? \
91 (1UL << 30) : (1UL << 41))
92#define TASK_SIZE TASK_SIZE_OF(current)
93#define TASK_MAX_SIZE (1UL << 53)
94
95#define STACK_TOP (1UL << (test_thread_flag(TIF_31BIT) ? 31:42))
96#define STACK_TOP_MAX (1UL << 42)
97
98#define HAVE_ARCH_PICK_MMAP_LAYOUT
99
100typedef struct {
101 __u32 ar4;
102} mm_segment_t;
103
104/*
105 * Thread structure
106 */
107struct thread_struct {
108 unsigned int acrs[NUM_ACRS];
109 unsigned long ksp; /* kernel stack pointer */
110 mm_segment_t mm_segment;
111 unsigned long gmap_addr; /* address of last gmap fault. */
112 unsigned int gmap_pfault; /* signal of a pending guest pfault */
113 struct per_regs per_user; /* User specified PER registers */
114 struct per_event per_event; /* Cause of the last PER trap */
115 unsigned long per_flags; /* Flags to control debug behavior */
116 /* pfault_wait is used to block the process on a pfault event */
117 unsigned long pfault_wait;
118 struct list_head list;
119 /* cpu runtime instrumentation */
120 struct runtime_instr_cb *ri_cb;
121 unsigned char trap_tdb[256]; /* Transaction abort diagnose block */
122 /*
123 * Warning: 'fpu' is dynamically-sized. It *MUST* be at
124 * the end.
125 */
126 struct fpu fpu; /* FP and VX register save area */
127};
128
129/* Flag to disable transactions. */
130#define PER_FLAG_NO_TE 1UL
131/* Flag to enable random transaction aborts. */
132#define PER_FLAG_TE_ABORT_RAND 2UL
133/* Flag to specify random transaction abort mode:
134 * - abort each transaction at a random instruction before TEND if set.
135 * - abort random transactions at a random instruction if cleared.
136 */
137#define PER_FLAG_TE_ABORT_RAND_TEND 4UL
138
139typedef struct thread_struct thread_struct;
140
141/*
142 * Stack layout of a C stack frame.
143 */
144#ifndef __PACK_STACK
145struct stack_frame {
146 unsigned long back_chain;
147 unsigned long empty1[5];
148 unsigned long gprs[10];
149 unsigned int empty2[8];
150};
151#else
152struct stack_frame {
153 unsigned long empty1[5];
154 unsigned int empty2[8];
155 unsigned long gprs[10];
156 unsigned long back_chain;
157};
158#endif
159
160#define ARCH_MIN_TASKALIGN 8
161
162#define INIT_THREAD { \
163 .ksp = sizeof(init_stack) + (unsigned long) &init_stack, \
164 .fpu.regs = (void *) init_task.thread.fpu.fprs, \
165}
166
167/*
168 * Do necessary setup to start up a new thread.
169 */
170#define start_thread(regs, new_psw, new_stackp) do { \
171 regs->psw.mask = PSW_USER_BITS | PSW_MASK_EA | PSW_MASK_BA; \
172 regs->psw.addr = new_psw; \
173 regs->gprs[15] = new_stackp; \
174 execve_tail(); \
175} while (0)
176
177#define start_thread31(regs, new_psw, new_stackp) do { \
178 regs->psw.mask = PSW_USER_BITS | PSW_MASK_BA; \
179 regs->psw.addr = new_psw; \
180 regs->gprs[15] = new_stackp; \
181 crst_table_downgrade(current->mm); \
182 execve_tail(); \
183} while (0)
184
185/* Forward declaration, a strange C thing */
186struct task_struct;
187struct mm_struct;
188struct seq_file;
189
190typedef int (*dump_trace_func_t)(void *data, unsigned long address);
191void dump_trace(dump_trace_func_t func, void *data,
192 struct task_struct *task, unsigned long sp);
193
194void show_cacheinfo(struct seq_file *m);
195
196/* Free all resources held by a thread. */
197extern void release_thread(struct task_struct *);
198
199/*
200 * Return saved PC of a blocked thread.
201 */
202extern unsigned long thread_saved_pc(struct task_struct *t);
203
204unsigned long get_wchan(struct task_struct *p);
205#define task_pt_regs(tsk) ((struct pt_regs *) \
206 (task_stack_page(tsk) + THREAD_SIZE) - 1)
207#define KSTK_EIP(tsk) (task_pt_regs(tsk)->psw.addr)
208#define KSTK_ESP(tsk) (task_pt_regs(tsk)->gprs[15])
209
210/* Has task runtime instrumentation enabled ? */
211#define is_ri_task(tsk) (!!(tsk)->thread.ri_cb)
212
213static inline unsigned long current_stack_pointer(void)
214{
215 unsigned long sp;
216
217 asm volatile("la %0,0(15)" : "=a" (sp));
218 return sp;
219}
220
221static inline unsigned short stap(void)
222{
223 unsigned short cpu_address;
224
225 asm volatile("stap %0" : "=m" (cpu_address));
226 return cpu_address;
227}
228
229/*
230 * Give up the time slice of the virtual PU.
231 */
232void cpu_relax(void);
233
234#define cpu_relax_lowlatency() barrier()
235
236static inline void psw_set_key(unsigned int key)
237{
238 asm volatile("spka 0(%0)" : : "d" (key));
239}
240
241/*
242 * Set PSW to specified value.
243 */
244static inline void __load_psw(psw_t psw)
245{
246 asm volatile("lpswe %0" : : "Q" (psw) : "cc");
247}
248
249/*
250 * Set PSW mask to specified value, while leaving the
251 * PSW addr pointing to the next instruction.
252 */
253static inline void __load_psw_mask(unsigned long mask)
254{
255 unsigned long addr;
256 psw_t psw;
257
258 psw.mask = mask;
259
260 asm volatile(
261 " larl %0,1f\n"
262 " stg %0,%O1+8(%R1)\n"
263 " lpswe %1\n"
264 "1:"
265 : "=&d" (addr), "=Q" (psw) : "Q" (psw) : "memory", "cc");
266}
267
268/*
269 * Extract current PSW mask
270 */
271static inline unsigned long __extract_psw(void)
272{
273 unsigned int reg1, reg2;
274
275 asm volatile("epsw %0,%1" : "=d" (reg1), "=a" (reg2));
276 return (((unsigned long) reg1) << 32) | ((unsigned long) reg2);
277}
278
279static inline void local_mcck_enable(void)
280{
281 __load_psw_mask(__extract_psw() | PSW_MASK_MCHECK);
282}
283
284static inline void local_mcck_disable(void)
285{
286 __load_psw_mask(__extract_psw() & ~PSW_MASK_MCHECK);
287}
288
289/*
290 * Rewind PSW instruction address by specified number of bytes.
291 */
292static inline unsigned long __rewind_psw(psw_t psw, unsigned long ilc)
293{
294 unsigned long mask;
295
296 mask = (psw.mask & PSW_MASK_EA) ? -1UL :
297 (psw.mask & PSW_MASK_BA) ? (1UL << 31) - 1 :
298 (1UL << 24) - 1;
299 return (psw.addr - ilc) & mask;
300}
301
302/*
303 * Function to stop a processor until the next interrupt occurs
304 */
305void enabled_wait(void);
306
307/*
308 * Function to drop a processor into disabled wait state
309 */
310static inline void __noreturn disabled_wait(unsigned long code)
311{
312 psw_t psw;
313
314 psw.mask = PSW_MASK_BASE | PSW_MASK_WAIT | PSW_MASK_BA | PSW_MASK_EA;
315 psw.addr = code;
316 __load_psw(psw);
317 while (1);
318}
319
320/*
321 * Basic Machine Check/Program Check Handler.
322 */
323
324extern void s390_base_mcck_handler(void);
325extern void s390_base_pgm_handler(void);
326extern void s390_base_ext_handler(void);
327
328extern void (*s390_base_mcck_handler_fn)(void);
329extern void (*s390_base_pgm_handler_fn)(void);
330extern void (*s390_base_ext_handler_fn)(void);
331
332#define ARCH_LOW_ADDRESS_LIMIT 0x7fffffffUL
333
334extern int memcpy_real(void *, void *, size_t);
335extern void memcpy_absolute(void *, void *, size_t);
336
337#define mem_assign_absolute(dest, val) { \
338 __typeof__(dest) __tmp = (val); \
339 \
340 BUILD_BUG_ON(sizeof(__tmp) != sizeof(val)); \
341 memcpy_absolute(&(dest), &__tmp, sizeof(__tmp)); \
342}
343
344#endif /* __ASSEMBLY__ */
345
346#endif /* __ASM_S390_PROCESSOR_H */