Linux kernel mirror (for testing)
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1/*
2 * Based on arch/arm/include/asm/cacheflush.h
3 *
4 * Copyright (C) 1999-2002 Russell King.
5 * Copyright (C) 2012 ARM Ltd.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19#ifndef __ASM_CACHEFLUSH_H
20#define __ASM_CACHEFLUSH_H
21
22#include <linux/mm.h>
23
24/*
25 * This flag is used to indicate that the page pointed to by a pte is clean
26 * and does not require cleaning before returning it to the user.
27 */
28#define PG_dcache_clean PG_arch_1
29
30/*
31 * MM Cache Management
32 * ===================
33 *
34 * The arch/arm64/mm/cache.S implements these methods.
35 *
36 * Start addresses are inclusive and end addresses are exclusive; start
37 * addresses should be rounded down, end addresses up.
38 *
39 * See Documentation/cachetlb.txt for more information. Please note that
40 * the implementation assumes non-aliasing VIPT D-cache and (aliasing)
41 * VIPT or ASID-tagged VIVT I-cache.
42 *
43 * flush_cache_mm(mm)
44 *
45 * Clean and invalidate all user space cache entries
46 * before a change of page tables.
47 *
48 * flush_icache_range(start, end)
49 *
50 * Ensure coherency between the I-cache and the D-cache in the
51 * region described by start, end.
52 * - start - virtual start address
53 * - end - virtual end address
54 *
55 * __flush_cache_user_range(start, end)
56 *
57 * Ensure coherency between the I-cache and the D-cache in the
58 * region described by start, end.
59 * - start - virtual start address
60 * - end - virtual end address
61 *
62 * __flush_dcache_area(kaddr, size)
63 *
64 * Ensure that the data held in page is written back.
65 * - kaddr - page address
66 * - size - region size
67 */
68extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end);
69extern void flush_icache_range(unsigned long start, unsigned long end);
70extern void __flush_dcache_area(void *addr, size_t len);
71extern void __clean_dcache_area_pou(void *addr, size_t len);
72extern long __flush_cache_user_range(unsigned long start, unsigned long end);
73
74static inline void flush_cache_mm(struct mm_struct *mm)
75{
76}
77
78static inline void flush_cache_page(struct vm_area_struct *vma,
79 unsigned long user_addr, unsigned long pfn)
80{
81}
82
83/*
84 * Cache maintenance functions used by the DMA API. No to be used directly.
85 */
86extern void __dma_map_area(const void *, size_t, int);
87extern void __dma_unmap_area(const void *, size_t, int);
88extern void __dma_flush_range(const void *, const void *);
89
90/*
91 * Copy user data from/to a page which is mapped into a different
92 * processes address space. Really, we want to allow our "user
93 * space" model to handle this.
94 */
95extern void copy_to_user_page(struct vm_area_struct *, struct page *,
96 unsigned long, void *, const void *, unsigned long);
97#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
98 do { \
99 memcpy(dst, src, len); \
100 } while (0)
101
102#define flush_cache_dup_mm(mm) flush_cache_mm(mm)
103
104/*
105 * flush_dcache_page is used when the kernel has written to the page
106 * cache page at virtual address page->virtual.
107 *
108 * If this page isn't mapped (ie, page_mapping == NULL), or it might
109 * have userspace mappings, then we _must_ always clean + invalidate
110 * the dcache entries associated with the kernel mapping.
111 *
112 * Otherwise we can defer the operation, and clean the cache when we are
113 * about to change to user space. This is the same method as used on SPARC64.
114 * See update_mmu_cache for the user space part.
115 */
116#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
117extern void flush_dcache_page(struct page *);
118
119static inline void __flush_icache_all(void)
120{
121 asm("ic ialluis");
122 dsb(ish);
123}
124
125#define flush_dcache_mmap_lock(mapping) \
126 spin_lock_irq(&(mapping)->tree_lock)
127#define flush_dcache_mmap_unlock(mapping) \
128 spin_unlock_irq(&(mapping)->tree_lock)
129
130/*
131 * We don't appear to need to do anything here. In fact, if we did, we'd
132 * duplicate cache flushing elsewhere performed by flush_dcache_page().
133 */
134#define flush_icache_page(vma,page) do { } while (0)
135
136/*
137 * Not required on AArch64 (PIPT or VIPT non-aliasing D-cache).
138 */
139static inline void flush_cache_vmap(unsigned long start, unsigned long end)
140{
141}
142
143static inline void flush_cache_vunmap(unsigned long start, unsigned long end)
144{
145}
146
147int set_memory_ro(unsigned long addr, int numpages);
148int set_memory_rw(unsigned long addr, int numpages);
149int set_memory_x(unsigned long addr, int numpages);
150int set_memory_nx(unsigned long addr, int numpages);
151
152#endif